2 * Copyright (c) 2016 Endless Computers, Inc.
3 * Author: Carlo Caione <carlo@endlessm.com>
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
44 #include "meson-gx.dtsi"
45 #include <dt-bindings/clock/gxbb-clkc.h>
46 #include <dt-bindings/clock/gxbb-aoclkc.h>
47 #include <dt-bindings/gpio/meson-gxl-gpio.h>
48 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
51 compatible = "amlogic,meson-gxl";
55 reg = <0x0 0xc9410000 0x0 0x10000
56 0x0 0xc8834540 0x0 0x4>;
58 clocks = <&clkc CLKID_ETH>,
59 <&clkc CLKID_FCLK_DIV2>,
61 clock-names = "stmmaceth", "clkin0", "clkin1";
66 compatible = "snps,dwmac-mdio";
71 pinctrl_aobus: pinctrl@14 {
72 compatible = "amlogic,meson-gxl-aobus-pinctrl";
78 reg = <0x0 0x00014 0x0 0x8>,
79 <0x0 0x0002c 0x0 0x4>,
80 <0x0 0x00024 0x0 0x8>;
81 reg-names = "mux", "pull", "gpio";
84 gpio-ranges = <&pinctrl_aobus 0 0 14>;
87 uart_ao_a_pins: uart_ao_a {
89 groups = "uart_tx_ao_a", "uart_rx_ao_a";
94 uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
96 groups = "uart_cts_ao_a",
102 uart_ao_b_pins: uart_ao_b {
104 groups = "uart_tx_ao_b", "uart_rx_ao_b";
105 function = "uart_ao_b";
109 uart_ao_b_0_1_pins: uart_ao_b_0_1 {
111 groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1";
112 function = "uart_ao_b";
116 uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
118 groups = "uart_cts_ao_b",
120 function = "uart_ao_b";
124 remote_input_ao_pins: remote_input_ao {
126 groups = "remote_input_ao";
127 function = "remote_input_ao";
131 i2c_ao_pins: i2c_ao {
133 groups = "i2c_sck_ao",
139 pwm_ao_a_3_pins: pwm_ao_a_3 {
141 groups = "pwm_ao_a_3";
142 function = "pwm_ao_a";
146 pwm_ao_a_8_pins: pwm_ao_a_8 {
148 groups = "pwm_ao_a_8";
149 function = "pwm_ao_a";
153 pwm_ao_b_pins: pwm_ao_b {
156 function = "pwm_ao_b";
160 pwm_ao_b_6_pins: pwm_ao_b_6 {
162 groups = "pwm_ao_b_6";
163 function = "pwm_ao_b";
167 i2s_out_ch23_ao_pins: i2s_out_ch23_ao {
169 groups = "i2s_out_ch23_ao";
170 function = "i2s_out_ao";
174 i2s_out_ch45_ao_pins: i2s_out_ch45_ao {
176 groups = "i2s_out_ch45_ao";
177 function = "i2s_out_ao";
181 spdif_out_ao_6_pins: spdif_out_ao_6 {
183 groups = "spdif_out_ao_6";
184 function = "spdif_out_ao";
188 spdif_out_ao_9_pins: spdif_out_ao_9 {
190 groups = "spdif_out_ao_9";
191 function = "spdif_out_ao";
195 ao_cec_pins: ao_cec {
202 ee_cec_pins: ee_cec {
212 clocks = <&clkc_AO CLKID_AO_CEC_32K>;
213 clock-names = "core";
217 compatible = "amlogic,meson-gxl-aoclkc", "amlogic,meson-gx-aoclkc";
221 compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
222 resets = <&reset RESET_HDMITX_CAPB3>,
223 <&reset RESET_HDMI_SYSTEM_RESET>,
224 <&reset RESET_HDMI_TX>;
225 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
226 clocks = <&clkc CLKID_HDMI_PCLK>,
228 <&clkc CLKID_GCLK_VENCI_INT0>;
229 clock-names = "isfr", "iahb", "venci";
233 clkc: clock-controller@0 {
234 compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc";
236 reg = <0x0 0x0 0x0 0x3db>;
241 clocks = <&clkc CLKID_I2C>;
245 clocks = <&clkc CLKID_AO_I2C>;
249 clocks = <&clkc CLKID_I2C>;
253 clocks = <&clkc CLKID_I2C>;
257 pinctrl_periphs: pinctrl@4b0 {
258 compatible = "amlogic,meson-gxl-periphs-pinctrl";
259 #address-cells = <2>;
264 reg = <0x0 0x004b0 0x0 0x28>,
265 <0x0 0x004e8 0x0 0x14>,
266 <0x0 0x00520 0x0 0x14>,
267 <0x0 0x00430 0x0 0x40>;
268 reg-names = "mux", "pull", "pull-enable", "gpio";
271 gpio-ranges = <&pinctrl_periphs 0 10 101>;
276 groups = "emmc_nand_d07",
284 emmc_clk_gate_pins: emmc_clk_gate {
287 function = "gpio_periphs";
314 spi_ss0_pins: spi-ss0 {
321 sdcard_pins: sdcard {
323 groups = "sdcard_d0",
333 sdcard_clk_gate_pins: sdcard_clk_gate {
336 function = "gpio_periphs";
356 sdio_clk_gate_pins: sdio_clk_gate {
359 function = "gpio_periphs";
367 sdio_irq_pins: sdio_irq {
374 uart_a_pins: uart_a {
376 groups = "uart_tx_a",
382 uart_a_cts_rts_pins: uart_a_cts_rts {
384 groups = "uart_cts_a",
390 uart_b_pins: uart_b {
392 groups = "uart_tx_b",
398 uart_b_cts_rts_pins: uart_b_cts_rts {
400 groups = "uart_cts_b",
406 uart_c_pins: uart_c {
408 groups = "uart_tx_c",
414 uart_c_cts_rts_pins: uart_c_cts_rts {
416 groups = "uart_cts_c",
424 groups = "i2c_sck_a",
432 groups = "i2c_sck_b",
440 groups = "i2c_sck_c",
466 eth_link_led_pins: eth_link_led {
468 groups = "eth_link_led";
469 function = "eth_led";
473 eth_act_led_pins: eth_act_led {
475 groups = "eth_act_led";
476 function = "eth_led";
515 pwm_f_clk_pins: pwm_f_clk {
517 groups = "pwm_f_clk";
522 pwm_f_x_pins: pwm_f_x {
529 hdmi_hpd_pins: hdmi_hpd {
532 function = "hdmi_hpd";
536 hdmi_i2c_pins: hdmi_i2c {
538 groups = "hdmi_sda", "hdmi_scl";
539 function = "hdmi_i2c";
543 i2s_am_clk_pins: i2s_am_clk {
545 groups = "i2s_am_clk";
546 function = "i2s_out";
550 i2s_out_ao_clk_pins: i2s_out_ao_clk {
552 groups = "i2s_out_ao_clk";
553 function = "i2s_out";
557 i2s_out_lr_clk_pins: i2s_out_lr_clk {
559 groups = "i2s_out_lr_clk";
560 function = "i2s_out";
564 i2s_out_ch01_pins: i2s_out_ch01 {
566 groups = "i2s_out_ch01";
567 function = "i2s_out";
570 i2sout_ch23_z_pins: i2sout_ch23_z {
572 groups = "i2sout_ch23_z";
573 function = "i2s_out";
577 i2sout_ch45_z_pins: i2sout_ch45_z {
579 groups = "i2sout_ch45_z";
580 function = "i2s_out";
584 i2sout_ch67_z_pins: i2sout_ch67_z {
586 groups = "i2sout_ch67_z";
587 function = "i2s_out";
591 spdif_out_h_pins: spdif_out_ao_h {
593 groups = "spdif_out_h";
594 function = "spdif_out";
600 compatible = "mdio-mux-mmioreg", "mdio-mux";
601 #address-cells = <1>;
603 reg = <0x0 0x55c 0x0 0x4>;
604 mux-mask = <0xffffffff>;
605 mdio-parent-bus = <&mdio0>;
607 internal_mdio: mdio@e40908ff {
609 #address-cells = <1>;
612 internal_phy: ethernet-phy@8 {
613 compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22";
619 external_mdio: mdio@2009087f {
621 #address-cells = <1>;
628 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
630 <&clkc CLKID_SAR_ADC>,
632 <&clkc CLKID_SAR_ADC_CLK>,
633 <&clkc CLKID_SAR_ADC_SEL>;
634 clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
638 clocks = <&clkc CLKID_SD_EMMC_A>,
639 <&clkc CLKID_SD_EMMC_A_CLK0>,
640 <&clkc CLKID_FCLK_DIV2>;
641 clock-names = "core", "clkin0", "clkin1";
645 clocks = <&clkc CLKID_SD_EMMC_B>,
646 <&clkc CLKID_SD_EMMC_B_CLK0>,
647 <&clkc CLKID_FCLK_DIV2>;
648 clock-names = "core", "clkin0", "clkin1";
652 clocks = <&clkc CLKID_SD_EMMC_C>,
653 <&clkc CLKID_SD_EMMC_C_CLK0>,
654 <&clkc CLKID_FCLK_DIV2>;
655 clock-names = "core", "clkin0", "clkin1";
659 clocks = <&clkc CLKID_SPICC>;
660 clock-names = "core";
661 resets = <&reset RESET_PERIPHS_SPICC>;
666 clocks = <&clkc CLKID_SPI>;
670 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
671 clock-names = "xtal", "core", "baud";
675 clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
676 clock-names = "xtal", "pclk", "baud";
680 clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
681 clock-names = "xtal", "pclk", "baud";
685 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
686 clock-names = "xtal", "core", "baud";
690 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
691 clock-names = "xtal", "core", "baud";
695 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";