Merge branches 'for-4.16/upstream' and 'for-4.15/upstream-fixes' into for-linus
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / amlogic / meson-gxbb-nanopi-k2.dts
1 /*
2  * Copyright (c) 2017 Andreas Färber
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This library is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This library is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  *
42  * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
43  */
44
45 /dts-v1/;
46
47 #include "meson-gxbb.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
49
50 / {
51         compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
52
53         aliases {
54                 serial0 = &uart_AO;
55         };
56
57         chosen {
58                 stdout-path = "serial0:115200n8";
59         };
60
61         memory@0 {
62                 device_type = "memory";
63                 reg = <0x0 0x0 0x0 0x80000000>;
64         };
65
66         leds {
67                 compatible = "gpio-leds";
68
69                 stat {
70                         label = "nanopi-k2:blue:stat";
71                         gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
72                         default-state = "on";
73                         panic-indicator;
74                 };
75         };
76
77         vdd_5v: regulator-vdd-5v {
78                 compatible = "regulator-fixed";
79                 regulator-name = "VDD_5V";
80                 regulator-min-microvolt = <5000000>;
81                 regulator-max-microvolt = <5000000>;
82         };
83
84         vddio_ao18: regulator-vddio-ao18 {
85                 compatible = "regulator-fixed";
86                 regulator-name = "VDDIO_AO18";
87                 regulator-min-microvolt = <1800000>;
88                 regulator-max-microvolt = <1800000>;
89         };
90
91         vddio_ao3v3: regulator-vddio-ao3v3 {
92                 compatible = "regulator-fixed";
93                 regulator-name = "VDDIO_AO3.3V";
94                 regulator-min-microvolt = <3300000>;
95                 regulator-max-microvolt = <3300000>;
96         };
97
98         vddio_tf: regulator-vddio-tf {
99                 compatible = "regulator-gpio";
100
101                 regulator-name = "VDDIO_TF";
102                 regulator-min-microvolt = <1800000>;
103                 regulator-max-microvolt = <3300000>;
104
105                 gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
106                 gpios-states = <0>;
107
108                 states = <3300000 0>,
109                          <1800000 1>;
110
111                 regulator-settling-time-up-us = <100>;
112                 regulator-settling-time-down-us = <5000>;
113         };
114
115         wifi_32k: wifi-32k {
116                 compatible = "pwm-clock";
117                 #clock-cells = <0>;
118                 clock-frequency = <32768>;
119                 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
120         };
121
122         sdio_pwrseq: sdio-pwrseq {
123                 compatible = "mmc-pwrseq-simple";
124                 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
125                 clocks = <&wifi_32k>;
126                 clock-names = "ext_clock";
127         };
128
129         vcc1v8: regulator-vcc1v8 {
130                 compatible = "regulator-fixed";
131                 regulator-name = "VCC1.8V";
132                 regulator-min-microvolt = <1800000>;
133                 regulator-max-microvolt = <1800000>;
134         };
135
136         vcc3v3: regulator-vcc3v3 {
137                 compatible = "regulator-fixed";
138                 regulator-name = "VCC3.3V";
139                 regulator-min-microvolt = <3300000>;
140                 regulator-max-microvolt = <3300000>;
141         };
142
143         emmc_pwrseq: emmc-pwrseq {
144                 compatible = "mmc-pwrseq-emmc";
145                 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
146         };
147 };
148
149 &ethmac {
150         status = "okay";
151         pinctrl-0 = <&eth_rgmii_pins>;
152         pinctrl-names = "default";
153
154         phy-handle = <&eth_phy0>;
155         phy-mode = "rgmii";
156
157         amlogic,tx-delay-ns = <2>;
158
159         snps,reset-gpio = <&gpio GPIOZ_14 0>;
160         snps,reset-delays-us = <0 10000 1000000>;
161         snps,reset-active-low;
162
163         mdio {
164                 compatible = "snps,dwmac-mdio";
165                 #address-cells = <1>;
166                 #size-cells = <0>;
167
168                 eth_phy0: ethernet-phy@0 {
169                         /* Realtek RTL8211F (0x001cc916) */
170                         reg = <0>;
171                         interrupt-parent = <&gpio_intc>;
172                         interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
173                 };
174         };
175 };
176
177 &ir {
178         status = "okay";
179         pinctrl-0 = <&remote_input_ao_pins>;
180         pinctrl-names = "default";
181 };
182
183 &pinctrl_aobus {
184         gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
185                           "VCCK En", "CON1 Header Pin31",
186                           "I2S Header Pin6", "IR In", "I2S Header Pin7",
187                           "I2S Header Pin3", "I2S Header Pin4",
188                           "I2S Header Pin5", "HDMI CEC", "SYS LED",
189                           /* GPIO_TEST_N */
190                           "";
191 };
192
193 &pinctrl_periphs {
194         gpio-line-names = /* Bank GPIOZ */
195                           "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
196                           "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
197                           "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
198                           "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
199                           "Eth PHY nRESET", "Eth PHY Intc",
200                           /* Bank GPIOH */
201                           "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL",
202                           "CON1 Header Pin33",
203                           /* Bank BOOT */
204                           "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
205                           "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
206                           "eMMC Reset", "eMMC CMD",
207                           "", "", "", "", "eMMC DS",
208                           "", "",
209                           /* Bank CARD */
210                           "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
211                           "SDCard D3", "SDCard D2", "SDCard Det",
212                           /* Bank GPIODV */
213                           "", "", "", "", "", "", "", "", "", "", "", "", "",
214                           "", "", "", "", "", "", "", "", "", "", "",
215                           "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
216                           "VDDEE Regulator", "VCCK Regulator",
217                           /* Bank GPIOY */
218                           "CON1 Header Pin7", "CON1 Header Pin11",
219                           "CON1 Header Pin13", "CON1 Header Pin15",
220                           "CON1 Header Pin18", "CON1 Header Pin19",
221                           "CON1 Header Pin22", "CON1 Header Pin21",
222                           "CON1 Header Pin24", "CON1 Header Pin23",
223                           "CON1 Header Pin26", "CON1 Header Pin29",
224                           "CON1 Header Pin32", "CON1 Header Pin8",
225                           "CON1 Header Pin10", "CON1 Header Pin16",
226                           "CON1 Header Pin12",
227                           /* Bank GPIOX */
228                           "WIFI SDIO D0", "WIFI SDIO D1", "WIFI SDIO D2",
229                           "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
230                           "WIFI Power Enable", "WIFI WAKE HOST",
231                           "Bluetooth PCM DOUT", "Bluetooth PCM DIN",
232                           "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
233                           "Bluetooth UART TX", "Bluetooth UART RX",
234                           "Bluetooth UART CTS", "Bluetooth UART RTS",
235                           "", "", "", "WIFI 32K", "Bluetooth Enable",
236                           "Bluetooth WAKE HOST", "",
237                           /* Bank GPIOCLK */
238                           "", "CON1 Header Pin35", "", "";
239 };
240
241 &pwm_ef {
242         status = "okay";
243         pinctrl-0 = <&pwm_e_pins>;
244         pinctrl-names = "default";
245         clocks = <&clkc CLKID_FCLK_DIV4>;
246         clock-names = "clkin0";
247 };
248
249 &saradc {
250         status = "okay";
251         vref-supply = <&vddio_ao18>;
252 };
253
254 /* SDIO */
255 &sd_emmc_a {
256         status = "okay";
257         pinctrl-0 = <&sdio_pins>, <&sdio_irq_pins>;
258         pinctrl-1 = <&sdio_clk_gate_pins>;
259         pinctrl-names = "default", "clk-gate";
260         #address-cells = <1>;
261         #size-cells = <0>;
262
263         bus-width = <4>;
264         cap-sd-highspeed;
265         max-frequency = <200000000>;
266
267         non-removable;
268         disable-wp;
269
270         mmc-pwrseq = <&sdio_pwrseq>;
271
272         vmmc-supply = <&vddio_ao3v3>;
273         vqmmc-supply = <&vddio_ao18>;
274
275         brcmf: wifi@1 {
276                 compatible = "brcm,bcm4329-fmac";
277                 reg = <1>;
278         };
279 };
280
281 /* SD */
282 &sd_emmc_b {
283         status = "okay";
284         pinctrl-0 = <&sdcard_pins>;
285         pinctrl-1 = <&sdcard_clk_gate_pins>;
286         pinctrl-names = "default", "clk-gate";
287
288         bus-width = <4>;
289         cap-sd-highspeed;
290         sd-uhs-sdr12;
291         sd-uhs-sdr25;
292         sd-uhs-sdr50;
293         sd-uhs-sdr104;
294         max-frequency = <200000000>;
295         disable-wp;
296
297         cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
298         cd-inverted;
299
300         vmmc-supply = <&vddio_ao3v3>;
301         vqmmc-supply = <&vddio_tf>;
302 };
303
304 /* eMMC */
305 &sd_emmc_c {
306         status = "disabled";
307         pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
308         pinctrl-1 = <&emmc_clk_gate_pins>;
309         pinctrl-names = "default", "clk-gate";
310
311         bus-width = <8>;
312         max-frequency = <200000000>;
313         non-removable;
314         disable-wp;
315         cap-mmc-highspeed;
316         mmc-ddr-1_8v;
317         mmc-hs200-1_8v;
318
319         mmc-pwrseq = <&emmc_pwrseq>;
320         vmmc-supply = <&vcc3v3>;
321         vqmmc-supply = <&vcc1v8>;
322 };
323
324 /* DBG_UART */
325 &uart_AO {
326         status = "okay";
327         pinctrl-0 = <&uart_ao_a_pins>;
328         pinctrl-names = "default";
329 };
330
331 /* Bluetooth on AP6212 */
332 &uart_A {
333         status = "disabled";
334         pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
335         pinctrl-names = "default";
336 };
337
338 /* 40-pin CON1 */
339 &uart_C {
340         status = "disabled";
341         pinctrl-0 = <&uart_c_pins>;
342         pinctrl-names = "default";
343 };
344
345 &usb0_phy {
346         status = "okay";
347         phy-supply = <&vdd_5v>;
348 };
349
350 &usb1_phy {
351         status = "okay";
352 };
353
354 &usb0 {
355         status = "okay";
356 };
357
358 &usb1 {
359         status = "okay";
360 };