arch/arm64/boot/dts/amlogic/meson-gx.dtsi

   1 /*
   2  * Copyright (c) 2016 Andreas Färber
   3  *
   4  * Copyright (c) 2016 BayLibre, SAS.
   5  * Author: Neil Armstrong <narmstrong@baylibre.com>
   6  *
   7  * Copyright (c) 2016 Endless Computers, Inc.
   8  * Author: Carlo Caione <carlo@endlessm.com>
   9  *
  10  * This file is dual-licensed: you can use it either under the terms
  11  * of the GPL or the X11 license, at your option. Note that this dual
  12  * licensing only applies to this file, and not this project as a
  13  * whole.
  14  *
  15  *  a) This library is free software; you can redistribute it and/or
  16  *     modify it under the terms of the GNU General Public License as
  17  *     published by the Free Software Foundation; either version 2 of the
  18  *     License, or (at your option) any later version.
  19  *
  20  *     This library is distributed in the hope that it will be useful,
  21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *     GNU General Public License for more details.
  24  *
  25  * Or, alternatively,
  26  *
  27  *  b) Permission is hereby granted, free of charge, to any person
  28  *     obtaining a copy of this software and associated documentation
  29  *     files (the "Software"), to deal in the Software without
  30  *     restriction, including without limitation the rights to use,
  31  *     copy, modify, merge, publish, distribute, sublicense, and/or
  32  *     sell copies of the Software, and to permit persons to whom the
  33  *     Software is furnished to do so, subject to the following
  34  *     conditions:
  35  *
  36  *     The above copyright notice and this permission notice shall be
  37  *     included in all copies or substantial portions of the Software.
  38  *
  39  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  40  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  41  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  42  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  43  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  44  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  45  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  46  *     OTHER DEALINGS IN THE SOFTWARE.
  47  */
  48
  49 #include <dt-bindings/gpio/gpio.h>
  50 #include <dt-bindings/interrupt-controller/irq.h>
  51 #include <dt-bindings/interrupt-controller/arm-gic.h>
  52
  53 / {
  54         interrupt-parent = <&gic>;
  55         #address-cells = <2>;
  56         #size-cells = <2>;
  57
  58         cpus {
  59                 #address-cells = <0x2>;
  60                 #size-cells = <0x0>;
  61
  62                 cpu0: cpu@0 {
  63                         device_type = "cpu";
  64                         compatible = "arm,cortex-a53", "arm,armv8";
  65                         reg = <0x0 0x0>;
  66                         enable-method = "psci";
  67                         next-level-cache = <&l2>;
  68                 };
  69
  70                 cpu1: cpu@1 {
  71                         device_type = "cpu";
  72                         compatible = "arm,cortex-a53", "arm,armv8";
  73                         reg = <0x0 0x1>;
  74                         enable-method = "psci";
  75                         next-level-cache = <&l2>;
  76                 };
  77
  78                 cpu2: cpu@2 {
  79                         device_type = "cpu";
  80                         compatible = "arm,cortex-a53", "arm,armv8";
  81                         reg = <0x0 0x2>;
  82                         enable-method = "psci";
  83                         next-level-cache = <&l2>;
  84                 };
  85
  86                 cpu3: cpu@3 {
  87                         device_type = "cpu";
  88                         compatible = "arm,cortex-a53", "arm,armv8";
  89                         reg = <0x0 0x3>;
  90                         enable-method = "psci";
  91                         next-level-cache = <&l2>;
  92                 };
  93
  94                 l2: l2-cache0 {
  95                         compatible = "cache";
  96                 };
  97         };
  98
  99         arm-pmu {
 100                 compatible = "arm,cortex-a53-pmu";
 101                 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 102                              <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
 103                              <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
 104                              <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 105                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 106         };
 107
 108         psci {
 109                 compatible = "arm,psci-0.2";
 110                 method = "smc";
 111         };
 112
 113         timer {
 114                 compatible = "arm,armv8-timer";
 115                 interrupts = <GIC_PPI 13
 116                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
 117                              <GIC_PPI 14
 118                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
 119                              <GIC_PPI 11
 120                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
 121                              <GIC_PPI 10
 122                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
 123         };
 124
 125         xtal: xtal-clk {
 126                 compatible = "fixed-clock";
 127                 clock-frequency = <24000000>;
 128                 clock-output-names = "xtal";
 129                 #clock-cells = <0>;
 130         };
 131
 132         firmware {
 133                 sm: secure-monitor {
 134                         compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
 135                 };
 136         };
 137
 138         efuse: efuse {
 139                 compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
 140                 #address-cells = <1>;
 141                 #size-cells = <1>;
 142
 143                 sn: sn@14 {
 144                         reg = <0x14 0x10>;
 145                 };
 146
 147                 eth_mac: eth_mac@34 {
 148                         reg = <0x34 0x10>;
 149                 };
 150
 151                 bid: bid@46 {
 152                         reg = <0x46 0x30>;
 153                 };
 154         };
 155
 156         soc {
 157                 compatible = "simple-bus";
 158                 #address-cells = <2>;
 159                 #size-cells = <2>;
 160                 ranges;
 161
 162                 cbus: cbus@c1100000 {
 163                         compatible = "simple-bus";
 164                         reg = <0x0 0xc1100000 0x0 0x100000>;
 165                         #address-cells = <2>;
 166                         #size-cells = <2>;
 167                         ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
 168
 169                         reset: reset-controller@4404 {
 170                                 compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
 171                                 reg = <0x0 0x04404 0x0 0x20>;
 172                                 #reset-cells = <1>;
 173                         };
 174
 175                         uart_A: serial@84c0 {
 176                                 compatible = "amlogic,meson-uart";
 177                                 reg = <0x0 0x84c0 0x0 0x14>;
 178                                 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
 179                                 clocks = <&xtal>;
 180                                 status = "disabled";
 181                         };
 182
 183                         uart_B: serial@84dc {
 184                                 compatible = "amlogic,meson-uart";
 185                                 reg = <0x0 0x84dc 0x0 0x14>;
 186                                 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
 187                                 clocks = <&xtal>;
 188                                 status = "disabled";
 189                         };
 190
 191                         i2c_A: i2c@8500 {
 192                                 compatible = "amlogic,meson-gxbb-i2c";
 193                                 reg = <0x0 0x08500 0x0 0x20>;
 194                                 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
 195                                 #address-cells = <1>;
 196                                 #size-cells = <0>;
 197                                 status = "disabled";
 198                         };
 199
 200                         pwm_ab: pwm@8550 {
 201                                 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
 202                                 reg = <0x0 0x08550 0x0 0x10>;
 203                                 #pwm-cells = <3>;
 204                                 status = "disabled";
 205                         };
 206
 207                         pwm_cd: pwm@8650 {
 208                                 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
 209                                 reg = <0x0 0x08650 0x0 0x10>;
 210                                 #pwm-cells = <3>;
 211                                 status = "disabled";
 212                         };
 213
 214                         pwm_ef: pwm@86c0 {
 215                                 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
 216                                 reg = <0x0 0x086c0 0x0 0x10>;
 217                                 #pwm-cells = <3>;
 218                                 status = "disabled";
 219                         };
 220
 221                         uart_C: serial@8700 {
 222                                 compatible = "amlogic,meson-uart";
 223                                 reg = <0x0 0x8700 0x0 0x14>;
 224                                 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
 225                                 clocks = <&xtal>;
 226                                 status = "disabled";
 227                         };
 228
 229                         i2c_B: i2c@87c0 {
 230                                 compatible = "amlogic,meson-gxbb-i2c";
 231                                 reg = <0x0 0x087c0 0x0 0x20>;
 232                                 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
 233                                 #address-cells = <1>;
 234                                 #size-cells = <0>;
 235                                 status = "disabled";
 236                         };
 237
 238                         i2c_C: i2c@87e0 {
 239                                 compatible = "amlogic,meson-gxbb-i2c";
 240                                 reg = <0x0 0x087e0 0x0 0x20>;
 241                                 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
 242                                 #address-cells = <1>;
 243                                 #size-cells = <0>;
 244                                 status = "disabled";
 245                         };
 246
 247                         watchdog@98d0 {
 248                                 compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";
 249                                 reg = <0x0 0x098d0 0x0 0x10>;
 250                                 clocks = <&xtal>;
 251                         };
 252                 };
 253
 254                 gic: interrupt-controller@c4301000 {
 255                         compatible = "arm,gic-400";
 256                         reg = <0x0 0xc4301000 0 0x1000>,
 257                               <0x0 0xc4302000 0 0x2000>,
 258                               <0x0 0xc4304000 0 0x2000>,
 259                               <0x0 0xc4306000 0 0x2000>;
 260                         interrupt-controller;
 261                         interrupts = <GIC_PPI 9
 262                                 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 263                         #interrupt-cells = <3>;
 264                         #address-cells = <0>;
 265                 };
 266
 267                 aobus: aobus@c8100000 {
 268                         compatible = "simple-bus";
 269                         reg = <0x0 0xc8100000 0x0 0x100000>;
 270                         #address-cells = <2>;
 271                         #size-cells = <2>;
 272                         ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
 273
 274                         uart_AO: serial@4c0 {
 275                                 compatible = "amlogic,meson-uart";
 276                                 reg = <0x0 0x004c0 0x0 0x14>;
 277                                 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
 278                                 clocks = <&xtal>;
 279                                 status = "disabled";
 280                         };
 281
 282                         ir: ir@580 {
 283                                 compatible = "amlogic,meson-gxbb-ir";
 284                                 reg = <0x0 0x00580 0x0 0x40>;
 285                                 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
 286                                 status = "disabled";
 287                         };
 288                 };
 289
 290                 periphs: periphs@c8834000 {
 291                         compatible = "simple-bus";
 292                         reg = <0x0 0xc8834000 0x0 0x2000>;
 293                         #address-cells = <2>;
 294                         #size-cells = <2>;
 295                         ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
 296
 297                         rng {
 298                                 compatible = "amlogic,meson-rng";
 299                                 reg = <0x0 0x0 0x0 0x4>;
 300                         };
 301                 };
 302
 303
 304                 hiubus: hiubus@c883c000 {
 305                         compatible = "simple-bus";
 306                         reg = <0x0 0xc883c000 0x0 0x2000>;
 307                         #address-cells = <2>;
 308                         #size-cells = <2>;
 309                         ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
 310
 311                         mailbox: mailbox@404 {
 312                                 compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
 313                                 reg = <0 0x404 0 0x4c>;
 314                                 interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
 315                                              <0 209 IRQ_TYPE_EDGE_RISING>,
 316                                              <0 210 IRQ_TYPE_EDGE_RISING>;
 317                                 #mbox-cells = <1>;
 318                         };
 319                 };
 320
 321                 ethmac: ethernet@c9410000 {
 322                         compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
 323                         reg = <0x0 0xc9410000 0x0 0x10000
 324                                0x0 0xc8834540 0x0 0x4>;
 325                         interrupts = <0 8 1>;
 326                         interrupt-names = "macirq";
 327                         phy-mode = "rgmii";
 328                         status = "disabled";
 329                 };
 330
 331                 apb: apb@d0000000 {
 332                         compatible = "simple-bus";
 333                         reg = <0x0 0xd0000000 0x0 0x200000>;
 334                         #address-cells = <2>;
 335                         #size-cells = <2>;
 336                         ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
 337
 338                         sd_emmc_a: mmc@70000 {
 339                                 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
 340                                 reg = <0x0 0x70000 0x0 0x2000>;
 341                                 interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
 342                                 status = "disabled";
 343                         };
 344
 345                         sd_emmc_b: mmc@72000 {
 346                                 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
 347                                 reg = <0x0 0x72000 0x0 0x2000>;
 348                                 interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
 349                                 status = "disabled";
 350                         };
 351
 352                         sd_emmc_c: mmc@74000 {
 353                                 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
 354                                 reg = <0x0 0x74000 0x0 0x2000>;
 355                                 interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
 356                                 status = "disabled";
 357                         };
 358                 };
 359
 360                 vpu: vpu@d0100000 {
 361                         compatible = "amlogic,meson-gx-vpu";
 362                         reg = <0x0 0xd0100000 0x0 0x100000>,
 363                               <0x0 0xc883c000 0x0 0x1000>,
 364                               <0x0 0xc8838000 0x0 0x1000>;
 365                         reg-names = "vpu", "hhi", "dmc";
 366                         interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
 367                         #address-cells = <1>;
 368                         #size-cells = <0>;
 369
 370                         /* CVBS VDAC output port */
 371                         cvbs_vdac_port: port@0 {
 372                                 reg = <0>;
 373                         };
 374                 };
 375         };
 376 };