arch/arm64/boot/dts/amlogic/meson-g12a.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
   4  */
   5
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/interrupt-controller/irq.h>
   8 #include <dt-bindings/interrupt-controller/arm-gic.h>
   9
  10 / {
  11         compatible = "amlogic,g12a";
  12
  13         interrupt-parent = <&gic>;
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         cpus {
  18                 #address-cells = <0x2>;
  19                 #size-cells = <0x0>;
  20
  21                 cpu0: cpu@0 {
  22                         device_type = "cpu";
  23                         compatible = "arm,cortex-a53";
  24                         reg = <0x0 0x0>;
  25                         enable-method = "psci";
  26                         next-level-cache = <&l2>;
  27                 };
  28
  29                 cpu1: cpu@1 {
  30                         device_type = "cpu";
  31                         compatible = "arm,cortex-a53";
  32                         reg = <0x0 0x1>;
  33                         enable-method = "psci";
  34                         next-level-cache = <&l2>;
  35                 };
  36
  37                 cpu2: cpu@2 {
  38                         device_type = "cpu";
  39                         compatible = "arm,cortex-a53";
  40                         reg = <0x0 0x2>;
  41                         enable-method = "psci";
  42                         next-level-cache = <&l2>;
  43                 };
  44
  45                 cpu3: cpu@3 {
  46                         device_type = "cpu";
  47                         compatible = "arm,cortex-a53";
  48                         reg = <0x0 0x3>;
  49                         enable-method = "psci";
  50                         next-level-cache = <&l2>;
  51                 };
  52
  53                 l2: l2-cache0 {
  54                         compatible = "cache";
  55                 };
  56         };
  57
  58         psci {
  59                 compatible = "arm,psci-1.0";
  60                 method = "smc";
  61         };
  62
  63         reserved-memory {
  64                 #address-cells = <2>;
  65                 #size-cells = <2>;
  66                 ranges;
  67
  68                 /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
  69                 secmon_reserved: secmon@5000000 {
  70                         reg = <0x0 0x05000000 0x0 0x300000>;
  71                         no-map;
  72                 };
  73         };
  74
  75         soc {
  76                 compatible = "simple-bus";
  77                 #address-cells = <2>;
  78                 #size-cells = <2>;
  79                 ranges;
  80
  81                 apb: bus@ff600000 {
  82                         compatible = "simple-bus";
  83                         reg = <0x0 0xff600000 0x0 0x200000>;
  84                         #address-cells = <2>;
  85                         #size-cells = <2>;
  86                         ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
  87
  88                         periphs: bus@34400 {
  89                                 compatible = "simple-bus";
  90                                 reg = <0x0 0x34400 0x0 0x400>;
  91                                 #address-cells = <2>;
  92                                 #size-cells = <2>;
  93                                 ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
  94                         };
  95
  96                         hiu: bus@3c000 {
  97                                 compatible = "simple-bus";
  98                                 reg = <0x0 0x3c000 0x0 0x1400>;
  99                                 #address-cells = <2>;
 100                                 #size-cells = <2>;
 101                                 ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
 102
 103                                 hhi: system-controller@0 {
 104                                         compatible = "amlogic,meson-gx-hhi-sysctrl",
 105                                                      "simple-mfd", "syscon";
 106                                         reg = <0 0 0 0x400>;
 107
 108                                         clkc: clock-controller {
 109                                                 compatible = "amlogic,g12a-clkc";
 110                                                 #clock-cells = <1>;
 111                                                 clocks = <&xtal>;
 112                                                 clock-names = "xtal";
 113                                         };
 114                                 };
 115                         };
 116                 };
 117
 118                 aobus: bus@ff800000 {
 119                         compatible = "simple-bus";
 120                         reg = <0x0 0xff800000 0x0 0x100000>;
 121                         #address-cells = <2>;
 122                         #size-cells = <2>;
 123                         ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
 124
 125                         uart_AO: serial@3000 {
 126                                 compatible = "amlogic,meson-gx-uart",
 127                                              "amlogic,meson-ao-uart";
 128                                 reg = <0x0 0x3000 0x0 0x18>;
 129                                 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
 130                                 clocks = <&xtal>, <&xtal>, <&xtal>;
 131                                 clock-names = "xtal", "pclk", "baud";
 132                                 status = "disabled";
 133                         };
 134
 135                         uart_AO_B: serial@4000 {
 136                                 compatible = "amlogic,meson-gx-uart",
 137                                              "amlogic,meson-ao-uart";
 138                                 reg = <0x0 0x4000 0x0 0x18>;
 139                                 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
 140                                 clocks = <&xtal>, <&xtal>, <&xtal>;
 141                                 clock-names = "xtal", "pclk", "baud";
 142                                 status = "disabled";
 143                         };
 144                 };
 145
 146                 gic: interrupt-controller@ffc01000 {
 147                         compatible = "arm,gic-400";
 148                         reg = <0x0 0xffc01000 0 0x1000>,
 149                               <0x0 0xffc02000 0 0x2000>,
 150                               <0x0 0xffc04000 0 0x2000>,
 151                               <0x0 0xffc06000 0 0x2000>;
 152                         interrupt-controller;
 153                         interrupts = <GIC_PPI 9
 154                                 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
 155                         #interrupt-cells = <3>;
 156                         #address-cells = <0>;
 157                 };
 158
 159                 cbus: bus@ffd00000 {
 160                         compatible = "simple-bus";
 161                         reg = <0x0 0xffd00000 0x0 0x100000>;
 162                         #address-cells = <2>;
 163                         #size-cells = <2>;
 164                         ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
 165
 166                         clk_msr: clock-measure@18000 {
 167                                 compatible = "amlogic,meson-g12a-clk-measure";
 168                                 reg = <0x0 0x18000 0x0 0x10>;
 169                         };
 170                 };
 171         };
 172
 173         timer {
 174                 compatible = "arm,armv8-timer";
 175                 interrupts = <GIC_PPI 13
 176                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
 177                              <GIC_PPI 14
 178                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
 179                              <GIC_PPI 11
 180                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
 181                              <GIC_PPI 10
 182                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
 183         };
 184
 185         xtal: xtal-clk {
 186                 compatible = "fixed-clock";
 187                 clock-frequency = <24000000>;
 188                 clock-output-names = "xtal";
 189                 #clock-cells = <0>;
 190         };
 191
 192 };