1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/axg-audio-clkc.h>
9 #include <dt-bindings/clock/g12a-clkc.h>
10 #include <dt-bindings/clock/g12a-aoclkc.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
15 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
18 interrupt-parent = <&gic>;
22 tdmif_a: audio-controller-0 {
23 compatible = "amlogic,axg-tdm-iface";
24 #sound-dai-cells = <0>;
25 sound-name-prefix = "TDM_A";
26 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
27 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
28 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
29 clock-names = "mclk", "sclk", "lrclk";
33 tdmif_b: audio-controller-1 {
34 compatible = "amlogic,axg-tdm-iface";
35 #sound-dai-cells = <0>;
36 sound-name-prefix = "TDM_B";
37 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
38 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
39 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
40 clock-names = "mclk", "sclk", "lrclk";
44 tdmif_c: audio-controller-2 {
45 compatible = "amlogic,axg-tdm-iface";
46 #sound-dai-cells = <0>;
47 sound-name-prefix = "TDM_C";
48 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
49 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
50 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
51 clock-names = "mclk", "sclk", "lrclk";
56 compatible = "amlogic,meson-gxbb-efuse";
57 clocks = <&clkc CLKID_EFUSE>;
64 compatible = "arm,psci-1.0";
73 /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
74 secmon_reserved: secmon@5000000 {
75 reg = <0x0 0x05000000 0x0 0x300000>;
80 compatible = "shared-dma-pool";
82 size = <0x0 0x10000000>;
83 alignment = <0x0 0x400000>;
89 compatible = "amlogic,meson-gxbb-sm";
93 compatible = "simple-bus";
98 ethmac: ethernet@ff3f0000 {
99 compatible = "amlogic,meson-axg-dwmac",
102 reg = <0x0 0xff3f0000 0x0 0x10000>,
103 <0x0 0xff634540 0x0 0x8>;
104 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
105 interrupt-names = "macirq";
106 clocks = <&clkc CLKID_ETH>,
107 <&clkc CLKID_FCLK_DIV2>,
109 clock-names = "stmmaceth", "clkin0", "clkin1";
110 rx-fifo-depth = <4096>;
111 tx-fifo-depth = <2048>;
115 #address-cells = <1>;
117 compatible = "snps,dwmac-mdio";
122 compatible = "simple-bus";
123 reg = <0x0 0xff600000 0x0 0x200000>;
124 #address-cells = <2>;
126 ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
129 compatible = "amlogic,meson-g12a-dw-hdmi";
130 reg = <0x0 0x0 0x0 0x10000>;
131 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
132 resets = <&reset RESET_HDMITX_CAPB3>,
133 <&reset RESET_HDMITX_PHY>,
134 <&reset RESET_HDMITX>;
135 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
136 clocks = <&clkc CLKID_HDMI>,
137 <&clkc CLKID_HTX_PCLK>,
138 <&clkc CLKID_VPU_INTR>;
139 clock-names = "isfr", "iahb", "venci";
140 #address-cells = <1>;
142 #sound-dai-cells = <0>;
146 hdmi_tx_venc_port: port@0 {
149 hdmi_tx_in: endpoint {
150 remote-endpoint = <&hdmi_tx_out>;
155 hdmi_tx_tmds_port: port@1 {
160 apb_efuse: bus@30000 {
161 compatible = "simple-bus";
162 reg = <0x0 0x30000 0x0 0x2000>;
163 #address-cells = <2>;
165 ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
168 compatible = "amlogic,meson-rng";
169 reg = <0x0 0x218 0x0 0x4>;
174 compatible = "simple-bus";
175 reg = <0x0 0x34400 0x0 0x400>;
176 #address-cells = <2>;
178 ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
180 periphs_pinctrl: pinctrl@40 {
181 compatible = "amlogic,meson-g12a-periphs-pinctrl";
182 #address-cells = <2>;
187 reg = <0x0 0x40 0x0 0x4c>,
189 <0x0 0x120 0x0 0x18>,
190 <0x0 0x2c0 0x0 0x40>,
191 <0x0 0x340 0x0 0x1c>;
199 gpio-ranges = <&periphs_pinctrl 0 0 86>;
202 cec_ao_a_h_pins: cec_ao_a_h {
204 groups = "cec_ao_a_h";
205 function = "cec_ao_a_h";
210 cec_ao_b_h_pins: cec_ao_b_h {
212 groups = "cec_ao_b_h";
213 function = "cec_ao_b_h";
220 groups = "emmc_nand_d0",
231 drive-strength-microamp = <4000>;
238 drive-strength-microamp = <4000>;
242 emmc_ds_pins: emmc-ds {
244 groups = "emmc_nand_ds";
247 drive-strength-microamp = <4000>;
251 emmc_clk_gate_pins: emmc_clk_gate {
254 function = "gpio_periphs";
256 drive-strength-microamp = <4000>;
260 hdmitx_ddc_pins: hdmitx_ddc {
262 groups = "hdmitx_sda",
266 drive-strength-microamp = <4000>;
270 hdmitx_hpd_pins: hdmitx_hpd {
272 groups = "hdmitx_hpd_in";
279 i2c0_sda_c_pins: i2c0-sda-c {
281 groups = "i2c0_sda_c";
284 drive-strength-microamp = <3000>;
289 i2c0_sck_c_pins: i2c0-sck-c {
291 groups = "i2c0_sck_c";
294 drive-strength-microamp = <3000>;
298 i2c0_sda_z0_pins: i2c0-sda-z0 {
300 groups = "i2c0_sda_z0";
303 drive-strength-microamp = <3000>;
307 i2c0_sck_z1_pins: i2c0-sck-z1 {
309 groups = "i2c0_sck_z1";
312 drive-strength-microamp = <3000>;
316 i2c0_sda_z7_pins: i2c0-sda-z7 {
318 groups = "i2c0_sda_z7";
321 drive-strength-microamp = <3000>;
325 i2c0_sda_z8_pins: i2c0-sda-z8 {
327 groups = "i2c0_sda_z8";
330 drive-strength-microamp = <3000>;
334 i2c1_sda_x_pins: i2c1-sda-x {
336 groups = "i2c1_sda_x";
339 drive-strength-microamp = <3000>;
343 i2c1_sck_x_pins: i2c1-sck-x {
345 groups = "i2c1_sck_x";
348 drive-strength-microamp = <3000>;
352 i2c1_sda_h2_pins: i2c1-sda-h2 {
354 groups = "i2c1_sda_h2";
357 drive-strength-microamp = <3000>;
361 i2c1_sck_h3_pins: i2c1-sck-h3 {
363 groups = "i2c1_sck_h3";
366 drive-strength-microamp = <3000>;
370 i2c1_sda_h6_pins: i2c1-sda-h6 {
372 groups = "i2c1_sda_h6";
375 drive-strength-microamp = <3000>;
379 i2c1_sck_h7_pins: i2c1-sck-h7 {
381 groups = "i2c1_sck_h7";
384 drive-strength-microamp = <3000>;
388 i2c2_sda_x_pins: i2c2-sda-x {
390 groups = "i2c2_sda_x";
393 drive-strength-microamp = <3000>;
397 i2c2_sck_x_pins: i2c2-sck-x {
399 groups = "i2c2_sck_x";
402 drive-strength-microamp = <3000>;
406 i2c2_sda_z_pins: i2c2-sda-z {
408 groups = "i2c2_sda_z";
411 drive-strength-microamp = <3000>;
415 i2c2_sck_z_pins: i2c2-sck-z {
417 groups = "i2c2_sck_z";
420 drive-strength-microamp = <3000>;
424 i2c3_sda_h_pins: i2c3-sda-h {
426 groups = "i2c3_sda_h";
429 drive-strength-microamp = <3000>;
433 i2c3_sck_h_pins: i2c3-sck-h {
435 groups = "i2c3_sck_h";
438 drive-strength-microamp = <3000>;
442 i2c3_sda_a_pins: i2c3-sda-a {
444 groups = "i2c3_sda_a";
447 drive-strength-microamp = <3000>;
451 i2c3_sck_a_pins: i2c3-sck-a {
453 groups = "i2c3_sck_a";
456 drive-strength-microamp = <3000>;
460 mclk0_a_pins: mclk0-a {
465 drive-strength-microamp = <3000>;
469 mclk1_a_pins: mclk1-a {
474 drive-strength-microamp = <3000>;
478 mclk1_x_pins: mclk1-x {
483 drive-strength-microamp = <3000>;
487 mclk1_z_pins: mclk1-z {
492 drive-strength-microamp = <3000>;
496 pdm_din0_a_pins: pdm-din0-a {
498 groups = "pdm_din0_a";
504 pdm_din0_c_pins: pdm-din0-c {
506 groups = "pdm_din0_c";
512 pdm_din0_x_pins: pdm-din0-x {
514 groups = "pdm_din0_x";
520 pdm_din0_z_pins: pdm-din0-z {
522 groups = "pdm_din0_z";
528 pdm_din1_a_pins: pdm-din1-a {
530 groups = "pdm_din1_a";
536 pdm_din1_c_pins: pdm-din1-c {
538 groups = "pdm_din1_c";
544 pdm_din1_x_pins: pdm-din1-x {
546 groups = "pdm_din1_x";
552 pdm_din1_z_pins: pdm-din1-z {
554 groups = "pdm_din1_z";
560 pdm_din2_a_pins: pdm-din2-a {
562 groups = "pdm_din2_a";
568 pdm_din2_c_pins: pdm-din2-c {
570 groups = "pdm_din2_c";
576 pdm_din2_x_pins: pdm-din2-x {
578 groups = "pdm_din2_x";
584 pdm_din2_z_pins: pdm-din2-z {
586 groups = "pdm_din2_z";
592 pdm_din3_a_pins: pdm-din3-a {
594 groups = "pdm_din3_a";
600 pdm_din3_c_pins: pdm-din3-c {
602 groups = "pdm_din3_c";
608 pdm_din3_x_pins: pdm-din3-x {
610 groups = "pdm_din3_x";
616 pdm_din3_z_pins: pdm-din3-z {
618 groups = "pdm_din3_z";
624 pdm_dclk_a_pins: pdm-dclk-a {
626 groups = "pdm_dclk_a";
629 drive-strength-microamp = <500>;
633 pdm_dclk_c_pins: pdm-dclk-c {
635 groups = "pdm_dclk_c";
638 drive-strength-microamp = <500>;
642 pdm_dclk_x_pins: pdm-dclk-x {
644 groups = "pdm_dclk_x";
647 drive-strength-microamp = <500>;
651 pdm_dclk_z_pins: pdm-dclk-z {
653 groups = "pdm_dclk_z";
656 drive-strength-microamp = <500>;
668 pwm_b_x7_pins: pwm-b-x7 {
676 pwm_b_x19_pins: pwm-b-x19 {
678 groups = "pwm_b_x19";
684 pwm_c_c_pins: pwm-c-c {
692 pwm_c_x5_pins: pwm-c-x5 {
700 pwm_c_x8_pins: pwm-c-x8 {
708 pwm_d_x3_pins: pwm-d-x3 {
716 pwm_d_x6_pins: pwm-d-x6 {
732 pwm_f_x_pins: pwm-f-x {
740 pwm_f_h_pins: pwm-f-h {
748 sdcard_c_pins: sdcard_c {
750 groups = "sdcard_d0_c",
757 drive-strength-microamp = <4000>;
761 groups = "sdcard_clk_c";
764 drive-strength-microamp = <4000>;
768 sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
771 function = "gpio_periphs";
773 drive-strength-microamp = <4000>;
777 sdcard_z_pins: sdcard_z {
779 groups = "sdcard_d0_z",
786 drive-strength-microamp = <4000>;
790 groups = "sdcard_clk_z";
793 drive-strength-microamp = <4000>;
797 sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
800 function = "gpio_periphs";
802 drive-strength-microamp = <4000>;
816 drive-strength-microamp = <4000>;
820 sdio_clk_gate_pins: sdio_clk_gate {
823 function = "gpio_periphs";
825 drive-strength-microamp = <4000>;
829 spdif_in_a10_pins: spdif-in-a10 {
831 groups = "spdif_in_a10";
832 function = "spdif_in";
837 spdif_in_a12_pins: spdif-in-a12 {
839 groups = "spdif_in_a12";
840 function = "spdif_in";
845 spdif_in_h_pins: spdif-in-h {
847 groups = "spdif_in_h";
848 function = "spdif_in";
853 spdif_out_h_pins: spdif-out-h {
855 groups = "spdif_out_h";
856 function = "spdif_out";
857 drive-strength-microamp = <500>;
862 spdif_out_a11_pins: spdif-out-a11 {
864 groups = "spdif_out_a11";
865 function = "spdif_out";
866 drive-strength-microamp = <500>;
871 spdif_out_a13_pins: spdif-out-a13 {
873 groups = "spdif_out_a13";
874 function = "spdif_out";
875 drive-strength-microamp = <500>;
880 tdm_a_din0_pins: tdm-a-din0 {
882 groups = "tdm_a_din0";
889 tdm_a_din1_pins: tdm-a-din1 {
891 groups = "tdm_a_din1";
897 tdm_a_dout0_pins: tdm-a-dout0 {
899 groups = "tdm_a_dout0";
902 drive-strength-microamp = <3000>;
906 tdm_a_dout1_pins: tdm-a-dout1 {
908 groups = "tdm_a_dout1";
911 drive-strength-microamp = <3000>;
915 tdm_a_fs_pins: tdm-a-fs {
920 drive-strength-microamp = <3000>;
924 tdm_a_sclk_pins: tdm-a-sclk {
926 groups = "tdm_a_sclk";
929 drive-strength-microamp = <3000>;
933 tdm_a_slv_fs_pins: tdm-a-slv-fs {
935 groups = "tdm_a_slv_fs";
942 tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
944 groups = "tdm_a_slv_sclk";
950 tdm_b_din0_pins: tdm-b-din0 {
952 groups = "tdm_b_din0";
958 tdm_b_din1_pins: tdm-b-din1 {
960 groups = "tdm_b_din1";
966 tdm_b_din2_pins: tdm-b-din2 {
968 groups = "tdm_b_din2";
974 tdm_b_din3_a_pins: tdm-b-din3-a {
976 groups = "tdm_b_din3_a";
982 tdm_b_din3_h_pins: tdm-b-din3-h {
984 groups = "tdm_b_din3_h";
990 tdm_b_dout0_pins: tdm-b-dout0 {
992 groups = "tdm_b_dout0";
995 drive-strength-microamp = <3000>;
999 tdm_b_dout1_pins: tdm-b-dout1 {
1001 groups = "tdm_b_dout1";
1004 drive-strength-microamp = <3000>;
1008 tdm_b_dout2_pins: tdm-b-dout2 {
1010 groups = "tdm_b_dout2";
1013 drive-strength-microamp = <3000>;
1017 tdm_b_dout3_a_pins: tdm-b-dout3-a {
1019 groups = "tdm_b_dout3_a";
1022 drive-strength-microamp = <3000>;
1026 tdm_b_dout3_h_pins: tdm-b-dout3-h {
1028 groups = "tdm_b_dout3_h";
1031 drive-strength-microamp = <3000>;
1035 tdm_b_fs_pins: tdm-b-fs {
1037 groups = "tdm_b_fs";
1040 drive-strength-microamp = <3000>;
1044 tdm_b_sclk_pins: tdm-b-sclk {
1046 groups = "tdm_b_sclk";
1049 drive-strength-microamp = <3000>;
1053 tdm_b_slv_fs_pins: tdm-b-slv-fs {
1055 groups = "tdm_b_slv_fs";
1061 tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
1063 groups = "tdm_b_slv_sclk";
1069 tdm_c_din0_a_pins: tdm-c-din0-a {
1071 groups = "tdm_c_din0_a";
1077 tdm_c_din0_z_pins: tdm-c-din0-z {
1079 groups = "tdm_c_din0_z";
1085 tdm_c_din1_a_pins: tdm-c-din1-a {
1087 groups = "tdm_c_din1_a";
1093 tdm_c_din1_z_pins: tdm-c-din1-z {
1095 groups = "tdm_c_din1_z";
1101 tdm_c_din2_a_pins: tdm-c-din2-a {
1103 groups = "tdm_c_din2_a";
1109 eth_leds_pins: eth-leds {
1111 groups = "eth_link_led",
1120 groups = "eth_mdio",
1130 drive-strength-microamp = <4000>;
1135 eth_rgmii_pins: eth-rgmii {
1137 groups = "eth_rxd2_rgmii",
1143 drive-strength-microamp = <4000>;
1148 tdm_c_din2_z_pins: tdm-c-din2-z {
1150 groups = "tdm_c_din2_z";
1156 tdm_c_din3_a_pins: tdm-c-din3-a {
1158 groups = "tdm_c_din3_a";
1164 tdm_c_din3_z_pins: tdm-c-din3-z {
1166 groups = "tdm_c_din3_z";
1172 tdm_c_dout0_a_pins: tdm-c-dout0-a {
1174 groups = "tdm_c_dout0_a";
1177 drive-strength-microamp = <3000>;
1181 tdm_c_dout0_z_pins: tdm-c-dout0-z {
1183 groups = "tdm_c_dout0_z";
1186 drive-strength-microamp = <3000>;
1190 tdm_c_dout1_a_pins: tdm-c-dout1-a {
1192 groups = "tdm_c_dout1_a";
1195 drive-strength-microamp = <3000>;
1199 tdm_c_dout1_z_pins: tdm-c-dout1-z {
1201 groups = "tdm_c_dout1_z";
1204 drive-strength-microamp = <3000>;
1208 tdm_c_dout2_a_pins: tdm-c-dout2-a {
1210 groups = "tdm_c_dout2_a";
1213 drive-strength-microamp = <3000>;
1217 tdm_c_dout2_z_pins: tdm-c-dout2-z {
1219 groups = "tdm_c_dout2_z";
1222 drive-strength-microamp = <3000>;
1226 tdm_c_dout3_a_pins: tdm-c-dout3-a {
1228 groups = "tdm_c_dout3_a";
1231 drive-strength-microamp = <3000>;
1235 tdm_c_dout3_z_pins: tdm-c-dout3-z {
1237 groups = "tdm_c_dout3_z";
1240 drive-strength-microamp = <3000>;
1244 tdm_c_fs_a_pins: tdm-c-fs-a {
1246 groups = "tdm_c_fs_a";
1249 drive-strength-microamp = <3000>;
1253 tdm_c_fs_z_pins: tdm-c-fs-z {
1255 groups = "tdm_c_fs_z";
1258 drive-strength-microamp = <3000>;
1262 tdm_c_sclk_a_pins: tdm-c-sclk-a {
1264 groups = "tdm_c_sclk_a";
1267 drive-strength-microamp = <3000>;
1271 tdm_c_sclk_z_pins: tdm-c-sclk-z {
1273 groups = "tdm_c_sclk_z";
1276 drive-strength-microamp = <3000>;
1280 tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
1282 groups = "tdm_c_slv_fs_a";
1288 tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
1290 groups = "tdm_c_slv_fs_z";
1296 tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
1298 groups = "tdm_c_slv_sclk_a";
1304 tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
1306 groups = "tdm_c_slv_sclk_z";
1312 uart_a_pins: uart-a {
1314 groups = "uart_a_tx",
1316 function = "uart_a";
1321 uart_a_cts_rts_pins: uart-a-cts-rts {
1323 groups = "uart_a_cts",
1325 function = "uart_a";
1330 uart_b_pins: uart-b {
1332 groups = "uart_b_tx",
1334 function = "uart_b";
1339 uart_c_pins: uart-c {
1341 groups = "uart_c_tx",
1343 function = "uart_c";
1348 uart_c_cts_rts_pins: uart-c-cts-rts {
1350 groups = "uart_c_cts",
1352 function = "uart_c";
1359 usb2_phy0: phy@36000 {
1360 compatible = "amlogic,g12a-usb2-phy";
1361 reg = <0x0 0x36000 0x0 0x2000>;
1363 clock-names = "xtal";
1364 resets = <&reset RESET_USB_PHY20>;
1365 reset-names = "phy";
1370 compatible = "simple-bus";
1371 reg = <0x0 0x38000 0x0 0x400>;
1372 #address-cells = <2>;
1374 ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
1376 canvas: video-lut@48 {
1377 compatible = "amlogic,canvas";
1378 reg = <0x0 0x48 0x0 0x14>;
1382 usb2_phy1: phy@3a000 {
1383 compatible = "amlogic,g12a-usb2-phy";
1384 reg = <0x0 0x3a000 0x0 0x2000>;
1386 clock-names = "xtal";
1387 resets = <&reset RESET_USB_PHY21>;
1388 reset-names = "phy";
1393 compatible = "simple-bus";
1394 reg = <0x0 0x3c000 0x0 0x1400>;
1395 #address-cells = <2>;
1397 ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
1399 hhi: system-controller@0 {
1400 compatible = "amlogic,meson-gx-hhi-sysctrl",
1401 "simple-mfd", "syscon";
1402 reg = <0 0 0 0x400>;
1404 clkc: clock-controller {
1405 compatible = "amlogic,g12a-clkc";
1408 clock-names = "xtal";
1411 pwrc: power-controller {
1412 compatible = "amlogic,meson-g12a-pwrc";
1413 #power-domain-cells = <1>;
1414 amlogic,ao-sysctrl = <&rti>;
1415 resets = <&reset RESET_VIU>,
1416 <&reset RESET_VENC>,
1417 <&reset RESET_VCBUS>,
1418 <&reset RESET_BT656>,
1419 <&reset RESET_RDMA>,
1420 <&reset RESET_VENCI>,
1421 <&reset RESET_VENCP>,
1422 <&reset RESET_VDAC>,
1423 <&reset RESET_VDI6>,
1424 <&reset RESET_VENCL>,
1425 <&reset RESET_VID_LOCK>;
1426 reset-names = "viu", "venc", "vcbus", "bt656",
1427 "rdma", "venci", "vencp", "vdac",
1428 "vdi6", "vencl", "vid_lock";
1429 clocks = <&clkc CLKID_VPU>,
1431 clock-names = "vpu", "vapb";
1433 * VPU clocking is provided by two identical clock paths
1434 * VPU_0 and VPU_1 muxed to a single clock by a glitch
1435 * free mux to safely change frequency while running.
1436 * Same for VAPB but with a final gate after the glitch free mux.
1438 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
1439 <&clkc CLKID_VPU_0>,
1440 <&clkc CLKID_VPU>, /* Glitch free mux */
1441 <&clkc CLKID_VAPB_0_SEL>,
1442 <&clkc CLKID_VAPB_0>,
1443 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
1444 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
1445 <0>, /* Do Nothing */
1446 <&clkc CLKID_VPU_0>,
1447 <&clkc CLKID_FCLK_DIV4>,
1448 <0>, /* Do Nothing */
1449 <&clkc CLKID_VAPB_0>;
1450 assigned-clock-rates = <0>, /* Do Nothing */
1452 <0>, /* Do Nothing */
1453 <0>, /* Do Nothing */
1455 <0>; /* Do Nothing */
1460 pdm: audio-controller@40000 {
1461 compatible = "amlogic,g12a-pdm",
1463 reg = <0x0 0x40000 0x0 0x34>;
1464 #sound-dai-cells = <0>;
1465 sound-name-prefix = "PDM";
1466 clocks = <&clkc_audio AUD_CLKID_PDM>,
1467 <&clkc_audio AUD_CLKID_PDM_DCLK>,
1468 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
1469 clock-names = "pclk", "dclk", "sysclk";
1470 status = "disabled";
1474 compatible = "simple-bus";
1475 reg = <0x0 0x42000 0x0 0x2000>;
1476 #address-cells = <2>;
1478 ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
1480 clkc_audio: clock-controller@0 {
1481 status = "disabled";
1482 compatible = "amlogic,g12a-audio-clkc";
1483 reg = <0x0 0x0 0x0 0xb4>;
1487 clocks = <&clkc CLKID_AUDIO>,
1488 <&clkc CLKID_MPLL0>,
1489 <&clkc CLKID_MPLL1>,
1490 <&clkc CLKID_MPLL2>,
1491 <&clkc CLKID_MPLL3>,
1492 <&clkc CLKID_HIFI_PLL>,
1493 <&clkc CLKID_FCLK_DIV3>,
1494 <&clkc CLKID_FCLK_DIV4>,
1495 <&clkc CLKID_GP0_PLL>;
1496 clock-names = "pclk",
1506 resets = <&reset RESET_AUDIO>;
1509 toddr_a: audio-controller@100 {
1510 compatible = "amlogic,g12a-toddr",
1511 "amlogic,axg-toddr";
1512 reg = <0x0 0x100 0x0 0x1c>;
1513 #sound-dai-cells = <0>;
1514 sound-name-prefix = "TODDR_A";
1515 interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
1516 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
1517 resets = <&arb AXG_ARB_TODDR_A>;
1518 status = "disabled";
1521 toddr_b: audio-controller@140 {
1522 compatible = "amlogic,g12a-toddr",
1523 "amlogic,axg-toddr";
1524 reg = <0x0 0x140 0x0 0x1c>;
1525 #sound-dai-cells = <0>;
1526 sound-name-prefix = "TODDR_B";
1527 interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
1528 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
1529 resets = <&arb AXG_ARB_TODDR_B>;
1530 status = "disabled";
1533 toddr_c: audio-controller@180 {
1534 compatible = "amlogic,g12a-toddr",
1535 "amlogic,axg-toddr";
1536 reg = <0x0 0x180 0x0 0x1c>;
1537 #sound-dai-cells = <0>;
1538 sound-name-prefix = "TODDR_C";
1539 interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
1540 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
1541 resets = <&arb AXG_ARB_TODDR_C>;
1542 status = "disabled";
1545 frddr_a: audio-controller@1c0 {
1546 compatible = "amlogic,g12a-frddr",
1547 "amlogic,axg-frddr";
1548 reg = <0x0 0x1c0 0x0 0x1c>;
1549 #sound-dai-cells = <0>;
1550 sound-name-prefix = "FRDDR_A";
1551 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
1552 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
1553 resets = <&arb AXG_ARB_FRDDR_A>;
1554 status = "disabled";
1557 frddr_b: audio-controller@200 {
1558 compatible = "amlogic,g12a-frddr",
1559 "amlogic,axg-frddr";
1560 reg = <0x0 0x200 0x0 0x1c>;
1561 #sound-dai-cells = <0>;
1562 sound-name-prefix = "FRDDR_B";
1563 interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
1564 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
1565 resets = <&arb AXG_ARB_FRDDR_B>;
1566 status = "disabled";
1569 frddr_c: audio-controller@240 {
1570 compatible = "amlogic,g12a-frddr",
1571 "amlogic,axg-frddr";
1572 reg = <0x0 0x240 0x0 0x1c>;
1573 #sound-dai-cells = <0>;
1574 sound-name-prefix = "FRDDR_C";
1575 interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
1576 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
1577 resets = <&arb AXG_ARB_FRDDR_C>;
1578 status = "disabled";
1581 arb: reset-controller@280 {
1582 status = "disabled";
1583 compatible = "amlogic,meson-axg-audio-arb";
1584 reg = <0x0 0x280 0x0 0x4>;
1586 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
1589 tdmin_a: audio-controller@300 {
1590 compatible = "amlogic,g12a-tdmin",
1591 "amlogic,axg-tdmin";
1592 reg = <0x0 0x300 0x0 0x40>;
1593 sound-name-prefix = "TDMIN_A";
1594 resets = <&clkc_audio AUD_RESET_TDMIN_A>;
1595 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
1596 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
1597 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
1598 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
1599 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
1600 clock-names = "pclk", "sclk", "sclk_sel",
1601 "lrclk", "lrclk_sel";
1602 status = "disabled";
1605 tdmin_b: audio-controller@340 {
1606 compatible = "amlogic,g12a-tdmin",
1607 "amlogic,axg-tdmin";
1608 reg = <0x0 0x340 0x0 0x40>;
1609 sound-name-prefix = "TDMIN_B";
1610 resets = <&clkc_audio AUD_RESET_TDMIN_B>;
1611 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
1612 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
1613 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
1614 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
1615 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
1616 clock-names = "pclk", "sclk", "sclk_sel",
1617 "lrclk", "lrclk_sel";
1618 status = "disabled";
1621 tdmin_c: audio-controller@380 {
1622 compatible = "amlogic,g12a-tdmin",
1623 "amlogic,axg-tdmin";
1624 reg = <0x0 0x380 0x0 0x40>;
1625 sound-name-prefix = "TDMIN_C";
1626 resets = <&clkc_audio AUD_RESET_TDMIN_C>;
1627 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
1628 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
1629 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
1630 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
1631 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
1632 clock-names = "pclk", "sclk", "sclk_sel",
1633 "lrclk", "lrclk_sel";
1634 status = "disabled";
1637 tdmin_lb: audio-controller@3c0 {
1638 compatible = "amlogic,g12a-tdmin",
1639 "amlogic,axg-tdmin";
1640 reg = <0x0 0x3c0 0x0 0x40>;
1641 sound-name-prefix = "TDMIN_LB";
1642 resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
1643 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
1644 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
1645 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
1646 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
1647 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
1648 clock-names = "pclk", "sclk", "sclk_sel",
1649 "lrclk", "lrclk_sel";
1650 status = "disabled";
1653 spdifin: audio-controller@400 {
1654 compatible = "amlogic,g12a-spdifin",
1655 "amlogic,axg-spdifin";
1656 reg = <0x0 0x400 0x0 0x30>;
1657 #sound-dai-cells = <0>;
1658 sound-name-prefix = "SPDIFIN";
1659 interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
1660 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
1661 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
1662 clock-names = "pclk", "refclk";
1663 status = "disabled";
1666 spdifout: audio-controller@480 {
1667 compatible = "amlogic,g12a-spdifout",
1668 "amlogic,axg-spdifout";
1669 reg = <0x0 0x480 0x0 0x50>;
1670 #sound-dai-cells = <0>;
1671 sound-name-prefix = "SPDIFOUT";
1672 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
1673 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
1674 clock-names = "pclk", "mclk";
1675 status = "disabled";
1678 tdmout_a: audio-controller@500 {
1679 compatible = "amlogic,g12a-tdmout";
1680 reg = <0x0 0x500 0x0 0x40>;
1681 sound-name-prefix = "TDMOUT_A";
1682 resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
1683 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
1684 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
1685 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
1686 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
1687 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
1688 clock-names = "pclk", "sclk", "sclk_sel",
1689 "lrclk", "lrclk_sel";
1690 status = "disabled";
1693 tdmout_b: audio-controller@540 {
1694 compatible = "amlogic,g12a-tdmout";
1695 reg = <0x0 0x540 0x0 0x40>;
1696 sound-name-prefix = "TDMOUT_B";
1697 resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
1698 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
1699 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
1700 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
1701 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
1702 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
1703 clock-names = "pclk", "sclk", "sclk_sel",
1704 "lrclk", "lrclk_sel";
1705 status = "disabled";
1708 tdmout_c: audio-controller@580 {
1709 compatible = "amlogic,g12a-tdmout";
1710 reg = <0x0 0x580 0x0 0x40>;
1711 sound-name-prefix = "TDMOUT_C";
1712 resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
1713 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
1714 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
1715 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
1716 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
1717 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
1718 clock-names = "pclk", "sclk", "sclk_sel",
1719 "lrclk", "lrclk_sel";
1720 status = "disabled";
1723 spdifout_b: audio-controller@680 {
1724 compatible = "amlogic,g12a-spdifout",
1725 "amlogic,axg-spdifout";
1726 reg = <0x0 0x680 0x0 0x50>;
1727 #sound-dai-cells = <0>;
1728 sound-name-prefix = "SPDIFOUT_B";
1729 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
1730 <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
1731 clock-names = "pclk", "mclk";
1732 status = "disabled";
1735 tohdmitx: audio-controller@744 {
1736 compatible = "amlogic,g12a-tohdmitx";
1737 reg = <0x0 0x744 0x0 0x4>;
1738 #sound-dai-cells = <1>;
1739 sound-name-prefix = "TOHDMITX";
1740 status = "disabled";
1744 usb3_pcie_phy: phy@46000 {
1745 compatible = "amlogic,g12a-usb3-pcie-phy";
1746 reg = <0x0 0x46000 0x0 0x2000>;
1747 clocks = <&clkc CLKID_PCIE_PLL>;
1748 clock-names = "ref_clk";
1749 resets = <&reset RESET_PCIE_PHY>;
1750 reset-names = "phy";
1751 assigned-clocks = <&clkc CLKID_PCIE_PLL>;
1752 assigned-clock-rates = <100000000>;
1756 eth_phy: mdio-multiplexer@4c000 {
1757 compatible = "amlogic,g12a-mdio-mux";
1758 reg = <0x0 0x4c000 0x0 0xa4>;
1759 clocks = <&clkc CLKID_ETH_PHY>,
1761 <&clkc CLKID_MPLL_50M>;
1762 clock-names = "pclk", "clkin0", "clkin1";
1763 mdio-parent-bus = <&mdio0>;
1764 #address-cells = <1>;
1769 #address-cells = <1>;
1775 #address-cells = <1>;
1778 internal_ephy: ethernet_phy@8 {
1779 compatible = "ethernet-phy-id0180.3301",
1780 "ethernet-phy-ieee802.3-c22";
1781 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
1789 aobus: bus@ff800000 {
1790 compatible = "simple-bus";
1791 reg = <0x0 0xff800000 0x0 0x100000>;
1792 #address-cells = <2>;
1794 ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
1797 compatible = "amlogic,meson-gx-ao-sysctrl",
1798 "simple-mfd", "syscon";
1799 reg = <0x0 0x0 0x0 0x100>;
1800 #address-cells = <2>;
1802 ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
1804 clkc_AO: clock-controller {
1805 compatible = "amlogic,meson-g12a-aoclkc";
1808 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1809 clock-names = "xtal", "mpeg-clk";
1812 ao_pinctrl: pinctrl@14 {
1813 compatible = "amlogic,meson-g12a-aobus-pinctrl";
1814 #address-cells = <2>;
1819 reg = <0x0 0x14 0x0 0x8>,
1821 <0x0 0x24 0x0 0x14>;
1827 gpio-ranges = <&ao_pinctrl 0 0 15>;
1830 i2c_ao_sck_pins: i2c_ao_sck_pins {
1832 groups = "i2c_ao_sck";
1833 function = "i2c_ao";
1835 drive-strength-microamp = <3000>;
1839 i2c_ao_sda_pins: i2c_ao_sda {
1841 groups = "i2c_ao_sda";
1842 function = "i2c_ao";
1844 drive-strength-microamp = <3000>;
1848 i2c_ao_sck_e_pins: i2c_ao_sck_e {
1850 groups = "i2c_ao_sck_e";
1851 function = "i2c_ao";
1853 drive-strength-microamp = <3000>;
1857 i2c_ao_sda_e_pins: i2c_ao_sda_e {
1859 groups = "i2c_ao_sda_e";
1860 function = "i2c_ao";
1862 drive-strength-microamp = <3000>;
1866 mclk0_ao_pins: mclk0-ao {
1868 groups = "mclk0_ao";
1869 function = "mclk0_ao";
1871 drive-strength-microamp = <3000>;
1875 tdm_ao_b_din0_pins: tdm-ao-b-din0 {
1877 groups = "tdm_ao_b_din0";
1878 function = "tdm_ao_b";
1883 spdif_ao_out_pins: spdif-ao-out {
1885 groups = "spdif_ao_out";
1886 function = "spdif_ao_out";
1887 drive-strength-microamp = <500>;
1892 tdm_ao_b_din1_pins: tdm-ao-b-din1 {
1894 groups = "tdm_ao_b_din1";
1895 function = "tdm_ao_b";
1900 tdm_ao_b_din2_pins: tdm-ao-b-din2 {
1902 groups = "tdm_ao_b_din2";
1903 function = "tdm_ao_b";
1908 tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
1910 groups = "tdm_ao_b_dout0";
1911 function = "tdm_ao_b";
1913 drive-strength-microamp = <3000>;
1917 tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
1919 groups = "tdm_ao_b_dout1";
1920 function = "tdm_ao_b";
1922 drive-strength-microamp = <3000>;
1926 tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
1928 groups = "tdm_ao_b_dout2";
1929 function = "tdm_ao_b";
1931 drive-strength-microamp = <3000>;
1935 tdm_ao_b_fs_pins: tdm-ao-b-fs {
1937 groups = "tdm_ao_b_fs";
1938 function = "tdm_ao_b";
1940 drive-strength-microamp = <3000>;
1944 tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
1946 groups = "tdm_ao_b_sclk";
1947 function = "tdm_ao_b";
1949 drive-strength-microamp = <3000>;
1953 tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
1955 groups = "tdm_ao_b_slv_fs";
1956 function = "tdm_ao_b";
1961 tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
1963 groups = "tdm_ao_b_slv_sclk";
1964 function = "tdm_ao_b";
1969 uart_ao_a_pins: uart-a-ao {
1971 groups = "uart_ao_a_tx",
1973 function = "uart_ao_a";
1978 uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts {
1980 groups = "uart_ao_a_cts",
1982 function = "uart_ao_a";
1987 pwm_a_e_pins: pwm-a-e {
1990 function = "pwm_a_e";
1995 pwm_ao_a_pins: pwm-ao-a {
1997 groups = "pwm_ao_a";
1998 function = "pwm_ao_a";
2003 pwm_ao_b_pins: pwm-ao-b {
2005 groups = "pwm_ao_b";
2006 function = "pwm_ao_b";
2011 pwm_ao_c_4_pins: pwm-ao-c-4 {
2013 groups = "pwm_ao_c_4";
2014 function = "pwm_ao_c";
2019 pwm_ao_c_6_pins: pwm-ao-c-6 {
2021 groups = "pwm_ao_c_6";
2022 function = "pwm_ao_c";
2027 pwm_ao_d_5_pins: pwm-ao-d-5 {
2029 groups = "pwm_ao_d_5";
2030 function = "pwm_ao_d";
2035 pwm_ao_d_10_pins: pwm-ao-d-10 {
2037 groups = "pwm_ao_d_10";
2038 function = "pwm_ao_d";
2043 pwm_ao_d_e_pins: pwm-ao-d-e {
2045 groups = "pwm_ao_d_e";
2046 function = "pwm_ao_d";
2050 remote_input_ao_pins: remote-input-ao {
2052 groups = "remote_ao_input";
2053 function = "remote_ao_input";
2061 compatible = "amlogic,meson-vrtc";
2062 reg = <0x0 0x000a8 0x0 0x4>;
2066 compatible = "amlogic,meson-gx-ao-cec";
2067 reg = <0x0 0x00100 0x0 0x14>;
2068 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
2069 clocks = <&clkc_AO CLKID_AO_CEC>;
2070 clock-names = "core";
2071 status = "disabled";
2074 sec_AO: ao-secure@140 {
2075 compatible = "amlogic,meson-gx-ao-secure", "syscon";
2076 reg = <0x0 0x140 0x0 0x140>;
2077 amlogic,has-chip-id;
2081 compatible = "amlogic,meson-g12a-ao-cec";
2082 reg = <0x0 0x00280 0x0 0x1c>;
2083 interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
2084 clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>;
2085 clock-names = "oscin";
2086 status = "disabled";
2089 pwm_AO_cd: pwm@2000 {
2090 compatible = "amlogic,meson-g12a-ao-pwm-cd";
2091 reg = <0x0 0x2000 0x0 0x20>;
2093 status = "disabled";
2096 uart_AO: serial@3000 {
2097 compatible = "amlogic,meson-gx-uart",
2098 "amlogic,meson-ao-uart";
2099 reg = <0x0 0x3000 0x0 0x18>;
2100 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
2101 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
2102 clock-names = "xtal", "pclk", "baud";
2103 status = "disabled";
2106 uart_AO_B: serial@4000 {
2107 compatible = "amlogic,meson-gx-uart",
2108 "amlogic,meson-ao-uart";
2109 reg = <0x0 0x4000 0x0 0x18>;
2110 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
2111 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
2112 clock-names = "xtal", "pclk", "baud";
2113 status = "disabled";
2117 compatible = "amlogic,meson-axg-i2c";
2118 status = "disabled";
2119 reg = <0x0 0x05000 0x0 0x20>;
2120 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
2121 #address-cells = <1>;
2123 clocks = <&clkc CLKID_I2C>;
2126 pwm_AO_ab: pwm@7000 {
2127 compatible = "amlogic,meson-g12a-ao-pwm-ab";
2128 reg = <0x0 0x7000 0x0 0x20>;
2130 status = "disabled";
2134 compatible = "amlogic,meson-gxbb-ir";
2135 reg = <0x0 0x8000 0x0 0x20>;
2136 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
2137 status = "disabled";
2141 compatible = "amlogic,meson-g12a-saradc",
2142 "amlogic,meson-saradc";
2143 reg = <0x0 0x9000 0x0 0x48>;
2144 #io-channel-cells = <1>;
2145 interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
2147 <&clkc_AO CLKID_AO_SAR_ADC>,
2148 <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
2149 <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
2150 clock-names = "clkin", "core", "adc_clk", "adc_sel";
2151 status = "disabled";
2156 compatible = "amlogic,meson-g12a-vpu";
2157 reg = <0x0 0xff900000 0x0 0x100000>,
2158 <0x0 0xff63c000 0x0 0x1000>;
2159 reg-names = "vpu", "hhi";
2160 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
2161 #address-cells = <1>;
2163 amlogic,canvas = <&canvas>;
2165 /* CVBS VDAC output port */
2166 cvbs_vdac_port: port@0 {
2170 /* HDMI-TX output port */
2171 hdmi_tx_port: port@1 {
2174 hdmi_tx_out: endpoint {
2175 remote-endpoint = <&hdmi_tx_in>;
2180 gic: interrupt-controller@ffc01000 {
2181 compatible = "arm,gic-400";
2182 reg = <0x0 0xffc01000 0 0x1000>,
2183 <0x0 0xffc02000 0 0x2000>,
2184 <0x0 0xffc04000 0 0x2000>,
2185 <0x0 0xffc06000 0 0x2000>;
2186 interrupt-controller;
2187 interrupts = <GIC_PPI 9
2188 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2189 #interrupt-cells = <3>;
2190 #address-cells = <0>;
2193 cbus: bus@ffd00000 {
2194 compatible = "simple-bus";
2195 reg = <0x0 0xffd00000 0x0 0x100000>;
2196 #address-cells = <2>;
2198 ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
2200 reset: reset-controller@1004 {
2201 compatible = "amlogic,meson-axg-reset";
2202 reg = <0x0 0x1004 0x0 0x9c>;
2206 gpio_intc: interrupt-controller@f080 {
2207 compatible = "amlogic,meson-g12a-gpio-intc",
2208 "amlogic,meson-gpio-intc";
2209 reg = <0x0 0xf080 0x0 0x10>;
2210 interrupt-controller;
2211 #interrupt-cells = <2>;
2212 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
2216 compatible = "amlogic,meson-g12a-ee-pwm";
2217 reg = <0x0 0x19000 0x0 0x20>;
2219 status = "disabled";
2223 compatible = "amlogic,meson-g12a-ee-pwm";
2224 reg = <0x0 0x1a000 0x0 0x20>;
2226 status = "disabled";
2230 compatible = "amlogic,meson-g12a-ee-pwm";
2231 reg = <0x0 0x1b000 0x0 0x20>;
2233 status = "disabled";
2237 compatible = "amlogic,meson-axg-i2c";
2238 status = "disabled";
2239 reg = <0x0 0x1c000 0x0 0x20>;
2240 interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
2241 #address-cells = <1>;
2243 clocks = <&clkc CLKID_I2C>;
2247 compatible = "amlogic,meson-axg-i2c";
2248 status = "disabled";
2249 reg = <0x0 0x1d000 0x0 0x20>;
2250 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
2251 #address-cells = <1>;
2253 clocks = <&clkc CLKID_I2C>;
2257 compatible = "amlogic,meson-axg-i2c";
2258 status = "disabled";
2259 reg = <0x0 0x1e000 0x0 0x20>;
2260 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
2261 #address-cells = <1>;
2263 clocks = <&clkc CLKID_I2C>;
2267 compatible = "amlogic,meson-axg-i2c";
2268 status = "disabled";
2269 reg = <0x0 0x1f000 0x0 0x20>;
2270 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
2271 #address-cells = <1>;
2273 clocks = <&clkc CLKID_I2C>;
2276 clk_msr: clock-measure@18000 {
2277 compatible = "amlogic,meson-g12a-clk-measure";
2278 reg = <0x0 0x18000 0x0 0x10>;
2281 uart_C: serial@22000 {
2282 compatible = "amlogic,meson-gx-uart";
2283 reg = <0x0 0x22000 0x0 0x18>;
2284 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
2285 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
2286 clock-names = "xtal", "pclk", "baud";
2287 status = "disabled";
2290 uart_B: serial@23000 {
2291 compatible = "amlogic,meson-gx-uart";
2292 reg = <0x0 0x23000 0x0 0x18>;
2293 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
2294 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
2295 clock-names = "xtal", "pclk", "baud";
2296 status = "disabled";
2299 uart_A: serial@24000 {
2300 compatible = "amlogic,meson-gx-uart";
2301 reg = <0x0 0x24000 0x0 0x18>;
2302 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
2303 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
2304 clock-names = "xtal", "pclk", "baud";
2305 status = "disabled";
2309 sd_emmc_a: sd@ffe03000 {
2310 compatible = "amlogic,meson-axg-mmc";
2311 reg = <0x0 0xffe03000 0x0 0x800>;
2312 interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
2313 status = "disabled";
2314 clocks = <&clkc CLKID_SD_EMMC_A>,
2315 <&clkc CLKID_SD_EMMC_A_CLK0>,
2316 <&clkc CLKID_FCLK_DIV2>;
2317 clock-names = "core", "clkin0", "clkin1";
2318 resets = <&reset RESET_SD_EMMC_A>;
2321 sd_emmc_b: sd@ffe05000 {
2322 compatible = "amlogic,meson-axg-mmc";
2323 reg = <0x0 0xffe05000 0x0 0x800>;
2324 interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
2325 status = "disabled";
2326 clocks = <&clkc CLKID_SD_EMMC_B>,
2327 <&clkc CLKID_SD_EMMC_B_CLK0>,
2328 <&clkc CLKID_FCLK_DIV2>;
2329 clock-names = "core", "clkin0", "clkin1";
2330 resets = <&reset RESET_SD_EMMC_B>;
2333 sd_emmc_c: mmc@ffe07000 {
2334 compatible = "amlogic,meson-axg-mmc";
2335 reg = <0x0 0xffe07000 0x0 0x800>;
2336 interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
2337 status = "disabled";
2338 clocks = <&clkc CLKID_SD_EMMC_C>,
2339 <&clkc CLKID_SD_EMMC_C_CLK0>,
2340 <&clkc CLKID_FCLK_DIV2>;
2341 clock-names = "core", "clkin0", "clkin1";
2342 resets = <&reset RESET_SD_EMMC_C>;
2346 status = "disabled";
2347 compatible = "amlogic,meson-g12a-usb-ctrl";
2348 reg = <0x0 0xffe09000 0x0 0xa0>;
2349 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2350 #address-cells = <2>;
2354 clocks = <&clkc CLKID_USB>;
2355 resets = <&reset RESET_USB>;
2359 phys = <&usb2_phy0>, <&usb2_phy1>,
2360 <&usb3_pcie_phy PHY_TYPE_USB3>;
2361 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
2363 dwc2: usb@ff400000 {
2364 compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
2365 reg = <0x0 0xff400000 0x0 0x40000>;
2366 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
2367 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
2368 clock-names = "ddr";
2369 phys = <&usb2_phy1>;
2370 phy-names = "usb2-phy";
2371 dr_mode = "peripheral";
2372 g-rx-fifo-size = <192>;
2373 g-np-tx-fifo-size = <128>;
2374 g-tx-fifo-size = <128 128 16 16 16>;
2377 dwc3: usb@ff500000 {
2378 compatible = "snps,dwc3";
2379 reg = <0x0 0xff500000 0x0 0x100000>;
2380 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
2382 snps,dis_u2_susphy_quirk;
2383 snps,quirk-frame-length-adjustment;
2387 mali: gpu@ffe40000 {
2388 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
2389 reg = <0x0 0xffe40000 0x0 0x40000>;
2390 interrupt-parent = <&gic>;
2391 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
2392 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
2393 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
2394 interrupt-names = "gpu", "mmu", "job";
2395 clocks = <&clkc CLKID_MALI>;
2396 resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
2399 * Mali clocking is provided by two identical clock paths
2400 * MALI_0 and MALI_1 muxed to a single clock by a glitch
2401 * free mux to safely change frequency while running.
2403 assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
2404 <&clkc CLKID_MALI_0>,
2405 <&clkc CLKID_MALI>; /* Glitch free mux */
2406 assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>,
2407 <0>, /* Do Nothing */
2408 <&clkc CLKID_MALI_0>;
2409 assigned-clock-rates = <0>, /* Do Nothing */
2411 <0>; /* Do Nothing */
2416 compatible = "arm,armv8-timer";
2417 interrupts = <GIC_PPI 13
2418 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2420 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2422 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
2424 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
2425 arm,no-tick-in-suspend;
2429 compatible = "fixed-clock";
2430 clock-frequency = <24000000>;
2431 clock-output-names = "xtal";