Merge tag 'ceph-for-5.1-rc1' of git://github.com/ceph/ceph-client
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / allwinner / sun50i-a64-bananapi-m64.dts
1 /*
2  * Copyright (c) 2016 ARM Ltd.
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This library is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This library is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 /dts-v1/;
44
45 #include "sun50i-a64.dtsi"
46
47 #include <dt-bindings/gpio/gpio.h>
48
49 / {
50         model = "BananaPi-M64";
51         compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
52
53         aliases {
54                 ethernet0 = &emac;
55                 serial0 = &uart0;
56                 serial1 = &uart1;
57         };
58
59         chosen {
60                 stdout-path = "serial0:115200n8";
61         };
62
63         hdmi-connector {
64                 compatible = "hdmi-connector";
65                 type = "a";
66
67                 port {
68                         hdmi_con_in: endpoint {
69                                 remote-endpoint = <&hdmi_out_con>;
70                         };
71                 };
72         };
73
74         leds {
75                 compatible = "gpio-leds";
76
77                 pwr-led {
78                         label = "bananapi-m64:red:pwr";
79                         gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
80                         default-state = "on";
81                 };
82
83                 green {
84                         label = "bananapi-m64:green:user";
85                         gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */
86                 };
87
88                 blue {
89                         label = "bananapi-m64:blue:user";
90                         gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
91                 };
92         };
93
94         wifi_pwrseq: wifi_pwrseq {
95                 compatible = "mmc-pwrseq-simple";
96                 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
97                 clocks = <&rtc 1>;
98                 clock-names = "ext_clock";
99         };
100 };
101
102 &codec {
103         status = "okay";
104 };
105
106 &codec_analog {
107         hpvcc-supply = <&reg_eldo1>;
108         status = "okay";
109 };
110
111 &dai {
112         status = "okay";
113 };
114
115 &de {
116         status = "okay";
117 };
118
119 &ehci0 {
120         status = "okay";
121 };
122
123 &ehci1 {
124         status = "okay";
125 };
126
127 &emac {
128         pinctrl-names = "default";
129         pinctrl-0 = <&rgmii_pins>;
130         phy-mode = "rgmii";
131         phy-handle = <&ext_rgmii_phy>;
132         phy-supply = <&reg_dc1sw>;
133         status = "okay";
134 };
135
136 &hdmi {
137         hvcc-supply = <&reg_dldo1>;
138         status = "okay";
139 };
140
141 &hdmi_out {
142         hdmi_out_con: endpoint {
143                 remote-endpoint = <&hdmi_con_in>;
144         };
145 };
146
147 &i2c1 {
148         pinctrl-names = "default";
149         pinctrl-0 = <&i2c1_pins>;
150         status = "okay";
151 };
152
153 &i2c1_pins {
154         bias-pull-up;
155 };
156
157 &mdio {
158         ext_rgmii_phy: ethernet-phy@1 {
159                 compatible = "ethernet-phy-ieee802.3-c22";
160                 reg = <1>;
161         };
162 };
163
164 &mmc0 {
165         pinctrl-names = "default";
166         pinctrl-0 = <&mmc0_pins>;
167         vmmc-supply = <&reg_dcdc1>;
168         cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
169         disable-wp;
170         bus-width = <4>;
171         status = "okay";
172 };
173
174 &mmc1 {
175         pinctrl-names = "default";
176         pinctrl-0 = <&mmc1_pins>;
177         vmmc-supply = <&reg_dldo2>;
178         vqmmc-supply = <&reg_dldo4>;
179         mmc-pwrseq = <&wifi_pwrseq>;
180         bus-width = <4>;
181         non-removable;
182         status = "okay";
183
184         brcmf: wifi@1 {
185                 reg = <1>;
186                 compatible = "brcm,bcm4329-fmac";
187                 interrupt-parent = <&r_pio>;
188                 interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
189                 interrupt-names = "host-wake";
190         };
191 };
192
193 &mmc2 {
194         pinctrl-names = "default";
195         pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
196         vmmc-supply = <&reg_dcdc1>;
197         bus-width = <8>;
198         non-removable;
199         cap-mmc-hw-reset;
200         status = "okay";
201 };
202
203 &ohci0 {
204         status = "okay";
205 };
206
207 &ohci1 {
208         status = "okay";
209 };
210
211 &r_rsb {
212         status = "okay";
213
214         axp803: pmic@3a3 {
215                 compatible = "x-powers,axp803";
216                 reg = <0x3a3>;
217                 interrupt-parent = <&r_intc>;
218                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
219                 x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
220         };
221 };
222
223 #include "axp803.dtsi"
224
225 &ac_power_supply {
226         status = "okay";
227 };
228
229 &battery_power_supply {
230         status = "okay";
231 };
232
233 &reg_aldo1 {
234         /*
235          * This regulator also drives the PE pingroup GPIOs,
236          * which also controls two LEDs.
237          */
238         regulator-always-on;
239         regulator-min-microvolt = <2800000>;
240         regulator-max-microvolt = <2800000>;
241         regulator-name = "afvcc-csi";
242 };
243
244 &reg_aldo2 {
245         regulator-always-on;
246         regulator-min-microvolt = <1800000>;
247         regulator-max-microvolt = <3300000>;
248         regulator-name = "vcc-pl";
249 };
250
251 &reg_aldo3 {
252         regulator-always-on;
253         regulator-min-microvolt = <3000000>;
254         regulator-max-microvolt = <3000000>;
255         regulator-name = "vcc-pll-avcc";
256 };
257
258 &reg_dc1sw {
259         /*
260          * This regulator also indirectly drives the PD pingroup GPIOs,
261          * which also controls the power LED.
262          */
263         regulator-always-on;
264         regulator-name = "vcc-phy";
265 };
266
267 &reg_dcdc1 {
268         regulator-always-on;
269         regulator-min-microvolt = <3300000>;
270         regulator-max-microvolt = <3300000>;
271         regulator-name = "vcc-3v3";
272 };
273
274 &reg_dcdc2 {
275         regulator-always-on;
276         regulator-min-microvolt = <1040000>;
277         regulator-max-microvolt = <1300000>;
278         regulator-name = "vdd-cpux";
279 };
280
281 /* DCDC3 is polyphased with DCDC2 */
282
283 &reg_dcdc5 {
284         regulator-always-on;
285         regulator-min-microvolt = <1500000>;
286         regulator-max-microvolt = <1500000>;
287         regulator-name = "vcc-dram";
288 };
289
290 &reg_dcdc6 {
291         regulator-always-on;
292         regulator-min-microvolt = <1100000>;
293         regulator-max-microvolt = <1100000>;
294         regulator-name = "vdd-sys";
295 };
296
297 &reg_dldo1 {
298         regulator-min-microvolt = <3300000>;
299         regulator-max-microvolt = <3300000>;
300         regulator-name = "vcc-hdmi-dsi";
301 };
302
303 &reg_dldo2 {
304         regulator-min-microvolt = <3300000>;
305         regulator-max-microvolt = <3300000>;
306         regulator-name = "vcc-wifi";
307 };
308
309 &reg_dldo4 {
310         regulator-min-microvolt = <1800000>;
311         regulator-max-microvolt = <3300000>;
312         regulator-name = "vcc-wifi-io";
313 };
314
315 &reg_drivevbus {
316         regulator-name = "usb0-vbus";
317         status = "okay";
318 };
319
320 &reg_eldo1 {
321         regulator-min-microvolt = <1800000>;
322         regulator-max-microvolt = <1800000>;
323         regulator-name = "cpvdd";
324 };
325
326 &reg_fldo1 {
327         regulator-min-microvolt = <1200000>;
328         regulator-max-microvolt = <1200000>;
329         regulator-name = "vcc-1v2-hsic";
330 };
331
332 /*
333  * The A64 chip cannot work without this regulator off, although
334  * it seems to be only driving the AR100 core.
335  * Maybe we don't still know well about CPUs domain.
336  */
337 &reg_fldo2 {
338         regulator-always-on;
339         regulator-min-microvolt = <1100000>;
340         regulator-max-microvolt = <1100000>;
341         regulator-name = "vdd-cpus";
342 };
343
344 &reg_rtc_ldo {
345         regulator-name = "vcc-rtc";
346 };
347
348 &simplefb_hdmi {
349         vcc-hdmi-supply = <&reg_dldo1>;
350 };
351
352 &sound {
353         status = "okay";
354         simple-audio-card,widgets = "Headphone", "Headphone Jack",
355                                     "Microphone", "Microphone Jack",
356                                     "Microphone", "Onboard Microphone";
357         simple-audio-card,routing =
358                         "Left DAC", "AIF1 Slot 0 Left",
359                         "Right DAC", "AIF1 Slot 0 Right",
360                         "AIF1 Slot 0 Left ADC", "Left ADC",
361                         "AIF1 Slot 0 Right ADC", "Right ADC",
362                         "Headphone Jack", "HP",
363                         "MIC2", "Microphone Jack",
364                         "Onboard Microphone", "MBIAS",
365                         "MIC1", "Onboard Microphone";
366 };
367
368 &uart0 {
369         pinctrl-names = "default";
370         pinctrl-0 = <&uart0_pb_pins>;
371         status = "okay";
372 };
373
374 &uart1 {
375         pinctrl-names = "default";
376         pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
377         uart-has-rtscts;
378         status = "okay";
379
380         bluetooth {
381                 compatible = "brcm,bcm43438-bt";
382                 clocks = <&rtc 1>;
383                 clock-names = "lpo";
384                 vbat-supply = <&reg_dldo2>;
385                 vddio-supply = <&reg_dldo4>;
386                 device-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
387                 host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
388                 shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
389         };
390 };
391
392 &usb_otg {
393         dr_mode = "otg";
394         status = "okay";
395 };
396
397 &usbphy {
398         usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
399         usb0_vbus-supply = <&reg_drivevbus>;
400         status = "okay";
401 };