arch/arm/plat-s5p/cpu.c

   1 /* linux/arch/arm/plat-s5p/cpu.c
   2  *
   3  * Copyright (c) 2009 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * S5P CPU Support
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15 #include <mach/map.h>
  16 #include <asm/mach/arch.h>
  17 #include <asm/mach/map.h>
  18 #include <mach/regs-clock.h>
  19 #include <plat/cpu.h>
  20 #include <plat/s5p6440.h>
  21 #include <plat/s5p6442.h>
  22 #include <plat/s5pc100.h>
  23 #include <plat/s5pv210.h>
  24 #include <plat/s5pv310.h>
  25
  26 /* table of supported CPUs */
  27
  28 static const char name_s5p6440[] = "S5P6440";
  29 static const char name_s5p6442[] = "S5P6442";
  30 static const char name_s5pc100[] = "S5PC100";
  31 static const char name_s5pv210[] = "S5PV210/S5PC110";
  32 static const char name_s5pv310[] = "S5PV310";
  33
  34 static struct cpu_table cpu_ids[] __initdata = {
  35         {
  36                 .idcode         = 0x56440100,
  37                 .idmask         = 0xffffff00,
  38                 .map_io         = s5p6440_map_io,
  39                 .init_clocks    = s5p6440_init_clocks,
  40                 .init_uarts     = s5p6440_init_uarts,
  41                 .init           = s5p6440_init,
  42                 .name           = name_s5p6440,
  43         }, {
  44                 .idcode         = 0x36442000,
  45                 .idmask         = 0xffffff00,
  46                 .map_io         = s5p6442_map_io,
  47                 .init_clocks    = s5p6442_init_clocks,
  48                 .init_uarts     = s5p6442_init_uarts,
  49                 .init           = s5p6442_init,
  50                 .name           = name_s5p6442,
  51         }, {
  52                 .idcode         = 0x43100000,
  53                 .idmask         = 0xfffff000,
  54                 .map_io         = s5pc100_map_io,
  55                 .init_clocks    = s5pc100_init_clocks,
  56                 .init_uarts     = s5pc100_init_uarts,
  57                 .init           = s5pc100_init,
  58                 .name           = name_s5pc100,
  59         }, {
  60                 .idcode         = 0x43110000,
  61                 .idmask         = 0xfffff000,
  62                 .map_io         = s5pv210_map_io,
  63                 .init_clocks    = s5pv210_init_clocks,
  64                 .init_uarts     = s5pv210_init_uarts,
  65                 .init           = s5pv210_init,
  66                 .name           = name_s5pv210,
  67         }, {
  68                 .idcode         = 0x43200000,
  69                 .idmask         = 0xfffff000,
  70                 .map_io         = s5pv310_map_io,
  71                 .init_clocks    = s5pv310_init_clocks,
  72                 .init_uarts     = s5pv310_init_uarts,
  73                 .init           = s5pv310_init,
  74                 .name           = name_s5pv310,
  75         },
  76 };
  77
  78 /* minimal IO mapping */
  79
  80 static struct map_desc s5p_iodesc[] __initdata = {
  81         {
  82                 .virtual        = (unsigned long)S5P_VA_CHIPID,
  83                 .pfn            = __phys_to_pfn(S5P_PA_CHIPID),
  84                 .length         = SZ_4K,
  85                 .type           = MT_DEVICE,
  86         }, {
  87                 .virtual        = (unsigned long)S3C_VA_SYS,
  88                 .pfn            = __phys_to_pfn(S5P_PA_SYSCON),
  89                 .length         = SZ_64K,
  90                 .type           = MT_DEVICE,
  91         }, {
  92                 .virtual        = (unsigned long)S3C_VA_UART,
  93                 .pfn            = __phys_to_pfn(S3C_PA_UART),
  94                 .length         = SZ_512K,
  95                 .type           = MT_DEVICE,
  96 #ifdef CONFIG_ARM_VIC
  97         }, {
  98                 .virtual        = (unsigned long)VA_VIC0,
  99                 .pfn            = __phys_to_pfn(S5P_PA_VIC0),
 100                 .length         = SZ_16K,
 101                 .type           = MT_DEVICE,
 102         }, {
 103                 .virtual        = (unsigned long)VA_VIC1,
 104                 .pfn            = __phys_to_pfn(S5P_PA_VIC1),
 105                 .length         = SZ_16K,
 106                 .type           = MT_DEVICE,
 107 #endif
 108         }, {
 109                 .virtual        = (unsigned long)S3C_VA_TIMER,
 110                 .pfn            = __phys_to_pfn(S5P_PA_TIMER),
 111                 .length         = SZ_16K,
 112                 .type           = MT_DEVICE,
 113         }, {
 114                 .virtual        = (unsigned long)S5P_VA_GPIO,
 115                 .pfn            = __phys_to_pfn(S5P_PA_GPIO),
 116                 .length         = SZ_4K,
 117                 .type           = MT_DEVICE,
 118         }, {
 119                 .virtual        = (unsigned long)S3C_VA_WATCHDOG,
 120                 .pfn            = __phys_to_pfn(S3C_PA_WDT),
 121                 .length         = SZ_4K,
 122                 .type           = MT_DEVICE,
 123         },
 124 };
 125
 126 /* read cpu identification code */
 127
 128 void __init s5p_init_io(struct map_desc *mach_desc,
 129                         int size, void __iomem *cpuid_addr)
 130 {
 131         unsigned long idcode;
 132
 133         /* initialize the io descriptors we need for initialization */
 134         iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
 135         if (mach_desc)
 136                 iotable_init(mach_desc, size);
 137
 138         idcode = __raw_readl(cpuid_addr);
 139         s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
 140 }