Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux...
[sfrench/cifs-2.6.git] / arch / arm / plat-omap / sram.c
1 /*
2  * linux/arch/arm/plat-omap/sram.c
3  *
4  * OMAP SRAM detection and management
5  *
6  * Copyright (C) 2005 Nokia Corporation
7  * Written by Tony Lindgren <tony@atomide.com>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17
18 #include <asm/tlb.h>
19 #include <asm/io.h>
20 #include <asm/cacheflush.h>
21
22 #include <asm/mach/map.h>
23
24 #include <asm/arch/sram.h>
25 #include <asm/arch/board.h>
26
27 #define OMAP1_SRAM_PA           0x20000000
28 #define OMAP1_SRAM_VA           0xd0000000
29 #define OMAP2_SRAM_PA           0x40200000
30 #define OMAP2_SRAM_PUB_PA       0x4020f800
31 #define OMAP2_SRAM_VA           0xd0000000
32 #define OMAP2_SRAM_PUB_VA       0xd0000800
33
34 #if defined(CONFIG_ARCH_OMAP24XX)
35 #define SRAM_BOOTLOADER_SZ      0x00
36 #else
37 #define SRAM_BOOTLOADER_SZ      0x80
38 #endif
39
40 #define VA_REQINFOPERM0         IO_ADDRESS(0x68005048)
41 #define VA_READPERM0            IO_ADDRESS(0x68005050)
42 #define VA_WRITEPERM0           IO_ADDRESS(0x68005058)
43 #define VA_CONTROL_STAT         IO_ADDRESS(0x480002F8)
44 #define GP_DEVICE               0x300
45 #define TYPE_MASK               0x700
46
47 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
48
49 static unsigned long omap_sram_base;
50 static unsigned long omap_sram_size;
51 static unsigned long omap_sram_ceil;
52
53 unsigned long omap_fb_sram_start;
54 unsigned long omap_fb_sram_size;
55
56 /* Depending on the target RAMFS firewall setup, the public usable amount of
57  * SRAM varies.  The default accessable size for all device types is 2k. A GP
58  * device allows ARM11 but not other initators for full size. This
59  * functionality seems ok until some nice security API happens.
60  */
61 static int is_sram_locked(void)
62 {
63         int type = 0;
64
65         if (cpu_is_omap242x())
66                 type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK;
67
68         if (type == GP_DEVICE) {
69                 /* RAMFW: R/W access to all initators for all qualifier sets */
70                 if (cpu_is_omap242x()) {
71                         __raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */
72                         __raw_writel(0xCFDE, VA_READPERM0);  /* all i-read */
73                         __raw_writel(0xCFDE, VA_WRITEPERM0); /* all i-write */
74                 }
75                 return 0;
76         } else
77                 return 1; /* assume locked with no PPA or security driver */
78 }
79
80 void get_fb_sram_conf(unsigned long start_avail, unsigned size_avail,
81                       unsigned long *start, unsigned long *size)
82 {
83         const struct omap_fbmem_config *fbmem_conf;
84
85         fbmem_conf = omap_get_config(OMAP_TAG_FBMEM, struct omap_fbmem_config);
86         if (fbmem_conf != NULL) {
87                 *start = fbmem_conf->fb_sram_start;
88                 *size = fbmem_conf->fb_sram_size;
89         } else {
90                 *size = 0;
91                 *start = 0;
92         }
93
94         if (*size && (
95             *start < start_avail ||
96             *start + *size > start_avail + size_avail)) {
97                 printk(KERN_ERR "invalid FB SRAM configuration\n");
98                 *start = start_avail;
99                 *size = size_avail;
100         }
101
102         if (*size)
103                 pr_info("Reserving %lu bytes SRAM for frame buffer\n", *size);
104 }
105
106 /*
107  * The amount of SRAM depends on the core type.
108  * Note that we cannot try to test for SRAM here because writes
109  * to secure SRAM will hang the system. Also the SRAM is not
110  * yet mapped at this point.
111  */
112 void __init omap_detect_sram(void)
113 {
114         unsigned long sram_start;
115
116         if (cpu_is_omap24xx()) {
117                 if (is_sram_locked()) {
118                         omap_sram_base = OMAP2_SRAM_PUB_VA;
119                         sram_start = OMAP2_SRAM_PUB_PA;
120                         omap_sram_size = 0x800; /* 2K */
121                 } else {
122                         omap_sram_base = OMAP2_SRAM_VA;
123                         sram_start = OMAP2_SRAM_PA;
124                         if (cpu_is_omap242x())
125                                 omap_sram_size = 0xa0000; /* 640K */
126                         else if (cpu_is_omap243x())
127                                 omap_sram_size = 0x10000; /* 64K */
128                 }
129         } else {
130                 omap_sram_base = OMAP1_SRAM_VA;
131                 sram_start = OMAP1_SRAM_PA;
132
133                 if (cpu_is_omap730())
134                         omap_sram_size = 0x32000;       /* 200K */
135                 else if (cpu_is_omap15xx())
136                         omap_sram_size = 0x30000;       /* 192K */
137                 else if (cpu_is_omap1610() || cpu_is_omap1621() ||
138                      cpu_is_omap1710())
139                         omap_sram_size = 0x4000;        /* 16K */
140                 else if (cpu_is_omap1611())
141                         omap_sram_size = 0x3e800;       /* 250K */
142                 else {
143                         printk(KERN_ERR "Could not detect SRAM size\n");
144                         omap_sram_size = 0x4000;
145                 }
146         }
147         get_fb_sram_conf(sram_start + SRAM_BOOTLOADER_SZ,
148                          omap_sram_size - SRAM_BOOTLOADER_SZ,
149                          &omap_fb_sram_start, &omap_fb_sram_size);
150         if (omap_fb_sram_size)
151                 omap_sram_size -= sram_start + omap_sram_size -
152                                   omap_fb_sram_start;
153         omap_sram_ceil = omap_sram_base + omap_sram_size;
154 }
155
156 static struct map_desc omap_sram_io_desc[] __initdata = {
157         {       /* .length gets filled in at runtime */
158                 .virtual        = OMAP1_SRAM_VA,
159                 .pfn            = __phys_to_pfn(OMAP1_SRAM_PA),
160                 .type           = MT_MEMORY
161         }
162 };
163
164 /*
165  * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
166  */
167 void __init omap_map_sram(void)
168 {
169         unsigned long base;
170
171         if (omap_sram_size == 0)
172                 return;
173
174         if (cpu_is_omap24xx()) {
175                 omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
176
177                 if (is_sram_locked())
178                         base = OMAP2_SRAM_PUB_PA;
179                 else
180                         base = OMAP2_SRAM_PA;
181                 base = ROUND_DOWN(base, PAGE_SIZE);
182                 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
183         }
184
185         omap_sram_io_desc[0].length = 1024 * 1024;      /* Use section desc */
186         iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
187
188         printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
189         __pfn_to_phys(omap_sram_io_desc[0].pfn),
190         omap_sram_io_desc[0].virtual,
191                omap_sram_io_desc[0].length);
192
193         /*
194          * Normally devicemaps_init() would flush caches and tlb after
195          * mdesc->map_io(), but since we're called from map_io(), we
196          * must do it here.
197          */
198         local_flush_tlb_all();
199         flush_cache_all();
200
201         /*
202          * Looks like we need to preserve some bootloader code at the
203          * beginning of SRAM for jumping to flash for reboot to work...
204          */
205         memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
206                omap_sram_size - SRAM_BOOTLOADER_SZ);
207 }
208
209 void * omap_sram_push(void * start, unsigned long size)
210 {
211         if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
212                 printk(KERN_ERR "Not enough space in SRAM\n");
213                 return NULL;
214         }
215
216         omap_sram_ceil -= size;
217         omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
218         memcpy((void *)omap_sram_ceil, start, size);
219
220         return (void *)omap_sram_ceil;
221 }
222
223 static void omap_sram_error(void)
224 {
225         panic("Uninitialized SRAM function\n");
226 }
227
228 #ifdef CONFIG_ARCH_OMAP1
229
230 static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
231
232 void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
233 {
234         if (!_omap_sram_reprogram_clock)
235                 omap_sram_error();
236
237         return _omap_sram_reprogram_clock(dpllctl, ckctl);
238 }
239
240 int __init omap1_sram_init(void)
241 {
242         _omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock,
243                                                     sram_reprogram_clock_sz);
244
245         return 0;
246 }
247
248 #else
249 #define omap1_sram_init()       do {} while (0)
250 #endif
251
252 #ifdef CONFIG_ARCH_OMAP2
253
254 static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
255                               u32 base_cs, u32 force_unlock);
256
257 void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
258                    u32 base_cs, u32 force_unlock)
259 {
260         if (!_omap2_sram_ddr_init)
261                 omap_sram_error();
262
263         return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
264                                     base_cs, force_unlock);
265 }
266
267 static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
268                                           u32 mem_type);
269
270 void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
271 {
272         if (!_omap2_sram_reprogram_sdrc)
273                 omap_sram_error();
274
275         return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
276 }
277
278 static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
279
280 u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
281 {
282         if (!_omap2_set_prcm)
283                 omap_sram_error();
284
285         return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
286 }
287
288 int __init omap2_sram_init(void)
289 {
290         _omap2_sram_ddr_init = omap_sram_push(sram_ddr_init, sram_ddr_init_sz);
291
292         _omap2_sram_reprogram_sdrc = omap_sram_push(sram_reprogram_sdrc,
293                                                     sram_reprogram_sdrc_sz);
294         _omap2_set_prcm = omap_sram_push(sram_set_prcm, sram_set_prcm_sz);
295
296         return 0;
297 }
298 #else
299 #define omap2_sram_init()       do {} while (0)
300 #endif
301
302 int __init omap_sram_init(void)
303 {
304         omap_detect_sram();
305         omap_map_sram();
306
307         if (!cpu_is_omap24xx())
308                 omap1_sram_init();
309         else
310                 omap2_sram_init();
311
312         return 0;
313 }