2 * linux/arch/arm/mm/nommu.c
4 * ARM uCLinux supporting functions.
6 #include <linux/module.h>
8 #include <linux/pagemap.h>
10 #include <linux/memblock.h>
11 #include <linux/kernel.h>
13 #include <asm/cacheflush.h>
15 #include <asm/sections.h>
17 #include <asm/setup.h>
18 #include <asm/traps.h>
19 #include <asm/mach/arch.h>
20 #include <asm/cputype.h>
22 #include <asm/procinfo.h>
26 unsigned long vectors_base;
29 struct mpu_rgn_info mpu_rgn_info;
32 #ifdef CONFIG_CPU_CP15
33 #ifdef CONFIG_CPU_HIGH_VECTOR
34 unsigned long setup_vectors_base(void)
36 unsigned long reg = get_cr();
41 #else /* CONFIG_CPU_HIGH_VECTOR */
42 /* Write exception base address to VBAR */
43 static inline void set_vbar(unsigned long val)
45 asm("mcr p15, 0, %0, c12, c0, 0" : : "r" (val) : "cc");
49 * Security extensions, bits[7:4], permitted values,
50 * 0b0000 - not implemented, 0b0001/0b0010 - implemented
52 static inline bool security_extensions_enabled(void)
54 /* Check CPUID Identification Scheme before ID_PFR1 read */
55 if ((read_cpuid_id() & 0x000f0000) == 0x000f0000)
56 return !!cpuid_feature_extract(CPUID_EXT_PFR1, 4);
60 unsigned long setup_vectors_base(void)
62 unsigned long base = 0, reg = get_cr();
65 if (security_extensions_enabled()) {
66 if (IS_ENABLED(CONFIG_REMAP_VECTORS_TO_RAM))
67 base = CONFIG_DRAM_BASE;
69 } else if (IS_ENABLED(CONFIG_REMAP_VECTORS_TO_RAM)) {
70 if (CONFIG_DRAM_BASE != 0)
71 pr_err("Security extensions not enabled, vectors cannot be remapped to RAM, vectors base will be 0x00000000\n");
76 #endif /* CONFIG_CPU_HIGH_VECTOR */
77 #endif /* CONFIG_CPU_CP15 */
79 void __init arm_mm_memblock_reserve(void)
81 #ifndef CONFIG_CPU_V7M
82 vectors_base = IS_ENABLED(CONFIG_CPU_CP15) ? setup_vectors_base() : 0;
84 * Register the exception vector page.
85 * some architectures which the DRAM is the exception vector to trap,
86 * alloc_page breaks with error, although it is not NULL, but "0."
88 memblock_reserve(vectors_base, 2 * PAGE_SIZE);
89 #else /* ifndef CONFIG_CPU_V7M */
91 * There is no dedicated vector page on V7-M. So nothing needs to be
96 * In any case, always ensure address 0 is never used as many things
97 * get very confused if 0 is returned as a legitimate address.
99 memblock_reserve(0, 1);
102 static void __init adjust_lowmem_bounds_mpu(void)
104 unsigned long pmsa = read_cpuid_ext(CPUID_EXT_MMFR0) & MMFR0_PMSA;
108 pmsav7_adjust_lowmem_bounds();
111 pmsav8_adjust_lowmem_bounds();
118 static void __init mpu_setup(void)
120 unsigned long pmsa = read_cpuid_ext(CPUID_EXT_MMFR0) & MMFR0_PMSA;
134 void __init adjust_lowmem_bounds(void)
137 adjust_lowmem_bounds_mpu();
138 end = memblock_end_of_DRAM();
139 high_memory = __va(end - 1) + 1;
140 memblock_set_current_limit(end);
144 * paging_init() sets up the page tables, initialises the zone memory
145 * maps, and sets up the zero page, bad page and bad page tables.
147 void __init paging_init(const struct machine_desc *mdesc)
149 early_trap_init((void *)vectors_base);
155 * We don't need to do anything here for nommu machines.
157 void setup_mm_for_reboot(void)
161 void flush_dcache_page(struct page *page)
163 __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
165 EXPORT_SYMBOL(flush_dcache_page);
167 void flush_kernel_dcache_page(struct page *page)
169 __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
171 EXPORT_SYMBOL(flush_kernel_dcache_page);
173 void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
174 unsigned long uaddr, void *dst, const void *src,
177 memcpy(dst, src, len);
178 if (vma->vm_flags & VM_EXEC)
179 __cpuc_coherent_user_range(uaddr, uaddr + len);
182 void __iomem *__arm_ioremap_pfn(unsigned long pfn, unsigned long offset,
183 size_t size, unsigned int mtype)
185 if (pfn >= (0x100000000ULL >> PAGE_SHIFT))
187 return (void __iomem *) (offset + (pfn << PAGE_SHIFT));
189 EXPORT_SYMBOL(__arm_ioremap_pfn);
191 void __iomem *__arm_ioremap_caller(phys_addr_t phys_addr, size_t size,
192 unsigned int mtype, void *caller)
194 return (void __iomem *)phys_addr;
197 void __iomem * (*arch_ioremap_caller)(phys_addr_t, size_t, unsigned int, void *);
199 void __iomem *ioremap(resource_size_t res_cookie, size_t size)
201 return __arm_ioremap_caller(res_cookie, size, MT_DEVICE,
202 __builtin_return_address(0));
204 EXPORT_SYMBOL(ioremap);
206 void __iomem *ioremap_cache(resource_size_t res_cookie, size_t size)
207 __alias(ioremap_cached);
209 void __iomem *ioremap_cached(resource_size_t res_cookie, size_t size)
211 return __arm_ioremap_caller(res_cookie, size, MT_DEVICE_CACHED,
212 __builtin_return_address(0));
214 EXPORT_SYMBOL(ioremap_cache);
215 EXPORT_SYMBOL(ioremap_cached);
217 void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size)
219 return __arm_ioremap_caller(res_cookie, size, MT_DEVICE_WC,
220 __builtin_return_address(0));
222 EXPORT_SYMBOL(ioremap_wc);
226 #include <asm/mach/map.h>
228 void __iomem *pci_remap_cfgspace(resource_size_t res_cookie, size_t size)
230 return arch_ioremap_caller(res_cookie, size, MT_UNCACHED,
231 __builtin_return_address(0));
233 EXPORT_SYMBOL_GPL(pci_remap_cfgspace);
236 void *arch_memremap_wb(phys_addr_t phys_addr, size_t size)
238 return (void *)phys_addr;
241 void __iounmap(volatile void __iomem *addr)
244 EXPORT_SYMBOL(__iounmap);
246 void (*arch_iounmap)(volatile void __iomem *);
248 void iounmap(volatile void __iomem *addr)
251 EXPORT_SYMBOL(iounmap);