arch/arm/mach-ux500/devices-db8500.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
   5  * License terms: GNU General Public License (GPL) version 2
   6  */
   7
   8 #include <linux/kernel.h>
   9 #include <linux/platform_device.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/io.h>
  12 #include <linux/gpio.h>
  13 #include <linux/amba/bus.h>
  14
  15 #include <plat/ste_dma40.h>
  16
  17 #include <mach/hardware.h>
  18 #include <mach/setup.h>
  19
  20 #include "ste-dma40-db8500.h"
  21
  22 static struct nmk_gpio_platform_data u8500_gpio_data[] = {
  23         GPIO_DATA("GPIO-0-31", 0),
  24         GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
  25         GPIO_DATA("GPIO-64-95", 64),
  26         GPIO_DATA("GPIO-96-127", 96), /* 98..127 not routed to pin */
  27         GPIO_DATA("GPIO-128-159", 128),
  28         GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
  29         GPIO_DATA("GPIO-192-223", 192),
  30         GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
  31         GPIO_DATA("GPIO-256-288", 256), /* 268..288 not routed to pin */
  32 };
  33
  34 static struct resource u8500_gpio_resources[] = {
  35         GPIO_RESOURCE(0),
  36         GPIO_RESOURCE(1),
  37         GPIO_RESOURCE(2),
  38         GPIO_RESOURCE(3),
  39         GPIO_RESOURCE(4),
  40         GPIO_RESOURCE(5),
  41         GPIO_RESOURCE(6),
  42         GPIO_RESOURCE(7),
  43         GPIO_RESOURCE(8),
  44 };
  45
  46 struct platform_device u8500_gpio_devs[] = {
  47         GPIO_DEVICE(0),
  48         GPIO_DEVICE(1),
  49         GPIO_DEVICE(2),
  50         GPIO_DEVICE(3),
  51         GPIO_DEVICE(4),
  52         GPIO_DEVICE(5),
  53         GPIO_DEVICE(6),
  54         GPIO_DEVICE(7),
  55         GPIO_DEVICE(8),
  56 };
  57
  58 struct amba_device u8500_ssp0_device = {
  59         .dev = {
  60                 .coherent_dma_mask = ~0,
  61                 .init_name = "ssp0",
  62         },
  63         .res = {
  64                 .start = U8500_SSP0_BASE,
  65                 .end   = U8500_SSP0_BASE + SZ_4K - 1,
  66                 .flags = IORESOURCE_MEM,
  67         },
  68         .irq = {IRQ_SSP0, NO_IRQ },
  69         /* ST-Ericsson modified id */
  70         .periphid = SSP_PER_ID,
  71 };
  72
  73 static struct resource u8500_i2c0_resources[] = {
  74         [0] = {
  75                 .start  = U8500_I2C0_BASE,
  76                 .end    = U8500_I2C0_BASE + SZ_4K - 1,
  77                 .flags  = IORESOURCE_MEM,
  78         },
  79         [1] = {
  80                 .start  = IRQ_I2C0,
  81                 .end    = IRQ_I2C0,
  82                 .flags  = IORESOURCE_IRQ,
  83         }
  84 };
  85
  86 struct platform_device u8500_i2c0_device = {
  87         .name           = "nmk-i2c",
  88         .id             = 0,
  89         .resource       = u8500_i2c0_resources,
  90         .num_resources  = ARRAY_SIZE(u8500_i2c0_resources),
  91 };
  92
  93 static struct resource u8500_i2c4_resources[] = {
  94         [0] = {
  95                 .start  = U8500_I2C4_BASE,
  96                 .end    = U8500_I2C4_BASE + SZ_4K - 1,
  97                 .flags  = IORESOURCE_MEM,
  98         },
  99         [1] = {
 100                 .start  = IRQ_I2C4,
 101                 .end    = IRQ_I2C4,
 102                 .flags  = IORESOURCE_IRQ,
 103         }
 104 };
 105
 106 struct platform_device u8500_i2c4_device = {
 107         .name           = "nmk-i2c",
 108         .id             = 4,
 109         .resource       = u8500_i2c4_resources,
 110         .num_resources  = ARRAY_SIZE(u8500_i2c4_resources),
 111 };
 112
 113 static struct resource dma40_resources[] = {
 114         [0] = {
 115                 .start = U8500_DMA_BASE,
 116                 .end = U8500_DMA_BASE + SZ_4K - 1,
 117                 .flags = IORESOURCE_MEM,
 118                 .name = "base",
 119         },
 120         [1] = {
 121                 .start = U8500_DMA_LCPA_BASE,
 122                 .end = U8500_DMA_LCPA_BASE + SZ_4K - 1,
 123                 .flags = IORESOURCE_MEM,
 124                 .name = "lcpa",
 125         },
 126         [2] = {
 127                 .start = U8500_DMA_LCLA_BASE,
 128                 .end = U8500_DMA_LCLA_BASE + 16 * 1024 - 1,
 129                 .flags = IORESOURCE_MEM,
 130                 .name = "lcla",
 131         },
 132         [3] = {
 133                 .start = IRQ_DMA,
 134                 .end = IRQ_DMA,
 135                 .flags = IORESOURCE_IRQ}
 136 };
 137
 138 /* Default configuration for physcial memcpy */
 139 struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
 140         .channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE |
 141                          STEDMA40_LOW_PRIORITY_CHANNEL |
 142                          STEDMA40_PCHAN_BASIC_MODE),
 143         .dir = STEDMA40_MEM_TO_MEM,
 144
 145         .src_info.endianess = STEDMA40_LITTLE_ENDIAN,
 146         .src_info.data_width = STEDMA40_BYTE_WIDTH,
 147         .src_info.psize = STEDMA40_PSIZE_PHY_1,
 148
 149         .dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
 150         .dst_info.data_width = STEDMA40_BYTE_WIDTH,
 151         .dst_info.psize = STEDMA40_PSIZE_PHY_1,
 152
 153 };
 154 /* Default configuration for logical memcpy */
 155 struct stedma40_chan_cfg dma40_memcpy_conf_log = {
 156         .channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE |
 157                          STEDMA40_LOW_PRIORITY_CHANNEL |
 158                          STEDMA40_LCHAN_SRC_LOG_DST_LOG |
 159                          STEDMA40_NO_TIM_FOR_LINK),
 160         .dir = STEDMA40_MEM_TO_MEM,
 161
 162         .src_info.endianess = STEDMA40_LITTLE_ENDIAN,
 163         .src_info.data_width = STEDMA40_BYTE_WIDTH,
 164         .src_info.psize = STEDMA40_PSIZE_LOG_1,
 165
 166         .dst_info.endianess = STEDMA40_LITTLE_ENDIAN,
 167         .dst_info.data_width = STEDMA40_BYTE_WIDTH,
 168         .dst_info.psize = STEDMA40_PSIZE_LOG_1,
 169
 170 };
 171
 172 /*
 173  * Mapping between destination event lines and physical device address.
 174  * The event line is tied to a device and therefor the address is constant.
 175  */
 176 static const dma_addr_t dma40_tx_map[STEDMA40_NR_DEV];
 177
 178 /* Mapping between source event lines and physical device address */
 179 static const dma_addr_t dma40_rx_map[STEDMA40_NR_DEV];
 180
 181 /* Reserved event lines for memcpy only */
 182 static int dma40_memcpy_event[] = {
 183         STEDMA40_MEMCPY_TX_1,
 184         STEDMA40_MEMCPY_TX_2,
 185         STEDMA40_MEMCPY_TX_3,
 186         STEDMA40_MEMCPY_TX_4,
 187 };
 188
 189 static struct stedma40_platform_data dma40_plat_data = {
 190         .dev_len = STEDMA40_NR_DEV,
 191         .dev_rx = dma40_rx_map,
 192         .dev_tx = dma40_tx_map,
 193         .memcpy = dma40_memcpy_event,
 194         .memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
 195         .memcpy_conf_phy = &dma40_memcpy_conf_phy,
 196         .memcpy_conf_log = &dma40_memcpy_conf_log,
 197         .llis_per_log = 8,
 198 };
 199
 200 struct platform_device u8500_dma40_device = {
 201         .dev = {
 202                 .platform_data = &dma40_plat_data,
 203         },
 204         .name = "dma40",
 205         .id = 0,
 206         .num_resources = ARRAY_SIZE(dma40_resources),
 207         .resource = dma40_resources
 208 };
 209
 210 void dma40_u8500ed_fixup(void)
 211 {
 212         dma40_plat_data.memcpy = NULL;
 213         dma40_plat_data.memcpy_len = 0;
 214         dma40_resources[0].start = U8500_DMA_BASE_ED;
 215         dma40_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1;
 216 }