f20418a2fb1b62e2bf882dd768da1fae52c4e288
[sfrench/cifs-2.6.git] / arch / arm / mach-s3c24xx / mach-rx3715.c
1 /* linux/arch/arm/mach-s3c2440/mach-rx3715.c
2  *
3  * Copyright (c) 2003-2004 Simtec Electronics
4  *      Ben Dooks <ben@simtec.co.uk>
5  *
6  * http://www.handhelds.org/projects/rx3715.html
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/memblock.h>
19 #include <linux/timer.h>
20 #include <linux/init.h>
21 #include <linux/tty.h>
22 #include <linux/console.h>
23 #include <linux/device.h>
24 #include <linux/platform_device.h>
25 #include <linux/serial_core.h>
26 #include <linux/serial.h>
27 #include <linux/io.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/nand.h>
30 #include <linux/mtd/nand_ecc.h>
31 #include <linux/mtd/partitions.h>
32
33 #include <asm/mach/arch.h>
34 #include <asm/mach/irq.h>
35 #include <asm/mach/map.h>
36
37 #include <linux/platform_data/mtd-nand-s3c2410.h>
38
39 #include <asm/irq.h>
40 #include <asm/mach-types.h>
41
42 #include <mach/fb.h>
43 #include <mach/hardware.h>
44 #include <mach/regs-gpio.h>
45 #include <mach/regs-lcd.h>
46
47 #include <plat/clock.h>
48 #include <plat/cpu.h>
49 #include <plat/devs.h>
50 #include <plat/pm.h>
51 #include <plat/regs-serial.h>
52
53 #include "common.h"
54 #include "h1940.h"
55
56 static struct map_desc rx3715_iodesc[] __initdata = {
57         /* dump ISA space somewhere unused */
58
59         {
60                 .virtual        = (u32)S3C24XX_VA_ISA_WORD,
61                 .pfn            = __phys_to_pfn(S3C2410_CS3),
62                 .length         = SZ_1M,
63                 .type           = MT_DEVICE,
64         }, {
65                 .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
66                 .pfn            = __phys_to_pfn(S3C2410_CS3),
67                 .length         = SZ_1M,
68                 .type           = MT_DEVICE,
69         },
70 };
71
72 static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
73         [0] = {
74                 .hwport      = 0,
75                 .flags       = 0,
76                 .ucon        = 0x3c5,
77                 .ulcon       = 0x03,
78                 .ufcon       = 0x51,
79                 .clk_sel        = S3C2410_UCON_CLKSEL3,
80         },
81         [1] = {
82                 .hwport      = 1,
83                 .flags       = 0,
84                 .ucon        = 0x3c5,
85                 .ulcon       = 0x03,
86                 .ufcon       = 0x00,
87                 .clk_sel        = S3C2410_UCON_CLKSEL3,
88         },
89         /* IR port */
90         [2] = {
91                 .hwport      = 2,
92                 .uart_flags  = UPF_CONS_FLOW,
93                 .ucon        = 0x3c5,
94                 .ulcon       = 0x43,
95                 .ufcon       = 0x51,
96                 .clk_sel        = S3C2410_UCON_CLKSEL3,
97         }
98 };
99
100 /* framebuffer lcd controller information */
101
102 static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
103         .lcdcon5 =      S3C2410_LCDCON5_INVVLINE |
104                         S3C2410_LCDCON5_FRM565 |
105                         S3C2410_LCDCON5_HWSWP,
106
107         .type           = S3C2410_LCDCON1_TFT,
108         .width          = 240,
109         .height         = 320,
110
111         .pixclock       = 260000,
112         .xres           = 240,
113         .yres           = 320,
114         .bpp            = 16,
115         .left_margin    = 36,
116         .right_margin   = 36,
117         .hsync_len      = 8,
118         .upper_margin   = 6,
119         .lower_margin   = 7,
120         .vsync_len      = 3,
121 };
122
123 static struct s3c2410fb_mach_info rx3715_fb_info __initdata = {
124
125         .displays =     &rx3715_lcdcfg,
126         .num_displays = 1,
127         .default_display = 0,
128
129         .lpcsel =       0xf82,
130
131         .gpccon =       0xaa955699,
132         .gpccon_mask =  0xffc003cc,
133         .gpcup =        0x0000ffff,
134         .gpcup_mask =   0xffffffff,
135
136         .gpdcon =       0xaa95aaa1,
137         .gpdcon_mask =  0xffc0fff0,
138         .gpdup =        0x0000faff,
139         .gpdup_mask =   0xffffffff,
140 };
141
142 static struct mtd_partition __initdata rx3715_nand_part[] = {
143         [0] = {
144                 .name           = "Whole Flash",
145                 .offset         = 0,
146                 .size           = MTDPART_SIZ_FULL,
147                 .mask_flags     = MTD_WRITEABLE,
148         }
149 };
150
151 static struct s3c2410_nand_set __initdata rx3715_nand_sets[] = {
152         [0] = {
153                 .name           = "Internal",
154                 .nr_chips       = 1,
155                 .nr_partitions  = ARRAY_SIZE(rx3715_nand_part),
156                 .partitions     = rx3715_nand_part,
157         },
158 };
159
160 static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
161         .tacls          = 25,
162         .twrph0         = 50,
163         .twrph1         = 15,
164         .nr_sets        = ARRAY_SIZE(rx3715_nand_sets),
165         .sets           = rx3715_nand_sets,
166 };
167
168 static struct platform_device *rx3715_devices[] __initdata = {
169         &s3c_device_ohci,
170         &s3c_device_lcd,
171         &s3c_device_wdt,
172         &s3c_device_i2c0,
173         &s3c_device_iis,
174         &s3c_device_nand,
175 };
176
177 static void __init rx3715_map_io(void)
178 {
179         s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
180         s3c24xx_init_clocks(16934000);
181         s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
182 }
183
184 /* H1940 and RX3715 need to reserve this for suspend */
185 static void __init rx3715_reserve(void)
186 {
187         memblock_reserve(0x30003000, 0x1000);
188         memblock_reserve(0x30081000, 0x1000);
189 }
190
191 static void __init rx3715_init_irq(void)
192 {
193         s3c24xx_init_irq();
194 }
195
196 static void __init rx3715_init_machine(void)
197 {
198 #ifdef CONFIG_PM_H1940
199         memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
200 #endif
201         s3c_pm_init();
202
203         s3c_nand_set_platdata(&rx3715_nand_info);
204         s3c24xx_fb_set_platdata(&rx3715_fb_info);
205         platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices));
206 }
207
208 MACHINE_START(RX3715, "IPAQ-RX3715")
209         /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
210         .atag_offset    = 0x100,
211         .map_io         = rx3715_map_io,
212         .reserve        = rx3715_reserve,
213         .init_irq       = rx3715_init_irq,
214         .init_machine   = rx3715_init_machine,
215         .init_time      = s3c24xx_timer_init,
216         .restart        = s3c244x_restart,
217 MACHINE_END