arch/arm/mach-s3c24xx/mach-rx3715.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Copyright (c) 2003-2004 Simtec Electronics
   4 //      Ben Dooks <ben@simtec.co.uk>
   5 //
   6 // http://www.handhelds.org/projects/rx3715.html
   7
   8 #include <linux/kernel.h>
   9 #include <linux/types.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/list.h>
  12 #include <linux/memblock.h>
  13 #include <linux/timer.h>
  14 #include <linux/init.h>
  15 #include <linux/tty.h>
  16 #include <linux/console.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/serial_core.h>
  20 #include <linux/serial_s3c.h>
  21 #include <linux/serial.h>
  22 #include <linux/io.h>
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/rawnand.h>
  25 #include <linux/mtd/nand_ecc.h>
  26 #include <linux/mtd/partitions.h>
  27
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/irq.h>
  30 #include <asm/mach/map.h>
  31
  32 #include <linux/platform_data/mtd-nand-s3c2410.h>
  33
  34 #include <asm/irq.h>
  35 #include <asm/mach-types.h>
  36
  37 #include <mach/fb.h>
  38 #include <mach/hardware.h>
  39 #include <mach/regs-gpio.h>
  40 #include <mach/regs-lcd.h>
  41 #include <mach/gpio-samsung.h>
  42
  43 #include <plat/cpu.h>
  44 #include <plat/devs.h>
  45 #include <plat/pm.h>
  46 #include <plat/samsung-time.h>
  47
  48 #include "common.h"
  49 #include "h1940.h"
  50
  51 static struct map_desc rx3715_iodesc[] __initdata = {
  52         /* dump ISA space somewhere unused */
  53
  54         {
  55                 .virtual        = (u32)S3C24XX_VA_ISA_WORD,
  56                 .pfn            = __phys_to_pfn(S3C2410_CS3),
  57                 .length         = SZ_1M,
  58                 .type           = MT_DEVICE,
  59         }, {
  60                 .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
  61                 .pfn            = __phys_to_pfn(S3C2410_CS3),
  62                 .length         = SZ_1M,
  63                 .type           = MT_DEVICE,
  64         },
  65 };
  66
  67 static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
  68         [0] = {
  69                 .hwport      = 0,
  70                 .flags       = 0,
  71                 .ucon        = 0x3c5,
  72                 .ulcon       = 0x03,
  73                 .ufcon       = 0x51,
  74                 .clk_sel        = S3C2410_UCON_CLKSEL3,
  75         },
  76         [1] = {
  77                 .hwport      = 1,
  78                 .flags       = 0,
  79                 .ucon        = 0x3c5,
  80                 .ulcon       = 0x03,
  81                 .ufcon       = 0x00,
  82                 .clk_sel        = S3C2410_UCON_CLKSEL3,
  83         },
  84         /* IR port */
  85         [2] = {
  86                 .hwport      = 2,
  87                 .uart_flags  = UPF_CONS_FLOW,
  88                 .ucon        = 0x3c5,
  89                 .ulcon       = 0x43,
  90                 .ufcon       = 0x51,
  91                 .clk_sel        = S3C2410_UCON_CLKSEL3,
  92         }
  93 };
  94
  95 /* framebuffer lcd controller information */
  96
  97 static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
  98         .lcdcon5 =      S3C2410_LCDCON5_INVVLINE |
  99                         S3C2410_LCDCON5_FRM565 |
 100                         S3C2410_LCDCON5_HWSWP,
 101
 102         .type           = S3C2410_LCDCON1_TFT,
 103         .width          = 240,
 104         .height         = 320,
 105
 106         .pixclock       = 260000,
 107         .xres           = 240,
 108         .yres           = 320,
 109         .bpp            = 16,
 110         .left_margin    = 36,
 111         .right_margin   = 36,
 112         .hsync_len      = 8,
 113         .upper_margin   = 6,
 114         .lower_margin   = 7,
 115         .vsync_len      = 3,
 116 };
 117
 118 static struct s3c2410fb_mach_info rx3715_fb_info __initdata = {
 119
 120         .displays =     &rx3715_lcdcfg,
 121         .num_displays = 1,
 122         .default_display = 0,
 123
 124         .lpcsel =       0xf82,
 125
 126         .gpccon =       0xaa955699,
 127         .gpccon_mask =  0xffc003cc,
 128         .gpcup =        0x0000ffff,
 129         .gpcup_mask =   0xffffffff,
 130
 131         .gpdcon =       0xaa95aaa1,
 132         .gpdcon_mask =  0xffc0fff0,
 133         .gpdup =        0x0000faff,
 134         .gpdup_mask =   0xffffffff,
 135 };
 136
 137 static struct mtd_partition __initdata rx3715_nand_part[] = {
 138         [0] = {
 139                 .name           = "Whole Flash",
 140                 .offset         = 0,
 141                 .size           = MTDPART_SIZ_FULL,
 142                 .mask_flags     = MTD_WRITEABLE,
 143         }
 144 };
 145
 146 static struct s3c2410_nand_set __initdata rx3715_nand_sets[] = {
 147         [0] = {
 148                 .name           = "Internal",
 149                 .nr_chips       = 1,
 150                 .nr_partitions  = ARRAY_SIZE(rx3715_nand_part),
 151                 .partitions     = rx3715_nand_part,
 152         },
 153 };
 154
 155 static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
 156         .tacls          = 25,
 157         .twrph0         = 50,
 158         .twrph1         = 15,
 159         .nr_sets        = ARRAY_SIZE(rx3715_nand_sets),
 160         .sets           = rx3715_nand_sets,
 161         .ecc_mode       = NAND_ECC_SOFT,
 162 };
 163
 164 static struct platform_device *rx3715_devices[] __initdata = {
 165         &s3c_device_ohci,
 166         &s3c_device_lcd,
 167         &s3c_device_wdt,
 168         &s3c_device_i2c0,
 169         &s3c_device_iis,
 170         &s3c_device_nand,
 171 };
 172
 173 static void __init rx3715_map_io(void)
 174 {
 175         s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
 176         s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
 177         samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 178 }
 179
 180 static void __init rx3715_init_time(void)
 181 {
 182         s3c2440_init_clocks(16934000);
 183         samsung_timer_init();
 184 }
 185
 186 /* H1940 and RX3715 need to reserve this for suspend */
 187 static void __init rx3715_reserve(void)
 188 {
 189         memblock_reserve(0x30003000, 0x1000);
 190         memblock_reserve(0x30081000, 0x1000);
 191 }
 192
 193 static void __init rx3715_init_machine(void)
 194 {
 195 #ifdef CONFIG_PM_H1940
 196         memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
 197 #endif
 198         s3c_pm_init();
 199
 200         s3c_nand_set_platdata(&rx3715_nand_info);
 201         s3c24xx_fb_set_platdata(&rx3715_fb_info);
 202         platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices));
 203 }
 204
 205 MACHINE_START(RX3715, "IPAQ-RX3715")
 206         /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
 207         .atag_offset    = 0x100,
 208         .map_io         = rx3715_map_io,
 209         .reserve        = rx3715_reserve,
 210         .init_irq       = s3c2440_init_irq,
 211         .init_machine   = rx3715_init_machine,
 212         .init_time      = rx3715_init_time,
 213 MACHINE_END