arch/arm/mach-s3c24xx/mach-qt2410.c

   1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
   2  *
   3  * Copyright (C) 2006 by OpenMoko, Inc.
   4  * Author: Harald Welte <laforge@openmoko.org>
   5  * All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/types.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/list.h>
  28 #include <linux/timer.h>
  29 #include <linux/init.h>
  30 #include <linux/gpio.h>
  31 #include <linux/device.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/serial_core.h>
  34 #include <linux/spi/spi.h>
  35 #include <linux/spi/spi_gpio.h>
  36 #include <linux/io.h>
  37 #include <linux/mtd/mtd.h>
  38 #include <linux/mtd/nand.h>
  39 #include <linux/mtd/nand_ecc.h>
  40 #include <linux/mtd/partitions.h>
  41
  42 #include <asm/mach/arch.h>
  43 #include <asm/mach/map.h>
  44 #include <asm/mach/irq.h>
  45
  46 #include <mach/hardware.h>
  47 #include <asm/irq.h>
  48 #include <asm/mach-types.h>
  49
  50 #include <mach/regs-gpio.h>
  51 #include <mach/leds-gpio.h>
  52 #include <mach/regs-lcd.h>
  53 #include <plat/regs-serial.h>
  54 #include <mach/fb.h>
  55 #include <plat/nand.h>
  56 #include <plat/udc.h>
  57 #include <plat/iic.h>
  58
  59 #include <plat/common-smdk.h>
  60 #include <plat/gpio-cfg.h>
  61 #include <plat/devs.h>
  62 #include <plat/cpu.h>
  63 #include <plat/pm.h>
  64
  65 #include "common.h"
  66
  67 static struct map_desc qt2410_iodesc[] __initdata = {
  68         { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
  69 };
  70
  71 #define UCON S3C2410_UCON_DEFAULT
  72 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  73 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  74
  75 static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
  76         [0] = {
  77                 .hwport      = 0,
  78                 .flags       = 0,
  79                 .ucon        = UCON,
  80                 .ulcon       = ULCON,
  81                 .ufcon       = UFCON,
  82         },
  83         [1] = {
  84                 .hwport      = 1,
  85                 .flags       = 0,
  86                 .ucon        = UCON,
  87                 .ulcon       = ULCON,
  88                 .ufcon       = UFCON,
  89         },
  90         [2] = {
  91                 .hwport      = 2,
  92                 .flags       = 0,
  93                 .ucon        = UCON,
  94                 .ulcon       = ULCON,
  95                 .ufcon       = UFCON,
  96         }
  97 };
  98
  99 /* LCD driver info */
 100
 101 static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
 102         {
 103                 /* Configuration for 640x480 SHARP LQ080V3DG01 */
 104                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
 105                            S3C2410_LCDCON5_INVVLINE |
 106                            S3C2410_LCDCON5_INVVFRAME |
 107                            S3C2410_LCDCON5_PWREN |
 108                            S3C2410_LCDCON5_HWSWP,
 109
 110                 .type           = S3C2410_LCDCON1_TFT,
 111                 .width          = 640,
 112                 .height         = 480,
 113
 114                 .pixclock       = 40000, /* HCLK/4 */
 115                 .xres           = 640,
 116                 .yres           = 480,
 117                 .bpp            = 16,
 118                 .left_margin    = 44,
 119                 .right_margin   = 116,
 120                 .hsync_len      = 96,
 121                 .upper_margin   = 19,
 122                 .lower_margin   = 11,
 123                 .vsync_len      = 15,
 124         },
 125         {
 126                 /* Configuration for 480x640 toppoly TD028TTEC1 */
 127                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
 128                            S3C2410_LCDCON5_INVVLINE |
 129                            S3C2410_LCDCON5_INVVFRAME |
 130                            S3C2410_LCDCON5_PWREN |
 131                            S3C2410_LCDCON5_HWSWP,
 132
 133                 .type           = S3C2410_LCDCON1_TFT,
 134                 .width          = 480,
 135                 .height         = 640,
 136                 .pixclock       = 40000, /* HCLK/4 */
 137                 .xres           = 480,
 138                 .yres           = 640,
 139                 .bpp            = 16,
 140                 .left_margin    = 8,
 141                 .right_margin   = 24,
 142                 .hsync_len      = 8,
 143                 .upper_margin   = 2,
 144                 .lower_margin   = 4,
 145                 .vsync_len      = 2,
 146         },
 147         {
 148                 /* Config for 240x320 LCD */
 149                 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
 150                            S3C2410_LCDCON5_INVVLINE |
 151                            S3C2410_LCDCON5_INVVFRAME |
 152                            S3C2410_LCDCON5_PWREN |
 153                            S3C2410_LCDCON5_HWSWP,
 154
 155                 .type           = S3C2410_LCDCON1_TFT,
 156                 .width          = 240,
 157                 .height         = 320,
 158                 .pixclock       = 100000, /* HCLK/10 */
 159                 .xres           = 240,
 160                 .yres           = 320,
 161                 .bpp            = 16,
 162                 .left_margin    = 13,
 163                 .right_margin   = 8,
 164                 .hsync_len      = 4,
 165                 .upper_margin   = 2,
 166                 .lower_margin   = 7,
 167                 .vsync_len      = 4,
 168         },
 169 };
 170
 171
 172 static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
 173         .displays       = qt2410_lcd_cfg,
 174         .num_displays   = ARRAY_SIZE(qt2410_lcd_cfg),
 175         .default_display = 0,
 176
 177         .lpcsel         = ((0xCE6) & ~7) | 1<<4,
 178 };
 179
 180 /* CS8900 */
 181
 182 static struct resource qt2410_cs89x0_resources[] = {
 183         [0] = {
 184                 .start  = 0x19000000,
 185                 .end    = 0x19000000 + 16,
 186                 .flags  = IORESOURCE_MEM,
 187         },
 188         [1] = {
 189                 .start  = IRQ_EINT9,
 190                 .end    = IRQ_EINT9,
 191                 .flags  = IORESOURCE_IRQ,
 192         },
 193 };
 194
 195 static struct platform_device qt2410_cs89x0 = {
 196         .name           = "cirrus-cs89x0",
 197         .num_resources  = ARRAY_SIZE(qt2410_cs89x0_resources),
 198         .resource       = qt2410_cs89x0_resources,
 199 };
 200
 201 /* LED */
 202
 203 static struct s3c24xx_led_platdata qt2410_pdata_led = {
 204         .gpio           = S3C2410_GPB(0),
 205         .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
 206         .name           = "led",
 207         .def_trigger    = "timer",
 208 };
 209
 210 static struct platform_device qt2410_led = {
 211         .name           = "s3c24xx_led",
 212         .id             = 0,
 213         .dev            = {
 214                 .platform_data = &qt2410_pdata_led,
 215         },
 216 };
 217
 218 /* SPI */
 219
 220 static struct spi_gpio_platform_data spi_gpio_cfg = {
 221         .sck            = S3C2410_GPG(7),
 222         .mosi           = S3C2410_GPG(6),
 223         .miso           = S3C2410_GPG(5),
 224 };
 225
 226 static struct platform_device qt2410_spi = {
 227         .name           = "spi-gpio",
 228         .id             = 1,
 229         .dev.platform_data = &spi_gpio_cfg,
 230 };
 231
 232 /* Board devices */
 233
 234 static struct platform_device *qt2410_devices[] __initdata = {
 235         &s3c_device_ohci,
 236         &s3c_device_lcd,
 237         &s3c_device_wdt,
 238         &s3c_device_i2c0,
 239         &s3c_device_iis,
 240         &s3c_device_sdi,
 241         &s3c_device_usbgadget,
 242         &qt2410_spi,
 243         &qt2410_cs89x0,
 244         &qt2410_led,
 245 };
 246
 247 static struct mtd_partition __initdata qt2410_nand_part[] = {
 248         [0] = {
 249                 .name   = "U-Boot",
 250                 .size   = 0x30000,
 251                 .offset = 0,
 252         },
 253         [1] = {
 254                 .name   = "U-Boot environment",
 255                 .offset = 0x30000,
 256                 .size   = 0x4000,
 257         },
 258         [2] = {
 259                 .name   = "kernel",
 260                 .offset = 0x34000,
 261                 .size   = SZ_2M,
 262         },
 263         [3] = {
 264                 .name   = "initrd",
 265                 .offset = 0x234000,
 266                 .size   = SZ_4M,
 267         },
 268         [4] = {
 269                 .name   = "jffs2",
 270                 .offset = 0x634000,
 271                 .size   = 0x39cc000,
 272         },
 273 };
 274
 275 static struct s3c2410_nand_set __initdata qt2410_nand_sets[] = {
 276         [0] = {
 277                 .name           = "NAND",
 278                 .nr_chips       = 1,
 279                 .nr_partitions  = ARRAY_SIZE(qt2410_nand_part),
 280                 .partitions     = qt2410_nand_part,
 281         },
 282 };
 283
 284 /* choose a set of timings which should suit most 512Mbit
 285  * chips and beyond.
 286  */
 287
 288 static struct s3c2410_platform_nand __initdata qt2410_nand_info = {
 289         .tacls          = 20,
 290         .twrph0         = 60,
 291         .twrph1         = 20,
 292         .nr_sets        = ARRAY_SIZE(qt2410_nand_sets),
 293         .sets           = qt2410_nand_sets,
 294 };
 295
 296 /* UDC */
 297
 298 static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
 299 };
 300
 301 static char tft_type = 's';
 302
 303 static int __init qt2410_tft_setup(char *str)
 304 {
 305         tft_type = str[0];
 306         return 1;
 307 }
 308
 309 __setup("tft=", qt2410_tft_setup);
 310
 311 static void __init qt2410_map_io(void)
 312 {
 313         s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
 314         s3c24xx_init_clocks(12*1000*1000);
 315         s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
 316 }
 317
 318 static void __init qt2410_machine_init(void)
 319 {
 320         s3c_nand_set_platdata(&qt2410_nand_info);
 321
 322         switch (tft_type) {
 323         case 'p': /* production */
 324                 qt2410_fb_info.default_display = 1;
 325                 break;
 326         case 'b': /* big */
 327                 qt2410_fb_info.default_display = 0;
 328                 break;
 329         case 's': /* small */
 330         default:
 331                 qt2410_fb_info.default_display = 2;
 332                 break;
 333         }
 334         s3c24xx_fb_set_platdata(&qt2410_fb_info);
 335
 336         s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT);
 337         s3c2410_gpio_setpin(S3C2410_GPB(0), 1);
 338
 339         s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
 340         s3c_i2c0_set_platdata(NULL);
 341
 342         WARN_ON(gpio_request(S3C2410_GPB(5), "spi cs"));
 343         gpio_direction_output(S3C2410_GPB(5), 1);
 344
 345         platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
 346         s3c_pm_init();
 347 }
 348
 349 MACHINE_START(QT2410, "QT2410")
 350         .atag_offset    = 0x100,
 351         .map_io         = qt2410_map_io,
 352         .init_irq       = s3c24xx_init_irq,
 353         .init_machine   = qt2410_machine_init,
 354         .timer          = &s3c24xx_timer,
 355         .restart        = s3c2410_restart,
 356 MACHINE_END