Merge branches 'alignment', 'fixes', 'l2c' (early part) and 'misc' into for-next
[sfrench/cifs-2.6.git] / arch / arm / mach-realview / realview_pb1176.c
1 /*
2  *  linux/arch/arm/mach-realview/realview_pb1176.c
3  *
4  *  Copyright (C) 2008 ARM Limited
5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/device.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
28 #include <linux/amba/pl022.h>
29 #include <linux/mtd/physmap.h>
30 #include <linux/mtd/partitions.h>
31 #include <linux/io.h>
32 #include <linux/irqchip/arm-gic.h>
33 #include <linux/platform_data/clk-realview.h>
34 #include <linux/reboot.h>
35 #include <linux/memblock.h>
36
37 #include <mach/hardware.h>
38 #include <asm/irq.h>
39 #include <asm/mach-types.h>
40 #include <asm/pgtable.h>
41 #include <asm/hardware/cache-l2x0.h>
42
43 #include <asm/mach/arch.h>
44 #include <asm/mach/flash.h>
45 #include <asm/mach/map.h>
46 #include <asm/mach/time.h>
47
48 #include <mach/board-pb1176.h>
49 #include <mach/irqs.h>
50
51 #include "core.h"
52
53 static struct map_desc realview_pb1176_io_desc[] __initdata = {
54         {
55                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
56                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
57                 .length         = SZ_4K,
58                 .type           = MT_DEVICE,
59         }, {
60                 .virtual        = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
61                 .pfn            = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
62                 .length         = SZ_4K,
63                 .type           = MT_DEVICE,
64         }, {
65                 .virtual        = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
66                 .pfn            = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
67                 .length         = SZ_4K,
68                 .type           = MT_DEVICE,
69         }, {
70                 .virtual        = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
71                 .pfn            = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
72                 .length         = SZ_4K,
73                 .type           = MT_DEVICE,
74         }, {
75                 .virtual        = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
76                 .pfn            = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
77                 .length         = SZ_4K,
78                 .type           = MT_DEVICE,
79         }, {
80                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
81                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
82                 .length         = SZ_4K,
83                 .type           = MT_DEVICE,
84         }, {
85                 .virtual        = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
86                 .pfn            = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
87                 .length         = SZ_4K,
88                 .type           = MT_DEVICE,
89         }, {
90                 .virtual        = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
91                 .pfn            = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
92                 .length         = SZ_4K,
93                 .type           = MT_DEVICE,
94         }, {
95                 .virtual        = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
96                 .pfn            = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
97                 .length         = SZ_8K,
98                 .type           = MT_DEVICE,
99         },
100 #ifdef CONFIG_DEBUG_LL
101         {
102                 .virtual        = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
103                 .pfn            = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
104                 .length         = SZ_4K,
105                 .type           = MT_DEVICE,
106         },
107 #endif
108 };
109
110 static void __init realview_pb1176_map_io(void)
111 {
112         iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
113 }
114
115 static struct pl061_platform_data gpio0_plat_data = {
116         .gpio_base      = 0,
117 };
118
119 static struct pl061_platform_data gpio1_plat_data = {
120         .gpio_base      = 8,
121 };
122
123 static struct pl061_platform_data gpio2_plat_data = {
124         .gpio_base      = 16,
125 };
126
127 static struct pl022_ssp_controller ssp0_plat_data = {
128         .bus_id = 0,
129         .enable_dma = 0,
130         .num_chipselect = 1,
131 };
132
133 /*
134  * RealView PB1176 AMBA devices
135  */
136 #define GPIO2_IRQ       { IRQ_PB1176_GPIO2 }
137 #define GPIO3_IRQ       { IRQ_PB1176_GPIO3 }
138 #define AACI_IRQ        { IRQ_PB1176_AACI }
139 #define MMCI0_IRQ       { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
140 #define KMI0_IRQ        { IRQ_PB1176_KMI0 }
141 #define KMI1_IRQ        { IRQ_PB1176_KMI1 }
142 #define PB1176_SMC_IRQ  { }
143 #define MPMC_IRQ        { }
144 #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
145 #define SCTL_IRQ        { }
146 #define PB1176_WATCHDOG_IRQ     { IRQ_DC1176_WATCHDOG }
147 #define PB1176_GPIO0_IRQ        { IRQ_DC1176_GPIO0 }
148 #define GPIO1_IRQ       { IRQ_PB1176_GPIO1 }
149 #define PB1176_RTC_IRQ  { IRQ_DC1176_RTC }
150 #define SCI_IRQ         { IRQ_PB1176_SCI }
151 #define PB1176_UART0_IRQ        { IRQ_DC1176_UART0 }
152 #define PB1176_UART1_IRQ        { IRQ_DC1176_UART1 }
153 #define PB1176_UART2_IRQ        { IRQ_DC1176_UART2 }
154 #define PB1176_UART3_IRQ        { IRQ_DC1176_UART3 }
155 #define PB1176_UART4_IRQ        { IRQ_PB1176_UART4 }
156 #define PB1176_SSP_IRQ          { IRQ_DC1176_SSP }
157
158 /* FPGA Primecells */
159 APB_DEVICE(aaci,        "fpga:aaci",    AACI,           NULL);
160 APB_DEVICE(mmc0,        "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
161 APB_DEVICE(kmi0,        "fpga:kmi0",    KMI0,           NULL);
162 APB_DEVICE(kmi1,        "fpga:kmi1",    KMI1,           NULL);
163 APB_DEVICE(uart4,       "fpga:uart4",   PB1176_UART4,   NULL);
164
165 /* DevChip Primecells */
166 AHB_DEVICE(smc,         "dev:smc",      PB1176_SMC,     NULL);
167 AHB_DEVICE(sctl,        "dev:sctl",     SCTL,           NULL);
168 APB_DEVICE(wdog,        "dev:wdog",     PB1176_WATCHDOG,        NULL);
169 APB_DEVICE(gpio0,       "dev:gpio0",    PB1176_GPIO0,   &gpio0_plat_data);
170 APB_DEVICE(gpio1,       "dev:gpio1",    GPIO1,          &gpio1_plat_data);
171 APB_DEVICE(gpio2,       "dev:gpio2",    GPIO2,          &gpio2_plat_data);
172 APB_DEVICE(rtc,         "dev:rtc",      PB1176_RTC,     NULL);
173 APB_DEVICE(sci0,        "dev:sci0",     SCI,            NULL);
174 APB_DEVICE(uart0,       "dev:uart0",    PB1176_UART0,   NULL);
175 APB_DEVICE(uart1,       "dev:uart1",    PB1176_UART1,   NULL);
176 APB_DEVICE(uart2,       "dev:uart2",    PB1176_UART2,   NULL);
177 APB_DEVICE(uart3,       "dev:uart3",    PB1176_UART3,   NULL);
178 APB_DEVICE(ssp0,        "dev:ssp0",     PB1176_SSP,     &ssp0_plat_data);
179 AHB_DEVICE(clcd,        "dev:clcd",     PB1176_CLCD,    &clcd_plat_data);
180
181 static struct amba_device *amba_devs[] __initdata = {
182         &uart0_device,
183         &uart1_device,
184         &uart2_device,
185         &uart3_device,
186         &uart4_device,
187         &smc_device,
188         &clcd_device,
189         &sctl_device,
190         &wdog_device,
191         &gpio0_device,
192         &gpio1_device,
193         &gpio2_device,
194         &rtc_device,
195         &sci0_device,
196         &ssp0_device,
197         &aaci_device,
198         &mmc0_device,
199         &kmi0_device,
200         &kmi1_device,
201 };
202
203 /*
204  * RealView PB1176 platform devices
205  */
206 static struct resource realview_pb1176_flash_resources[] = {
207         {
208                 .start          = REALVIEW_PB1176_FLASH_BASE,
209                 .end            = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
210                 .flags          = IORESOURCE_MEM,
211         },
212 #ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
213         {
214                 .start          = REALVIEW_PB1176_SEC_FLASH_BASE,
215                 .end            = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
216                 .flags          = IORESOURCE_MEM,
217         },
218 #endif
219 };
220
221 static struct physmap_flash_data pb1176_rom_pdata = {
222         .probe_type     = "map_rom",
223         .width          = 4,
224         .nr_parts       = 0,
225 };
226
227 static struct resource pb1176_rom_resources[] = {
228         /*
229          * This exposes the PB1176 DevChip ROM as an MTD ROM mapping.
230          * The reference manual states that this is actually a pseudo-ROM
231          * programmed in NVRAM.
232          */
233         {
234                 .start          = REALVIEW_DC1176_ROM_BASE,
235                 .end            = REALVIEW_DC1176_ROM_BASE + SZ_16K - 1,
236                 .flags          = IORESOURCE_MEM,
237         }
238 };
239
240 static struct platform_device pb1176_rom_device = {
241         .name           = "physmap-flash",
242         .id             = -1,
243         .num_resources  = ARRAY_SIZE(pb1176_rom_resources),
244         .resource       = pb1176_rom_resources,
245         .dev = {
246                 .platform_data = &pb1176_rom_pdata,
247         },
248 };
249
250 static struct resource realview_pb1176_smsc911x_resources[] = {
251         [0] = {
252                 .start          = REALVIEW_PB1176_ETH_BASE,
253                 .end            = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
254                 .flags          = IORESOURCE_MEM,
255         },
256         [1] = {
257                 .start          = IRQ_PB1176_ETH,
258                 .end            = IRQ_PB1176_ETH,
259                 .flags          = IORESOURCE_IRQ,
260         },
261 };
262
263 static struct resource realview_pb1176_isp1761_resources[] = {
264         [0] = {
265                 .start          = REALVIEW_PB1176_USB_BASE,
266                 .end            = REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
267                 .flags          = IORESOURCE_MEM,
268         },
269         [1] = {
270                 .start          = IRQ_PB1176_USB,
271                 .end            = IRQ_PB1176_USB,
272                 .flags          = IORESOURCE_IRQ,
273         },
274 };
275
276 static struct resource pmu_resource = {
277         .start          = IRQ_DC1176_CORE_PMU,
278         .end            = IRQ_DC1176_CORE_PMU,
279         .flags          = IORESOURCE_IRQ,
280 };
281
282 static struct platform_device pmu_device = {
283         .name                   = "arm-pmu",
284         .id                     = -1,
285         .num_resources          = 1,
286         .resource               = &pmu_resource,
287 };
288
289 static struct resource char_lcd_resources[] = {
290         {
291                 .start = REALVIEW_CHAR_LCD_BASE,
292                 .end   = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
293                 .flags = IORESOURCE_MEM,
294         },
295         {
296                 .start  = IRQ_PB1176_CHARLCD,
297                 .end    = IRQ_PB1176_CHARLCD,
298                 .flags  = IORESOURCE_IRQ,
299         },
300 };
301
302 static struct platform_device char_lcd_device = {
303         .name           =       "arm-charlcd",
304         .id             =       -1,
305         .num_resources  =       ARRAY_SIZE(char_lcd_resources),
306         .resource       =       char_lcd_resources,
307 };
308
309 static void __init gic_init_irq(void)
310 {
311         /* ARM1176 DevChip GIC, primary */
312         gic_init(0, IRQ_DC1176_GIC_START,
313                  __io_address(REALVIEW_DC1176_GIC_DIST_BASE),
314                  __io_address(REALVIEW_DC1176_GIC_CPU_BASE));
315
316         /* board GIC, secondary */
317         gic_init(1, IRQ_PB1176_GIC_START,
318                  __io_address(REALVIEW_PB1176_GIC_DIST_BASE),
319                  __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
320         gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
321 }
322
323 static void __init realview_pb1176_timer_init(void)
324 {
325         timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
326         timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
327         timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
328         timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
329
330         realview_clk_init(__io_address(REALVIEW_SYS_BASE), true);
331         realview_timer_init(IRQ_DC1176_TIMER0);
332 }
333
334 static void realview_pb1176_restart(enum reboot_mode mode, const char *cmd)
335 {
336         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
337         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
338         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
339         __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
340         dsb();
341 }
342
343 static void realview_pb1176_fixup(struct tag *tags, char **from)
344 {
345         /*
346          * RealView PB1176 only has 128MB of RAM mapped at 0.
347          */
348         memblock_add(0, SZ_128M);
349 }
350
351 static void __init realview_pb1176_init(void)
352 {
353         int i;
354
355 #ifdef CONFIG_CACHE_L2X0
356         /*
357          * The PL220 needs to be manually configured as the hardware
358          * doesn't report the correct sizes.
359          * 128kB (16kB/way), 8-way associativity, event monitor and
360          * parity enabled, ignore share bit, no force write allocate
361          * Bits:  .... ...0 0111 0011 0000 .... .... ....
362          */
363         l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
364 #endif
365
366         realview_flash_register(realview_pb1176_flash_resources,
367                                 ARRAY_SIZE(realview_pb1176_flash_resources));
368         platform_device_register(&pb1176_rom_device);
369         realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
370         platform_device_register(&realview_i2c_device);
371         realview_usb_register(realview_pb1176_isp1761_resources);
372         platform_device_register(&pmu_device);
373         platform_device_register(&char_lcd_device);
374
375         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
376                 struct amba_device *d = amba_devs[i];
377                 amba_device_register(d, &iomem_resource);
378         }
379 }
380
381 MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
382         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
383         .atag_offset    = 0x100,
384         .fixup          = realview_pb1176_fixup,
385         .map_io         = realview_pb1176_map_io,
386         .init_early     = realview_init_early,
387         .init_irq       = gic_init_irq,
388         .init_time      = realview_pb1176_timer_init,
389         .init_machine   = realview_pb1176_init,
390 #ifdef CONFIG_ZONE_DMA
391         .dma_zone_size  = SZ_256M,
392 #endif
393         .restart        = realview_pb1176_restart,
394 MACHINE_END