Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[sfrench/cifs-2.6.git] / arch / arm / mach-pxa / mainstone.c
1 /*
2  *  linux/arch/arm/mach-pxa/mainstone.c
3  *
4  *  Support for the Intel HCDDBBVA0 Development Platform.
5  *  (go figure how they came up with such name...)
6  *
7  *  Author:     Nicolas Pitre
8  *  Created:    Nov 05, 2002
9  *  Copyright:  MontaVista Software Inc.
10  *
11  *  This program is free software; you can redistribute it and/or modify
12  *  it under the terms of the GNU General Public License version 2 as
13  *  published by the Free Software Foundation.
14  */
15 #include <linux/gpio.h>
16 #include <linux/gpio/gpio-reg.h>
17 #include <linux/gpio/machine.h>
18 #include <linux/init.h>
19 #include <linux/platform_device.h>
20 #include <linux/syscore_ops.h>
21 #include <linux/interrupt.h>
22 #include <linux/sched.h>
23 #include <linux/bitops.h>
24 #include <linux/fb.h>
25 #include <linux/ioport.h>
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/partitions.h>
28 #include <linux/input.h>
29 #include <linux/gpio_keys.h>
30 #include <linux/pwm.h>
31 #include <linux/pwm_backlight.h>
32 #include <linux/smc91x.h>
33 #include <linux/platform_data/i2c-pxa.h>
34 #include <linux/slab.h>
35 #include <linux/leds.h>
36
37 #include <asm/types.h>
38 #include <asm/setup.h>
39 #include <asm/memory.h>
40 #include <asm/mach-types.h>
41 #include <mach/hardware.h>
42 #include <asm/irq.h>
43 #include <linux/sizes.h>
44
45 #include <asm/mach/arch.h>
46 #include <asm/mach/map.h>
47 #include <asm/mach/irq.h>
48 #include <asm/mach/flash.h>
49
50 #include "pxa27x.h"
51 #include <mach/mainstone.h>
52 #include <mach/audio.h>
53 #include <linux/platform_data/video-pxafb.h>
54 #include <linux/platform_data/mmc-pxamci.h>
55 #include <linux/platform_data/irda-pxaficp.h>
56 #include <linux/platform_data/usb-ohci-pxa27x.h>
57 #include <linux/platform_data/keypad-pxa27x.h>
58 #include <mach/smemc.h>
59
60 #include "generic.h"
61 #include "devices.h"
62
63 static unsigned long mainstone_pin_config[] = {
64         /* Chip Select */
65         GPIO15_nCS_1,
66
67         /* LCD - 16bpp Active TFT */
68         GPIOxx_LCD_TFT_16BPP,
69         GPIO16_PWM0_OUT,        /* Backlight */
70
71         /* MMC */
72         GPIO32_MMC_CLK,
73         GPIO112_MMC_CMD,
74         GPIO92_MMC_DAT_0,
75         GPIO109_MMC_DAT_1,
76         GPIO110_MMC_DAT_2,
77         GPIO111_MMC_DAT_3,
78
79         /* USB Host Port 1 */
80         GPIO88_USBH1_PWR,
81         GPIO89_USBH1_PEN,
82
83         /* PC Card */
84         GPIO48_nPOE,
85         GPIO49_nPWE,
86         GPIO50_nPIOR,
87         GPIO51_nPIOW,
88         GPIO85_nPCE_1,
89         GPIO54_nPCE_2,
90         GPIO79_PSKTSEL,
91         GPIO55_nPREG,
92         GPIO56_nPWAIT,
93         GPIO57_nIOIS16,
94
95         /* AC97 */
96         GPIO28_AC97_BITCLK,
97         GPIO29_AC97_SDATA_IN_0,
98         GPIO30_AC97_SDATA_OUT,
99         GPIO31_AC97_SYNC,
100         GPIO45_AC97_SYSCLK,
101
102         /* Keypad */
103         GPIO93_KP_DKIN_0,
104         GPIO94_KP_DKIN_1,
105         GPIO95_KP_DKIN_2,
106         GPIO100_KP_MKIN_0       | WAKEUP_ON_LEVEL_HIGH,
107         GPIO101_KP_MKIN_1       | WAKEUP_ON_LEVEL_HIGH,
108         GPIO102_KP_MKIN_2       | WAKEUP_ON_LEVEL_HIGH,
109         GPIO97_KP_MKIN_3        | WAKEUP_ON_LEVEL_HIGH,
110         GPIO98_KP_MKIN_4        | WAKEUP_ON_LEVEL_HIGH,
111         GPIO99_KP_MKIN_5        | WAKEUP_ON_LEVEL_HIGH,
112         GPIO103_KP_MKOUT_0,
113         GPIO104_KP_MKOUT_1,
114         GPIO105_KP_MKOUT_2,
115         GPIO106_KP_MKOUT_3,
116         GPIO107_KP_MKOUT_4,
117         GPIO108_KP_MKOUT_5,
118         GPIO96_KP_MKOUT_6,
119
120         /* I2C */
121         GPIO117_I2C_SCL,
122         GPIO118_I2C_SDA,
123
124         /* GPIO */
125         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
126 };
127
128 static struct resource smc91x_resources[] = {
129         [0] = {
130                 .start  = (MST_ETH_PHYS + 0x300),
131                 .end    = (MST_ETH_PHYS + 0xfffff),
132                 .flags  = IORESOURCE_MEM,
133         },
134         [1] = {
135                 .start  = MAINSTONE_IRQ(3),
136                 .end    = MAINSTONE_IRQ(3),
137                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
138         }
139 };
140
141 static struct smc91x_platdata mainstone_smc91x_info = {
142         .flags  = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
143                   SMC91X_NOWAIT | SMC91X_USE_DMA,
144         .pxa_u16_align4 = true,
145 };
146
147 static struct platform_device smc91x_device = {
148         .name           = "smc91x",
149         .id             = 0,
150         .num_resources  = ARRAY_SIZE(smc91x_resources),
151         .resource       = smc91x_resources,
152         .dev            = {
153                 .platform_data = &mainstone_smc91x_info,
154         },
155 };
156
157 static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
158 {
159         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
160                 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
161         return 0;
162 }
163
164 static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
165 {
166         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
167                 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
168 }
169
170 static long mst_audio_suspend_mask;
171
172 static void mst_audio_suspend(void *priv)
173 {
174         mst_audio_suspend_mask = MST_MSCWR2;
175         MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
176 }
177
178 static void mst_audio_resume(void *priv)
179 {
180         MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
181 }
182
183 static pxa2xx_audio_ops_t mst_audio_ops = {
184         .startup        = mst_audio_startup,
185         .shutdown       = mst_audio_shutdown,
186         .suspend        = mst_audio_suspend,
187         .resume         = mst_audio_resume,
188 };
189
190 static struct resource flash_resources[] = {
191         [0] = {
192                 .start  = PXA_CS0_PHYS,
193                 .end    = PXA_CS0_PHYS + SZ_64M - 1,
194                 .flags  = IORESOURCE_MEM,
195         },
196         [1] = {
197                 .start  = PXA_CS1_PHYS,
198                 .end    = PXA_CS1_PHYS + SZ_64M - 1,
199                 .flags  = IORESOURCE_MEM,
200         },
201 };
202
203 static struct mtd_partition mainstoneflash0_partitions[] = {
204         {
205                 .name =         "Bootloader",
206                 .size =         0x00040000,
207                 .offset =       0,
208                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
209         },{
210                 .name =         "Kernel",
211                 .size =         0x00400000,
212                 .offset =       0x00040000,
213         },{
214                 .name =         "Filesystem",
215                 .size =         MTDPART_SIZ_FULL,
216                 .offset =       0x00440000
217         }
218 };
219
220 static struct flash_platform_data mst_flash_data[2] = {
221         {
222                 .map_name       = "cfi_probe",
223                 .parts          = mainstoneflash0_partitions,
224                 .nr_parts       = ARRAY_SIZE(mainstoneflash0_partitions),
225         }, {
226                 .map_name       = "cfi_probe",
227                 .parts          = NULL,
228                 .nr_parts       = 0,
229         }
230 };
231
232 static struct platform_device mst_flash_device[2] = {
233         {
234                 .name           = "pxa2xx-flash",
235                 .id             = 0,
236                 .dev = {
237                         .platform_data = &mst_flash_data[0],
238                 },
239                 .resource = &flash_resources[0],
240                 .num_resources = 1,
241         },
242         {
243                 .name           = "pxa2xx-flash",
244                 .id             = 1,
245                 .dev = {
246                         .platform_data = &mst_flash_data[1],
247                 },
248                 .resource = &flash_resources[1],
249                 .num_resources = 1,
250         },
251 };
252
253 #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
254 static struct pwm_lookup mainstone_pwm_lookup[] = {
255         PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 78770,
256                    PWM_POLARITY_NORMAL),
257 };
258
259 static struct platform_pwm_backlight_data mainstone_backlight_data = {
260         .max_brightness = 1023,
261         .dft_brightness = 1023,
262         .enable_gpio    = -1,
263 };
264
265 static struct platform_device mainstone_backlight_device = {
266         .name           = "pwm-backlight",
267         .dev            = {
268                 .parent = &pxa27x_device_pwm0.dev,
269                 .platform_data = &mainstone_backlight_data,
270         },
271 };
272
273 static void __init mainstone_backlight_register(void)
274 {
275         int ret;
276
277         pwm_add_table(mainstone_pwm_lookup, ARRAY_SIZE(mainstone_pwm_lookup));
278
279         ret = platform_device_register(&mainstone_backlight_device);
280         if (ret) {
281                 printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
282                 pwm_remove_table(mainstone_pwm_lookup,
283                                  ARRAY_SIZE(mainstone_pwm_lookup));
284         }
285 }
286 #else
287 #define mainstone_backlight_register()  do { } while (0)
288 #endif
289
290 static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
291         .pixclock               = 50000,
292         .xres                   = 640,
293         .yres                   = 480,
294         .bpp                    = 16,
295         .hsync_len              = 1,
296         .left_margin            = 0x9f,
297         .right_margin           = 1,
298         .vsync_len              = 44,
299         .upper_margin           = 0,
300         .lower_margin           = 0,
301         .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
302 };
303
304 static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
305         .pixclock               = 110000,
306         .xres                   = 240,
307         .yres                   = 320,
308         .bpp                    = 16,
309         .hsync_len              = 4,
310         .left_margin            = 8,
311         .right_margin           = 20,
312         .vsync_len              = 3,
313         .upper_margin           = 1,
314         .lower_margin           = 10,
315         .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
316 };
317
318 static struct pxafb_mach_info mainstone_pxafb_info = {
319         .num_modes              = 1,
320         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
321 };
322
323 static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
324 {
325         int err;
326
327         /* make sure SD/Memory Stick multiplexer's signals
328          * are routed to MMC controller
329          */
330         MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
331
332         err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, 0,
333                              "MMC card detect", data);
334         if (err)
335                 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
336
337         return err;
338 }
339
340 static int mainstone_mci_setpower(struct device *dev, unsigned int vdd)
341 {
342         struct pxamci_platform_data* p_d = dev->platform_data;
343
344         if (( 1 << vdd) & p_d->ocr_mask) {
345                 printk(KERN_DEBUG "%s: on\n", __func__);
346                 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
347                 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
348         } else {
349                 printk(KERN_DEBUG "%s: off\n", __func__);
350                 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
351         }
352         return 0;
353 }
354
355 static void mainstone_mci_exit(struct device *dev, void *data)
356 {
357         free_irq(MAINSTONE_MMC_IRQ, data);
358 }
359
360 static struct pxamci_platform_data mainstone_mci_platform_data = {
361         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
362         .init                   = mainstone_mci_init,
363         .setpower               = mainstone_mci_setpower,
364         .exit                   = mainstone_mci_exit,
365 };
366
367 static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
368 {
369         unsigned long flags;
370
371         local_irq_save(flags);
372         if (mode & IR_SIRMODE) {
373                 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
374         } else if (mode & IR_FIRMODE) {
375                 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
376         }
377         pxa2xx_transceiver_mode(dev, mode);
378         if (mode & IR_OFF) {
379                 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
380         } else {
381                 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
382         }
383         local_irq_restore(flags);
384 }
385
386 static struct pxaficp_platform_data mainstone_ficp_platform_data = {
387         .gpio_pwdown            = -1,
388         .transceiver_cap        = IR_SIRMODE | IR_FIRMODE | IR_OFF,
389         .transceiver_mode       = mainstone_irda_transceiver_mode,
390 };
391
392 static struct gpio_keys_button gpio_keys_button[] = {
393         [0] = {
394                 .desc   = "wakeup",
395                 .code   = KEY_SUSPEND,
396                 .type   = EV_KEY,
397                 .gpio   = 1,
398                 .wakeup = 1,
399         },
400 };
401
402 static struct gpio_keys_platform_data mainstone_gpio_keys = {
403         .buttons        = gpio_keys_button,
404         .nbuttons       = 1,
405 };
406
407 static struct platform_device mst_gpio_keys_device = {
408         .name           = "gpio-keys",
409         .id             = -1,
410         .dev            = {
411                 .platform_data  = &mainstone_gpio_keys,
412         },
413 };
414
415 static struct resource mst_cplds_resources[] = {
416         [0] = {
417                 .start  = MST_FPGA_PHYS + 0xc0,
418                 .end    = MST_FPGA_PHYS + 0xe0 - 1,
419                 .flags  = IORESOURCE_MEM,
420         },
421         [1] = {
422                 .start  = PXA_GPIO_TO_IRQ(0),
423                 .end    = PXA_GPIO_TO_IRQ(0),
424                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
425         },
426         [2] = {
427                 .start  = MAINSTONE_IRQ(0),
428                 .end    = MAINSTONE_IRQ(15),
429                 .flags  = IORESOURCE_IRQ,
430         },
431 };
432
433 static struct platform_device mst_cplds_device = {
434         .name           = "pxa_cplds_irqs",
435         .id             = -1,
436         .resource       = &mst_cplds_resources[0],
437         .num_resources  = 3,
438 };
439
440 static struct platform_device *platform_devices[] __initdata = {
441         &smc91x_device,
442         &mst_flash_device[0],
443         &mst_flash_device[1],
444         &mst_gpio_keys_device,
445         &mst_cplds_device,
446 };
447
448 static struct pxaohci_platform_data mainstone_ohci_platform_data = {
449         .port_mode      = PMM_PERPORT_MODE,
450         .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
451 };
452
453 #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
454 static const unsigned int mainstone_matrix_keys[] = {
455         KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
456         KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
457         KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
458         KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
459         KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
460         KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
461         KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
462         KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
463         KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
464
465         KEY(0, 4, KEY_DOT),     /* . */
466         KEY(1, 4, KEY_CLOSE),   /* @ */
467         KEY(4, 4, KEY_SLASH),
468         KEY(5, 4, KEY_BACKSLASH),
469         KEY(0, 5, KEY_HOME),
470         KEY(1, 5, KEY_LEFTSHIFT),
471         KEY(2, 5, KEY_SPACE),
472         KEY(3, 5, KEY_SPACE),
473         KEY(4, 5, KEY_ENTER),
474         KEY(5, 5, KEY_BACKSPACE),
475
476         KEY(0, 6, KEY_UP),
477         KEY(1, 6, KEY_DOWN),
478         KEY(2, 6, KEY_LEFT),
479         KEY(3, 6, KEY_RIGHT),
480         KEY(4, 6, KEY_SELECT),
481 };
482
483 static struct matrix_keymap_data mainstone_matrix_keymap_data = {
484         .keymap                 = mainstone_matrix_keys,
485         .keymap_size            = ARRAY_SIZE(mainstone_matrix_keys),
486 };
487
488 struct pxa27x_keypad_platform_data mainstone_keypad_info = {
489         .matrix_key_rows        = 6,
490         .matrix_key_cols        = 7,
491         .matrix_keymap_data     = &mainstone_matrix_keymap_data,
492
493         .enable_rotary0         = 1,
494         .rotary0_up_key         = KEY_UP,
495         .rotary0_down_key       = KEY_DOWN,
496
497         .debounce_interval      = 30,
498 };
499
500 static void __init mainstone_init_keypad(void)
501 {
502         pxa_set_keypad_info(&mainstone_keypad_info);
503 }
504 #else
505 static inline void mainstone_init_keypad(void) {}
506 #endif
507
508 static int mst_pcmcia0_irqs[11] = {
509         [0 ... 10] = -1,
510         [5] = MAINSTONE_S0_CD_IRQ,
511         [8] = MAINSTONE_S0_STSCHG_IRQ,
512         [10] = MAINSTONE_S0_IRQ,
513 };
514
515 static int mst_pcmcia1_irqs[11] = {
516         [0 ... 10] = -1,
517         [5] = MAINSTONE_S1_CD_IRQ,
518         [8] = MAINSTONE_S1_STSCHG_IRQ,
519         [10] = MAINSTONE_S1_IRQ,
520 };
521
522 static struct gpiod_lookup_table mainstone_pcmcia_gpio_table = {
523         .dev_id = "pxa2xx-pcmcia",
524         .table = {
525                 GPIO_LOOKUP("mst-pcmcia0",  0, "a0vpp",   GPIO_ACTIVE_HIGH),
526                 GPIO_LOOKUP("mst-pcmcia0",  1, "a1vpp",   GPIO_ACTIVE_HIGH),
527                 GPIO_LOOKUP("mst-pcmcia0",  2, "a0vcc",   GPIO_ACTIVE_HIGH),
528                 GPIO_LOOKUP("mst-pcmcia0",  3, "a1vcc",   GPIO_ACTIVE_HIGH),
529                 GPIO_LOOKUP("mst-pcmcia0",  4, "areset",  GPIO_ACTIVE_HIGH),
530                 GPIO_LOOKUP("mst-pcmcia0",  5, "adetect", GPIO_ACTIVE_LOW),
531                 GPIO_LOOKUP("mst-pcmcia0",  6, "avs1",    GPIO_ACTIVE_LOW),
532                 GPIO_LOOKUP("mst-pcmcia0",  7, "avs2",    GPIO_ACTIVE_LOW),
533                 GPIO_LOOKUP("mst-pcmcia0",  8, "abvd1",   GPIO_ACTIVE_HIGH),
534                 GPIO_LOOKUP("mst-pcmcia0",  9, "abvd2",   GPIO_ACTIVE_HIGH),
535                 GPIO_LOOKUP("mst-pcmcia0", 10, "aready",  GPIO_ACTIVE_HIGH),
536                 GPIO_LOOKUP("mst-pcmcia1",  0, "b0vpp",   GPIO_ACTIVE_HIGH),
537                 GPIO_LOOKUP("mst-pcmcia1",  1, "b1vpp",   GPIO_ACTIVE_HIGH),
538                 GPIO_LOOKUP("mst-pcmcia1",  2, "b0vcc",   GPIO_ACTIVE_HIGH),
539                 GPIO_LOOKUP("mst-pcmcia1",  3, "b1vcc",   GPIO_ACTIVE_HIGH),
540                 GPIO_LOOKUP("mst-pcmcia1",  4, "breset",  GPIO_ACTIVE_HIGH),
541                 GPIO_LOOKUP("mst-pcmcia1",  5, "bdetect", GPIO_ACTIVE_LOW),
542                 GPIO_LOOKUP("mst-pcmcia1",  6, "bvs1",    GPIO_ACTIVE_LOW),
543                 GPIO_LOOKUP("mst-pcmcia1",  7, "bvs2",    GPIO_ACTIVE_LOW),
544                 GPIO_LOOKUP("mst-pcmcia1",  8, "bbvd1",   GPIO_ACTIVE_HIGH),
545                 GPIO_LOOKUP("mst-pcmcia1",  9, "bbvd2",   GPIO_ACTIVE_HIGH),
546                 GPIO_LOOKUP("mst-pcmcia1", 10, "bready",  GPIO_ACTIVE_HIGH),
547                 { },
548         },
549 };
550
551 static void __init mainstone_init(void)
552 {
553         int SW7 = 0;  /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
554
555         pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
556
557         /* Register board control register(s) as GPIOs */
558         gpio_reg_init(NULL, (void __iomem *)&MST_PCMCIA0, -1, 11,
559                       "mst-pcmcia0", MST_PCMCIA_INPUTS, 0, NULL,
560                       NULL, mst_pcmcia0_irqs);
561         gpio_reg_init(NULL, (void __iomem *)&MST_PCMCIA1, -1, 11,
562                       "mst-pcmcia1", MST_PCMCIA_INPUTS, 0, NULL,
563                       NULL, mst_pcmcia1_irqs);
564         gpiod_add_lookup_table(&mainstone_pcmcia_gpio_table);
565
566         pxa_set_ffuart_info(NULL);
567         pxa_set_btuart_info(NULL);
568         pxa_set_stuart_info(NULL);
569
570         mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
571         mst_flash_data[1].width = 4;
572
573         /* Compensate for SW7 which swaps the flash banks */
574         mst_flash_data[SW7].name = "processor-flash";
575         mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
576
577         printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
578                mst_flash_data[0].name);
579
580         /* system bus arbiter setting
581          * - Core_Park
582          * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
583          */
584         ARB_CNTRL = ARB_CORE_PARK | 0x234;
585
586         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
587
588         /* reading Mainstone's "Virtual Configuration Register"
589            might be handy to select LCD type here */
590         if (0)
591                 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
592         else
593                 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
594
595         pxa_set_fb_info(NULL, &mainstone_pxafb_info);
596         mainstone_backlight_register();
597
598         pxa_set_mci_info(&mainstone_mci_platform_data);
599         pxa_set_ficp_info(&mainstone_ficp_platform_data);
600         pxa_set_ohci_info(&mainstone_ohci_platform_data);
601         pxa_set_i2c_info(NULL);
602         pxa_set_ac97_info(&mst_audio_ops);
603
604         mainstone_init_keypad();
605 }
606
607
608 static struct map_desc mainstone_io_desc[] __initdata = {
609         {       /* CPLD */
610                 .virtual        =  MST_FPGA_VIRT,
611                 .pfn            = __phys_to_pfn(MST_FPGA_PHYS),
612                 .length         = 0x00100000,
613                 .type           = MT_DEVICE
614         }
615 };
616
617 static void __init mainstone_map_io(void)
618 {
619         pxa27x_map_io();
620         iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
621
622         /*      for use I SRAM as framebuffer.  */
623         PSLR |= 0xF04;
624         PCFR = 0x66;
625 }
626
627 /*
628  * Driver for the 8 discrete LEDs available for general use:
629  * Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays
630  * so be sure to not monkey with them here.
631  */
632
633 #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
634 struct mainstone_led {
635         struct led_classdev     cdev;
636         u8                      mask;
637 };
638
639 /*
640  * The triggers lines up below will only be used if the
641  * LED triggers are compiled in.
642  */
643 static const struct {
644         const char *name;
645         const char *trigger;
646 } mainstone_leds[] = {
647         { "mainstone:D28", "default-on", },
648         { "mainstone:D27", "cpu0", },
649         { "mainstone:D26", "heartbeat" },
650         { "mainstone:D25", },
651         { "mainstone:D24", },
652         { "mainstone:D23", },
653         { "mainstone:D22", },
654         { "mainstone:D21", },
655 };
656
657 static void mainstone_led_set(struct led_classdev *cdev,
658                               enum led_brightness b)
659 {
660         struct mainstone_led *led = container_of(cdev,
661                                          struct mainstone_led, cdev);
662         u32 reg = MST_LEDCTRL;
663
664         if (b != LED_OFF)
665                 reg |= led->mask;
666         else
667                 reg &= ~led->mask;
668
669         MST_LEDCTRL = reg;
670 }
671
672 static enum led_brightness mainstone_led_get(struct led_classdev *cdev)
673 {
674         struct mainstone_led *led = container_of(cdev,
675                                          struct mainstone_led, cdev);
676         u32 reg = MST_LEDCTRL;
677
678         return (reg & led->mask) ? LED_FULL : LED_OFF;
679 }
680
681 static int __init mainstone_leds_init(void)
682 {
683         int i;
684
685         if (!machine_is_mainstone())
686                 return -ENODEV;
687
688         /* All ON */
689         MST_LEDCTRL |= 0xff;
690         for (i = 0; i < ARRAY_SIZE(mainstone_leds); i++) {
691                 struct mainstone_led *led;
692
693                 led = kzalloc(sizeof(*led), GFP_KERNEL);
694                 if (!led)
695                         break;
696
697                 led->cdev.name = mainstone_leds[i].name;
698                 led->cdev.brightness_set = mainstone_led_set;
699                 led->cdev.brightness_get = mainstone_led_get;
700                 led->cdev.default_trigger = mainstone_leds[i].trigger;
701                 led->mask = BIT(i);
702
703                 if (led_classdev_register(NULL, &led->cdev) < 0) {
704                         kfree(led);
705                         break;
706                 }
707         }
708
709         return 0;
710 }
711
712 /*
713  * Since we may have triggers on any subsystem, defer registration
714  * until after subsystem_init.
715  */
716 fs_initcall(mainstone_leds_init);
717 #endif
718
719 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
720         /* Maintainer: MontaVista Software Inc. */
721         .atag_offset    = 0x100,        /* BLOB boot parameter setting */
722         .map_io         = mainstone_map_io,
723         .nr_irqs        = MAINSTONE_NR_IRQS,
724         .init_irq       = pxa27x_init_irq,
725         .handle_irq     = pxa27x_handle_irq,
726         .init_time      = pxa_timer_init,
727         .init_machine   = mainstone_init,
728         .restart        = pxa_restart,
729 MACHINE_END