Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux...
[sfrench/cifs-2.6.git] / arch / arm / mach-pxa / include / mach / hardware.h
1 /*
2  *  arch/arm/mach-pxa/include/mach/hardware.h
3  *
4  *  Author:     Nicolas Pitre
5  *  Created:    Jun 15, 2001
6  *  Copyright:  MontaVista Software Inc.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #ifndef __ASM_ARCH_HARDWARE_H
14 #define __ASM_ARCH_HARDWARE_H
15
16 /*
17  * We requires absolute addresses.
18  */
19 #define PCIO_BASE               0
20
21 /*
22  * Workarounds for at least 2 errata so far require this.
23  * The mapping is set in mach-pxa/generic.c.
24  */
25 #define UNCACHED_PHYS_0         0xff000000
26 #define UNCACHED_ADDR           UNCACHED_PHYS_0
27
28 /*
29  * Intel PXA2xx internal register mapping:
30  *
31  * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
32  * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
33  * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
34  * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
35  * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
36  * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
37  * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
38  *
39  * Note that not all PXA2xx chips implement all those addresses, and the
40  * kernel only maps the minimum needed range of this mapping.
41  */
42 #define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
43 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
44
45 #ifndef __ASSEMBLY__
46
47 # define __REG(x)       (*((volatile u32 *)io_p2v(x)))
48
49 /* With indexed regs we don't want to feed the index through io_p2v()
50    especially if it is a variable, otherwise horrible code will result. */
51 # define __REG2(x,y)    \
52         (*(volatile u32 *)((u32)&__REG(x) + (y)))
53
54 # define __PREG(x)      (io_v2p((u32)&(x)))
55
56 #else
57
58 # define __REG(x)       io_p2v(x)
59 # define __PREG(x)      io_v2p(x)
60
61 #endif
62
63 #ifndef __ASSEMBLY__
64
65 #include <asm/cputype.h>
66
67 /*
68  *   CPU     Stepping     CPU_ID         JTAG_ID
69  *
70  *  PXA210      B0      0x69052922      0x2926C013
71  *  PXA210      B1      0x69052923      0x3926C013
72  *  PXA210      B2      0x69052924      0x4926C013
73  *  PXA210      C0      0x69052D25      0x5926C013
74  *
75  *  PXA250      A0      0x69052100      0x09264013
76  *  PXA250      A1      0x69052101      0x19264013
77  *  PXA250      B0      0x69052902      0x29264013
78  *  PXA250      B1      0x69052903      0x39264013
79  *  PXA250      B2      0x69052904      0x49264013
80  *  PXA250      C0      0x69052D05      0x59264013
81  *
82  *  PXA255      A0      0x69052D06      0x69264013
83  *
84  *  PXA26x      A0      0x69052903      0x39264013
85  *  PXA26x      B0      0x69052D05      0x59264013
86  *
87  *  PXA27x      A0      0x69054110      0x09265013
88  *  PXA27x      A1      0x69054111      0x19265013
89  *  PXA27x      B0      0x69054112      0x29265013
90  *  PXA27x      B1      0x69054113      0x39265013
91  *  PXA27x      C0      0x69054114      0x49265013
92  *  PXA27x      C5      0x69054117      0x79265013
93  *
94  *  PXA30x      A0      0x69056880      0x0E648013
95  *  PXA30x      A1      0x69056881      0x1E648013
96  *  PXA31x      A0      0x69056890      0x0E649013
97  *  PXA31x      A1      0x69056891      0x1E649013
98  *  PXA31x      A2      0x69056892      0x2E649013
99  *  PXA32x      B1      0x69056825      0x5E642013
100  *  PXA32x      B2      0x69056826      0x6E642013
101  *
102  *  PXA930      B0      0x69056835      0x5E643013
103  *  PXA930      B1      0x69056837      0x7E643013
104  *  PXA930      B2      0x69056838      0x8E643013
105  *
106  *  PXA935      A0      0x56056931      0x1E653013
107  *  PXA935      B0      0x56056936      0x6E653013
108  *  PXA935      B1      0x56056938      0x8E653013
109  */
110 #ifdef CONFIG_PXA25x
111 #define __cpu_is_pxa210(id)                             \
112         ({                                              \
113                 unsigned int _id = (id) & 0xf3f0;       \
114                 _id == 0x2120;                          \
115         })
116
117 #define __cpu_is_pxa250(id)                             \
118         ({                                              \
119                 unsigned int _id = (id) & 0xf3ff;       \
120                 _id <= 0x2105;                          \
121         })
122
123 #define __cpu_is_pxa255(id)                             \
124         ({                                              \
125                 unsigned int _id = (id) & 0xffff;       \
126                 _id == 0x2d06;                          \
127         })
128
129 #define __cpu_is_pxa25x(id)                             \
130         ({                                              \
131                 unsigned int _id = (id) & 0xf300;       \
132                 _id == 0x2100;                          \
133         })
134 #else
135 #define __cpu_is_pxa210(id)     (0)
136 #define __cpu_is_pxa250(id)     (0)
137 #define __cpu_is_pxa255(id)     (0)
138 #define __cpu_is_pxa25x(id)     (0)
139 #endif
140
141 #ifdef CONFIG_PXA27x
142 #define __cpu_is_pxa27x(id)                             \
143         ({                                              \
144                 unsigned int _id = (id) >> 4 & 0xfff;   \
145                 _id == 0x411;                           \
146         })
147 #else
148 #define __cpu_is_pxa27x(id)     (0)
149 #endif
150
151 #ifdef CONFIG_CPU_PXA300
152 #define __cpu_is_pxa300(id)                             \
153         ({                                              \
154                 unsigned int _id = (id) >> 4 & 0xfff;   \
155                 _id == 0x688;                           \
156          })
157 #else
158 #define __cpu_is_pxa300(id)     (0)
159 #endif
160
161 #ifdef CONFIG_CPU_PXA310
162 #define __cpu_is_pxa310(id)                             \
163         ({                                              \
164                 unsigned int _id = (id) >> 4 & 0xfff;   \
165                 _id == 0x689;                           \
166          })
167 #else
168 #define __cpu_is_pxa310(id)     (0)
169 #endif
170
171 #ifdef CONFIG_CPU_PXA320
172 #define __cpu_is_pxa320(id)                             \
173         ({                                              \
174                 unsigned int _id = (id) >> 4 & 0xfff;   \
175                 _id == 0x603 || _id == 0x682;           \
176          })
177 #else
178 #define __cpu_is_pxa320(id)     (0)
179 #endif
180
181 #ifdef CONFIG_CPU_PXA930
182 #define __cpu_is_pxa930(id)                             \
183         ({                                              \
184                 unsigned int _id = (id) >> 4 & 0xfff;   \
185                 _id == 0x683;                           \
186          })
187 #else
188 #define __cpu_is_pxa930(id)     (0)
189 #endif
190
191 #ifdef CONFIG_CPU_PXA935
192 #define __cpu_is_pxa935(id)                             \
193         ({                                              \
194                 unsigned int _id = (id) >> 4 & 0xfff;   \
195                 _id == 0x693;                           \
196          })
197 #else
198 #define __cpu_is_pxa935(id)     (0)
199 #endif
200
201 #ifdef CONFIG_CPU_PXA950
202 #define __cpu_is_pxa950(id)                             \
203         ({                                              \
204                 unsigned int _id = (id) >> 4 & 0xfff;   \
205                 _id == 0x697;                           \
206          })
207 #else
208 #define __cpu_is_pxa950(id)     (0)
209 #endif
210
211 #define cpu_is_pxa210()                                 \
212         ({                                              \
213                 __cpu_is_pxa210(read_cpuid_id());       \
214         })
215
216 #define cpu_is_pxa250()                                 \
217         ({                                              \
218                 __cpu_is_pxa250(read_cpuid_id());       \
219         })
220
221 #define cpu_is_pxa255()                                 \
222         ({                                              \
223                 __cpu_is_pxa255(read_cpuid_id());       \
224         })
225
226 #define cpu_is_pxa25x()                                 \
227         ({                                              \
228                 __cpu_is_pxa25x(read_cpuid_id());       \
229         })
230
231 #define cpu_is_pxa27x()                                 \
232         ({                                              \
233                 __cpu_is_pxa27x(read_cpuid_id());       \
234         })
235
236 #define cpu_is_pxa300()                                 \
237         ({                                              \
238                 __cpu_is_pxa300(read_cpuid_id());       \
239          })
240
241 #define cpu_is_pxa310()                                 \
242         ({                                              \
243                 __cpu_is_pxa310(read_cpuid_id());       \
244          })
245
246 #define cpu_is_pxa320()                                 \
247         ({                                              \
248                 __cpu_is_pxa320(read_cpuid_id());       \
249          })
250
251 #define cpu_is_pxa930()                                 \
252         ({                                              \
253                 __cpu_is_pxa930(read_cpuid_id());       \
254          })
255
256 #define cpu_is_pxa935()                                 \
257         ({                                              \
258                 __cpu_is_pxa935(read_cpuid_id());       \
259          })
260
261 #define cpu_is_pxa950()                                 \
262         ({                                              \
263                 __cpu_is_pxa950(read_cpuid_id());       \
264          })
265
266
267 /*
268  * CPUID Core Generation Bit
269  * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
270  * == 0x3 for pxa300/pxa310/pxa320
271  */
272 #define __cpu_is_pxa2xx(id)                             \
273         ({                                              \
274                 unsigned int _id = (id) >> 13 & 0x7;    \
275                 _id <= 0x2;                             \
276          })
277
278 #define __cpu_is_pxa3xx(id)                             \
279         ({                                              \
280                 unsigned int _id = (id) >> 13 & 0x7;    \
281                 _id == 0x3;                             \
282          })
283
284 #define __cpu_is_pxa93x(id)                             \
285         ({                                              \
286                 unsigned int _id = (id) >> 4 & 0xfff;   \
287                 _id == 0x683 || _id == 0x693;           \
288          })
289
290 #define cpu_is_pxa2xx()                                 \
291         ({                                              \
292                 __cpu_is_pxa2xx(read_cpuid_id());       \
293          })
294
295 #define cpu_is_pxa3xx()                                 \
296         ({                                              \
297                 __cpu_is_pxa3xx(read_cpuid_id());       \
298          })
299
300 #define cpu_is_pxa93x()                                 \
301         ({                                              \
302                 __cpu_is_pxa93x(read_cpuid_id());       \
303          })
304 /*
305  * return current memory and LCD clock frequency in units of 10kHz
306  */
307 extern unsigned int get_memclk_frequency_10khz(void);
308
309 /* return the clock tick rate of the OS timer */
310 extern unsigned long get_clock_tick_rate(void);
311 #endif
312
313 #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
314 #define PCIBIOS_MIN_IO          0
315 #define PCIBIOS_MIN_MEM         0
316 #define pcibios_assign_all_busses()     1
317 #endif
318
319
320 #endif  /* _ASM_ARCH_HARDWARE_H */