arch/arm/mach-pxa/cm-x255.c

   1 /*
   2  * linux/arch/arm/mach-pxa/cm-x255.c
   3  *
   4  * Copyright (C) 2007, 2008 CompuLab, Ltd.
   5  * Mike Rapoport <mike@compulab.co.il>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/irq.h>
  14 #include <linux/gpio.h>
  15 #include <linux/mtd/partitions.h>
  16 #include <linux/mtd/physmap.h>
  17 #include <linux/mtd/nand-gpio.h>
  18
  19 #include <linux/spi/spi.h>
  20
  21 #include <asm/mach/arch.h>
  22 #include <asm/mach-types.h>
  23 #include <asm/mach/map.h>
  24
  25 #include <mach/pxa25x.h>
  26 #include <mach/pxa2xx_spi.h>
  27
  28 #include "generic.h"
  29
  30 #define GPIO_NAND_CS    (5)
  31 #define GPIO_NAND_ALE   (4)
  32 #define GPIO_NAND_CLE   (3)
  33 #define GPIO_NAND_RB    (10)
  34
  35 static unsigned long cmx255_pin_config[] = {
  36         /* AC'97 */
  37         GPIO28_AC97_BITCLK,
  38         GPIO29_AC97_SDATA_IN_0,
  39         GPIO30_AC97_SDATA_OUT,
  40         GPIO31_AC97_SYNC,
  41
  42         /* BTUART */
  43         GPIO42_BTUART_RXD,
  44         GPIO43_BTUART_TXD,
  45         GPIO44_BTUART_CTS,
  46         GPIO45_BTUART_RTS,
  47
  48         /* STUART */
  49         GPIO46_STUART_RXD,
  50         GPIO47_STUART_TXD,
  51
  52         /* LCD */
  53         GPIO58_LCD_LDD_0,
  54         GPIO59_LCD_LDD_1,
  55         GPIO60_LCD_LDD_2,
  56         GPIO61_LCD_LDD_3,
  57         GPIO62_LCD_LDD_4,
  58         GPIO63_LCD_LDD_5,
  59         GPIO64_LCD_LDD_6,
  60         GPIO65_LCD_LDD_7,
  61         GPIO66_LCD_LDD_8,
  62         GPIO67_LCD_LDD_9,
  63         GPIO68_LCD_LDD_10,
  64         GPIO69_LCD_LDD_11,
  65         GPIO70_LCD_LDD_12,
  66         GPIO71_LCD_LDD_13,
  67         GPIO72_LCD_LDD_14,
  68         GPIO73_LCD_LDD_15,
  69         GPIO74_LCD_FCLK,
  70         GPIO75_LCD_LCLK,
  71         GPIO76_LCD_PCLK,
  72         GPIO77_LCD_BIAS,
  73
  74         /* SSP1 */
  75         GPIO23_SSP1_SCLK,
  76         GPIO24_SSP1_SFRM,
  77         GPIO25_SSP1_TXD,
  78         GPIO26_SSP1_RXD,
  79
  80         /* SSP2 */
  81         GPIO81_SSP2_CLK_OUT,
  82         GPIO82_SSP2_FRM_OUT,
  83         GPIO83_SSP2_TXD,
  84         GPIO84_SSP2_RXD,
  85
  86         /* PC Card */
  87         GPIO48_nPOE,
  88         GPIO49_nPWE,
  89         GPIO50_nPIOR,
  90         GPIO51_nPIOW,
  91         GPIO52_nPCE_1,
  92         GPIO53_nPCE_2,
  93         GPIO54_nPSKTSEL,
  94         GPIO55_nPREG,
  95         GPIO56_nPWAIT,
  96         GPIO57_nIOIS16,
  97
  98         /* SDRAM and local bus */
  99         GPIO15_nCS_1,
 100         GPIO78_nCS_2,
 101         GPIO79_nCS_3,
 102         GPIO80_nCS_4,
 103         GPIO33_nCS_5,
 104         GPIO18_RDY,
 105
 106         /* GPIO */
 107         GPIO0_GPIO      | WAKEUP_ON_EDGE_BOTH,
 108         GPIO9_GPIO,                             /* PC card reset */
 109
 110         /* NAND controls */
 111         GPIO5_GPIO      | MFP_LPM_DRIVE_HIGH,   /* NAND CE# */
 112         GPIO4_GPIO      | MFP_LPM_DRIVE_LOW,    /* NAND ALE */
 113         GPIO3_GPIO      | MFP_LPM_DRIVE_LOW,    /* NAND CLE */
 114         GPIO10_GPIO,                            /* NAND Ready/Busy */
 115
 116         /* interrupts */
 117         GPIO22_GPIO,    /* DM9000 interrupt */
 118 };
 119
 120 #if defined(CONFIG_SPI_PXA2XX)
 121 static struct pxa2xx_spi_master pxa_ssp_master_info = {
 122         .num_chipselect = 1,
 123 };
 124
 125 static struct spi_board_info spi_board_info[] __initdata = {
 126         [0] = {
 127                 .modalias       = "rtc-max6902",
 128                 .max_speed_hz   = 1000000,
 129                 .bus_num        = 1,
 130                 .chip_select    = 0,
 131         },
 132 };
 133
 134 static void __init cmx255_init_rtc(void)
 135 {
 136         pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
 137         spi_register_board_info(ARRAY_AND_SIZE(spi_board_info));
 138 }
 139 #else
 140 static inline void cmx255_init_rtc(void) {}
 141 #endif
 142
 143 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 144 static struct mtd_partition cmx255_nor_partitions[] = {
 145         {
 146                 .name           = "ARMmon",
 147                 .size           = 0x00030000,
 148                 .offset         = 0,
 149                 .mask_flags     = MTD_WRITEABLE  /* force read-only */
 150         } , {
 151                 .name           = "ARMmon setup block",
 152                 .size           = 0x00010000,
 153                 .offset         = MTDPART_OFS_APPEND,
 154                 .mask_flags     = MTD_WRITEABLE  /* force read-only */
 155         } , {
 156                 .name           = "kernel",
 157                 .size           = 0x00160000,
 158                 .offset         = MTDPART_OFS_APPEND,
 159         } , {
 160                 .name           = "ramdisk",
 161                 .size           = MTDPART_SIZ_FULL,
 162                 .offset         = MTDPART_OFS_APPEND
 163         }
 164 };
 165
 166 static struct physmap_flash_data cmx255_nor_flash_data[] = {
 167         {
 168                 .width          = 2,    /* bankwidth in bytes */
 169                 .parts          = cmx255_nor_partitions,
 170                 .nr_parts       = ARRAY_SIZE(cmx255_nor_partitions)
 171         }
 172 };
 173
 174 static struct resource cmx255_nor_resource = {
 175         .start  = PXA_CS0_PHYS,
 176         .end    = PXA_CS0_PHYS + SZ_8M - 1,
 177         .flags  = IORESOURCE_MEM,
 178 };
 179
 180 static struct platform_device cmx255_nor = {
 181         .name   = "physmap-flash",
 182         .id     = -1,
 183         .dev    = {
 184                 .platform_data = cmx255_nor_flash_data,
 185         },
 186         .resource = &cmx255_nor_resource,
 187         .num_resources = 1,
 188 };
 189
 190 static void __init cmx255_init_nor(void)
 191 {
 192         platform_device_register(&cmx255_nor);
 193 }
 194 #else
 195 static inline void cmx255_init_nor(void) {}
 196 #endif
 197
 198 #if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)
 199 static struct resource cmx255_nand_resource[] = {
 200         [0] = {
 201                 .start = PXA_CS1_PHYS,
 202                 .end   = PXA_CS1_PHYS + 11,
 203                 .flags = IORESOURCE_MEM,
 204         },
 205         [1] = {
 206                 .start = PXA_CS5_PHYS,
 207                 .end   = PXA_CS5_PHYS + 3,
 208                 .flags = IORESOURCE_MEM,
 209         },
 210 };
 211
 212 static struct mtd_partition cmx255_nand_parts[] = {
 213         [0] = {
 214                 .name   = "cmx255-nand",
 215                 .size   = MTDPART_SIZ_FULL,
 216                 .offset = 0,
 217         },
 218 };
 219
 220 static struct gpio_nand_platdata cmx255_nand_platdata = {
 221         .gpio_nce = GPIO_NAND_CS,
 222         .gpio_cle = GPIO_NAND_CLE,
 223         .gpio_ale = GPIO_NAND_ALE,
 224         .gpio_rdy = GPIO_NAND_RB,
 225         .gpio_nwp = -1,
 226         .parts = cmx255_nand_parts,
 227         .num_parts = ARRAY_SIZE(cmx255_nand_parts),
 228         .chip_delay = 25,
 229 };
 230
 231 static struct platform_device cmx255_nand = {
 232         .name           = "gpio-nand",
 233         .num_resources  = ARRAY_SIZE(cmx255_nand_resource),
 234         .resource       = cmx255_nand_resource,
 235         .id             = -1,
 236         .dev            = {
 237                 .platform_data = &cmx255_nand_platdata,
 238         }
 239 };
 240
 241 static void __init cmx255_init_nand(void)
 242 {
 243         platform_device_register(&cmx255_nand);
 244 }
 245 #else
 246 static inline void cmx255_init_nand(void) {}
 247 #endif
 248
 249 void __init cmx255_init(void)
 250 {
 251         pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config));
 252
 253         cmx255_init_rtc();
 254         cmx255_init_nor();
 255         cmx255_init_nand();
 256 }