Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[sfrench/cifs-2.6.git] / arch / arm / mach-omap2 / pm33xx-core.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * AM33XX Arch Power Management Routines
4  *
5  * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
6  *      Dave Gerlach
7  */
8
9 #include <asm/smp_scu.h>
10 #include <asm/suspend.h>
11 #include <linux/errno.h>
12 #include <linux/platform_data/pm33xx.h>
13
14 #include "cm33xx.h"
15 #include "common.h"
16 #include "control.h"
17 #include "clockdomain.h"
18 #include "iomap.h"
19 #include "omap_hwmod.h"
20 #include "pm.h"
21 #include "powerdomain.h"
22 #include "prm33xx.h"
23 #include "soc.h"
24 #include "sram.h"
25
26 static struct powerdomain *cefuse_pwrdm, *gfx_pwrdm, *per_pwrdm, *mpu_pwrdm;
27 static struct clockdomain *gfx_l4ls_clkdm;
28 static void __iomem *scu_base;
29 static struct omap_hwmod *rtc_oh;
30
31 static int am43xx_map_scu(void)
32 {
33         scu_base = ioremap(scu_a9_get_base(), SZ_256);
34
35         if (!scu_base)
36                 return -ENOMEM;
37
38         return 0;
39 }
40
41 static int amx3_common_init(void)
42 {
43         gfx_pwrdm = pwrdm_lookup("gfx_pwrdm");
44         per_pwrdm = pwrdm_lookup("per_pwrdm");
45         mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
46
47         if ((!gfx_pwrdm) || (!per_pwrdm) || (!mpu_pwrdm))
48                 return -ENODEV;
49
50         (void)clkdm_for_each(omap_pm_clkdms_setup, NULL);
51
52         /* CEFUSE domain can be turned off post bootup */
53         cefuse_pwrdm = pwrdm_lookup("cefuse_pwrdm");
54         if (!cefuse_pwrdm)
55                 pr_err("PM: Failed to get cefuse_pwrdm\n");
56         else if (omap_type() != OMAP2_DEVICE_TYPE_GP)
57                 pr_info("PM: Leaving EFUSE power domain active\n");
58         else
59                 omap_set_pwrdm_state(cefuse_pwrdm, PWRDM_POWER_OFF);
60
61         return 0;
62 }
63
64 static int am33xx_suspend_init(void)
65 {
66         int ret;
67
68         gfx_l4ls_clkdm = clkdm_lookup("gfx_l4ls_gfx_clkdm");
69
70         if (!gfx_l4ls_clkdm) {
71                 pr_err("PM: Cannot lookup gfx_l4ls_clkdm clockdomains\n");
72                 return -ENODEV;
73         }
74
75         ret = amx3_common_init();
76
77         return ret;
78 }
79
80 static int am43xx_suspend_init(void)
81 {
82         int ret = 0;
83
84         ret = am43xx_map_scu();
85         if (ret) {
86                 pr_err("PM: Could not ioremap SCU\n");
87                 return ret;
88         }
89
90         ret = amx3_common_init();
91
92         return ret;
93 }
94
95 static void amx3_pre_suspend_common(void)
96 {
97         omap_set_pwrdm_state(gfx_pwrdm, PWRDM_POWER_OFF);
98 }
99
100 static void amx3_post_suspend_common(void)
101 {
102         int status;
103         /*
104          * Because gfx_pwrdm is the only one under MPU control,
105          * comment on transition status
106          */
107         status = pwrdm_read_pwrst(gfx_pwrdm);
108         if (status != PWRDM_POWER_OFF)
109                 pr_err("PM: GFX domain did not transition: %x\n", status);
110 }
111
112 static int am33xx_suspend(unsigned int state, int (*fn)(unsigned long),
113                           unsigned long args)
114 {
115         int ret = 0;
116
117         amx3_pre_suspend_common();
118         ret = cpu_suspend(args, fn);
119         amx3_post_suspend_common();
120
121         /*
122          * BUG: GFX_L4LS clock domain needs to be woken up to
123          * ensure thet L4LS clock domain does not get stuck in
124          * transition. If that happens L3 module does not get
125          * disabled, thereby leading to PER power domain
126          * transition failing
127          */
128
129         clkdm_wakeup(gfx_l4ls_clkdm);
130         clkdm_sleep(gfx_l4ls_clkdm);
131
132         return ret;
133 }
134
135 static int am43xx_suspend(unsigned int state, int (*fn)(unsigned long),
136                           unsigned long args)
137 {
138         int ret = 0;
139
140         amx3_pre_suspend_common();
141         scu_power_mode(scu_base, SCU_PM_POWEROFF);
142         ret = cpu_suspend(args, fn);
143         scu_power_mode(scu_base, SCU_PM_NORMAL);
144         amx3_post_suspend_common();
145
146         return ret;
147 }
148
149 static struct am33xx_pm_sram_addr *amx3_get_sram_addrs(void)
150 {
151         if (soc_is_am33xx())
152                 return &am33xx_pm_sram;
153         else if (soc_is_am437x())
154                 return &am43xx_pm_sram;
155         else
156                 return NULL;
157 }
158
159 void __iomem *am43xx_get_rtc_base_addr(void)
160 {
161         rtc_oh = omap_hwmod_lookup("rtc");
162
163         return omap_hwmod_get_mpu_rt_va(rtc_oh);
164 }
165
166 static struct am33xx_pm_platform_data am33xx_ops = {
167         .init = am33xx_suspend_init,
168         .soc_suspend = am33xx_suspend,
169         .get_sram_addrs = amx3_get_sram_addrs,
170         .get_rtc_base_addr = am43xx_get_rtc_base_addr,
171 };
172
173 static struct am33xx_pm_platform_data am43xx_ops = {
174         .init = am43xx_suspend_init,
175         .soc_suspend = am43xx_suspend,
176         .get_sram_addrs = amx3_get_sram_addrs,
177         .get_rtc_base_addr = am43xx_get_rtc_base_addr,
178 };
179
180 static struct am33xx_pm_platform_data *am33xx_pm_get_pdata(void)
181 {
182         if (soc_is_am33xx())
183                 return &am33xx_ops;
184         else if (soc_is_am437x())
185                 return &am43xx_ops;
186         else
187                 return NULL;
188 }
189
190 int __init amx3_common_pm_init(void)
191 {
192         struct am33xx_pm_platform_data *pdata;
193         struct platform_device_info devinfo;
194
195         pdata = am33xx_pm_get_pdata();
196
197         memset(&devinfo, 0, sizeof(devinfo));
198         devinfo.name = "pm33xx";
199         devinfo.data = pdata;
200         devinfo.size_data = sizeof(*pdata);
201         devinfo.id = -1;
202         platform_device_register_full(&devinfo);
203
204         return 0;
205 }