3 * Copyright (C) 2013 Texas Instruments Incorporated
5 * Interconnects common for AM335x and AM43x
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation version 2.
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/sizes.h>
18 #include "omap_hwmod.h"
19 #include "omap_hwmod_33xx_43xx_common_data.h"
22 struct omap_hwmod_ocp_if am33xx_mpu__l3_main = {
23 .master = &am33xx_mpu_hwmod,
24 .slave = &am33xx_l3_main_hwmod,
25 .clk = "dpll_mpu_m2_ck",
30 struct omap_hwmod_ocp_if am33xx_l3_main__l3_s = {
31 .master = &am33xx_l3_main_hwmod,
32 .slave = &am33xx_l3_s_hwmod,
34 .user = OCP_USER_MPU | OCP_USER_SDMA,
37 /* l3 s -> l4 per/ls */
38 struct omap_hwmod_ocp_if am33xx_l3_s__l4_ls = {
39 .master = &am33xx_l3_s_hwmod,
40 .slave = &am33xx_l4_ls_hwmod,
42 .user = OCP_USER_MPU | OCP_USER_SDMA,
46 struct omap_hwmod_ocp_if am33xx_l3_s__l4_wkup = {
47 .master = &am33xx_l3_s_hwmod,
48 .slave = &am33xx_l4_wkup_hwmod,
50 .user = OCP_USER_MPU | OCP_USER_SDMA,
53 /* l3 main -> l3 instr */
54 struct omap_hwmod_ocp_if am33xx_l3_main__l3_instr = {
55 .master = &am33xx_l3_main_hwmod,
56 .slave = &am33xx_l3_instr_hwmod,
58 .user = OCP_USER_MPU | OCP_USER_SDMA,
62 struct omap_hwmod_ocp_if am33xx_mpu__prcm = {
63 .master = &am33xx_mpu_hwmod,
64 .slave = &am33xx_prcm_hwmod,
65 .clk = "dpll_mpu_m2_ck",
66 .user = OCP_USER_MPU | OCP_USER_SDMA,
70 struct omap_hwmod_ocp_if am33xx_l3_s__l3_main = {
71 .master = &am33xx_l3_s_hwmod,
72 .slave = &am33xx_l3_main_hwmod,
74 .user = OCP_USER_MPU | OCP_USER_SDMA,
77 /* pru-icss -> l3 main */
78 struct omap_hwmod_ocp_if am33xx_pruss__l3_main = {
79 .master = &am33xx_pruss_hwmod,
80 .slave = &am33xx_l3_main_hwmod,
82 .user = OCP_USER_MPU | OCP_USER_SDMA,
86 struct omap_hwmod_ocp_if am33xx_gfx__l3_main = {
87 .master = &am33xx_gfx_hwmod,
88 .slave = &am33xx_l3_main_hwmod,
89 .clk = "dpll_core_m4_ck",
90 .user = OCP_USER_MPU | OCP_USER_SDMA,
94 struct omap_hwmod_ocp_if am33xx_l3_main__gfx = {
95 .master = &am33xx_l3_main_hwmod,
96 .slave = &am33xx_gfx_hwmod,
97 .clk = "dpll_core_m4_ck",
98 .user = OCP_USER_MPU | OCP_USER_SDMA,
102 struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc = {
103 .master = &am33xx_l4_wkup_hwmod,
104 .slave = &am33xx_rtc_hwmod,
105 .clk = "clkdiv32k_ick",
106 .user = OCP_USER_MPU,
109 /* l4 per/ls -> DCAN0 */
110 struct omap_hwmod_ocp_if am33xx_l4_per__dcan0 = {
111 .master = &am33xx_l4_ls_hwmod,
112 .slave = &am33xx_dcan0_hwmod,
114 .user = OCP_USER_MPU | OCP_USER_SDMA,
117 /* l4 per/ls -> DCAN1 */
118 struct omap_hwmod_ocp_if am33xx_l4_per__dcan1 = {
119 .master = &am33xx_l4_ls_hwmod,
120 .slave = &am33xx_dcan1_hwmod,
122 .user = OCP_USER_MPU | OCP_USER_SDMA,
125 /* l4 per/ls -> GPIO2 */
126 struct omap_hwmod_ocp_if am33xx_l4_per__gpio1 = {
127 .master = &am33xx_l4_ls_hwmod,
128 .slave = &am33xx_gpio1_hwmod,
130 .user = OCP_USER_MPU | OCP_USER_SDMA,
133 /* l4 per/ls -> gpio3 */
134 struct omap_hwmod_ocp_if am33xx_l4_per__gpio2 = {
135 .master = &am33xx_l4_ls_hwmod,
136 .slave = &am33xx_gpio2_hwmod,
138 .user = OCP_USER_MPU | OCP_USER_SDMA,
141 /* l4 per/ls -> gpio4 */
142 struct omap_hwmod_ocp_if am33xx_l4_per__gpio3 = {
143 .master = &am33xx_l4_ls_hwmod,
144 .slave = &am33xx_gpio3_hwmod,
146 .user = OCP_USER_MPU | OCP_USER_SDMA,
149 struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
150 .master = &am33xx_cpgmac0_hwmod,
151 .slave = &am33xx_mdio_hwmod,
152 .user = OCP_USER_MPU,
155 struct omap_hwmod_ocp_if am33xx_l4_ls__elm = {
156 .master = &am33xx_l4_ls_hwmod,
157 .slave = &am33xx_elm_hwmod,
159 .user = OCP_USER_MPU,
162 struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0 = {
163 .master = &am33xx_l4_ls_hwmod,
164 .slave = &am33xx_epwmss0_hwmod,
166 .user = OCP_USER_MPU,
169 struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1 = {
170 .master = &am33xx_l4_ls_hwmod,
171 .slave = &am33xx_epwmss1_hwmod,
173 .user = OCP_USER_MPU,
176 struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2 = {
177 .master = &am33xx_l4_ls_hwmod,
178 .slave = &am33xx_epwmss2_hwmod,
180 .user = OCP_USER_MPU,
183 /* l3s cfg -> gpmc */
184 struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = {
185 .master = &am33xx_l3_s_hwmod,
186 .slave = &am33xx_gpmc_hwmod,
188 .user = OCP_USER_MPU,
192 struct omap_hwmod_ocp_if am33xx_l4_per__i2c2 = {
193 .master = &am33xx_l4_ls_hwmod,
194 .slave = &am33xx_i2c2_hwmod,
196 .user = OCP_USER_MPU,
199 struct omap_hwmod_ocp_if am33xx_l4_per__i2c3 = {
200 .master = &am33xx_l4_ls_hwmod,
201 .slave = &am33xx_i2c3_hwmod,
203 .user = OCP_USER_MPU,
206 /* l4 ls -> mailbox */
207 struct omap_hwmod_ocp_if am33xx_l4_per__mailbox = {
208 .master = &am33xx_l4_ls_hwmod,
209 .slave = &am33xx_mailbox_hwmod,
211 .user = OCP_USER_MPU,
214 /* l4 ls -> spinlock */
215 struct omap_hwmod_ocp_if am33xx_l4_ls__spinlock = {
216 .master = &am33xx_l4_ls_hwmod,
217 .slave = &am33xx_spinlock_hwmod,
219 .user = OCP_USER_MPU,
222 /* l4 ls -> mcasp0 */
223 struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp0 = {
224 .master = &am33xx_l4_ls_hwmod,
225 .slave = &am33xx_mcasp0_hwmod,
227 .user = OCP_USER_MPU,
230 /* l4 ls -> mcasp1 */
231 struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp1 = {
232 .master = &am33xx_l4_ls_hwmod,
233 .slave = &am33xx_mcasp1_hwmod,
235 .user = OCP_USER_MPU,
239 struct omap_hwmod_ocp_if am33xx_l4_ls__mmc0 = {
240 .master = &am33xx_l4_ls_hwmod,
241 .slave = &am33xx_mmc0_hwmod,
243 .user = OCP_USER_MPU,
247 struct omap_hwmod_ocp_if am33xx_l4_ls__mmc1 = {
248 .master = &am33xx_l4_ls_hwmod,
249 .slave = &am33xx_mmc1_hwmod,
251 .user = OCP_USER_MPU,
255 struct omap_hwmod_ocp_if am33xx_l3_s__mmc2 = {
256 .master = &am33xx_l3_s_hwmod,
257 .slave = &am33xx_mmc2_hwmod,
259 .user = OCP_USER_MPU,
262 /* l4 ls -> mcspi0 */
263 struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi0 = {
264 .master = &am33xx_l4_ls_hwmod,
265 .slave = &am33xx_spi0_hwmod,
267 .user = OCP_USER_MPU,
270 /* l4 ls -> mcspi1 */
271 struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi1 = {
272 .master = &am33xx_l4_ls_hwmod,
273 .slave = &am33xx_spi1_hwmod,
275 .user = OCP_USER_MPU,
278 /* l4 per -> timer2 */
279 struct omap_hwmod_ocp_if am33xx_l4_ls__timer2 = {
280 .master = &am33xx_l4_ls_hwmod,
281 .slave = &am33xx_timer2_hwmod,
283 .user = OCP_USER_MPU,
286 /* l4 per -> timer3 */
287 struct omap_hwmod_ocp_if am33xx_l4_ls__timer3 = {
288 .master = &am33xx_l4_ls_hwmod,
289 .slave = &am33xx_timer3_hwmod,
291 .user = OCP_USER_MPU,
294 /* l4 per -> timer4 */
295 struct omap_hwmod_ocp_if am33xx_l4_ls__timer4 = {
296 .master = &am33xx_l4_ls_hwmod,
297 .slave = &am33xx_timer4_hwmod,
299 .user = OCP_USER_MPU,
302 /* l4 per -> timer5 */
303 struct omap_hwmod_ocp_if am33xx_l4_ls__timer5 = {
304 .master = &am33xx_l4_ls_hwmod,
305 .slave = &am33xx_timer5_hwmod,
307 .user = OCP_USER_MPU,
310 /* l4 per -> timer6 */
311 struct omap_hwmod_ocp_if am33xx_l4_ls__timer6 = {
312 .master = &am33xx_l4_ls_hwmod,
313 .slave = &am33xx_timer6_hwmod,
315 .user = OCP_USER_MPU,
318 /* l4 per -> timer7 */
319 struct omap_hwmod_ocp_if am33xx_l4_ls__timer7 = {
320 .master = &am33xx_l4_ls_hwmod,
321 .slave = &am33xx_timer7_hwmod,
323 .user = OCP_USER_MPU,
326 /* l3 main -> tpcc */
327 struct omap_hwmod_ocp_if am33xx_l3_main__tpcc = {
328 .master = &am33xx_l3_main_hwmod,
329 .slave = &am33xx_tpcc_hwmod,
331 .user = OCP_USER_MPU,
334 /* l3 main -> tpcc0 */
335 struct omap_hwmod_ocp_if am33xx_l3_main__tptc0 = {
336 .master = &am33xx_l3_main_hwmod,
337 .slave = &am33xx_tptc0_hwmod,
339 .user = OCP_USER_MPU,
342 /* l3 main -> tpcc1 */
343 struct omap_hwmod_ocp_if am33xx_l3_main__tptc1 = {
344 .master = &am33xx_l3_main_hwmod,
345 .slave = &am33xx_tptc1_hwmod,
347 .user = OCP_USER_MPU,
350 /* l3 main -> tpcc2 */
351 struct omap_hwmod_ocp_if am33xx_l3_main__tptc2 = {
352 .master = &am33xx_l3_main_hwmod,
353 .slave = &am33xx_tptc2_hwmod,
355 .user = OCP_USER_MPU,
359 struct omap_hwmod_ocp_if am33xx_l4_ls__uart2 = {
360 .master = &am33xx_l4_ls_hwmod,
361 .slave = &am33xx_uart2_hwmod,
363 .user = OCP_USER_MPU,
367 struct omap_hwmod_ocp_if am33xx_l4_ls__uart3 = {
368 .master = &am33xx_l4_ls_hwmod,
369 .slave = &am33xx_uart3_hwmod,
371 .user = OCP_USER_MPU,
375 struct omap_hwmod_ocp_if am33xx_l4_ls__uart4 = {
376 .master = &am33xx_l4_ls_hwmod,
377 .slave = &am33xx_uart4_hwmod,
379 .user = OCP_USER_MPU,
383 struct omap_hwmod_ocp_if am33xx_l4_ls__uart5 = {
384 .master = &am33xx_l4_ls_hwmod,
385 .slave = &am33xx_uart5_hwmod,
387 .user = OCP_USER_MPU,
391 struct omap_hwmod_ocp_if am33xx_l4_ls__uart6 = {
392 .master = &am33xx_l4_ls_hwmod,
393 .slave = &am33xx_uart6_hwmod,
395 .user = OCP_USER_MPU,
398 /* l3 main -> ocmc */
399 struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = {
400 .master = &am33xx_l3_main_hwmod,
401 .slave = &am33xx_ocmcram_hwmod,
402 .user = OCP_USER_MPU | OCP_USER_SDMA,
405 /* l3 main -> sha0 HIB2 */
406 struct omap_hwmod_ocp_if am33xx_l3_main__sha0 = {
407 .master = &am33xx_l3_main_hwmod,
408 .slave = &am33xx_sha0_hwmod,
410 .user = OCP_USER_MPU | OCP_USER_SDMA,
413 /* l3 main -> AES0 HIB2 */
414 struct omap_hwmod_ocp_if am33xx_l3_main__aes0 = {
415 .master = &am33xx_l3_main_hwmod,
416 .slave = &am33xx_aes0_hwmod,
418 .user = OCP_USER_MPU | OCP_USER_SDMA,
422 struct omap_hwmod_ocp_if am33xx_l4_per__rng = {
423 .master = &am33xx_l4_ls_hwmod,
424 .slave = &am33xx_rng_hwmod,
426 .user = OCP_USER_MPU,