arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c

   1 /*
   2  * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
   3  *
   4  * Copyright (C) 2009-2011 Nokia Corporation
   5  * Paul Walmsley
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * XXX handle crossbar/shared link difference for L3?
  12  * XXX these should be marked initdata for multi-OMAP kernels
  13  */
  14 #include <asm/sizes.h>
  15
  16 #include "omap_hwmod.h"
  17 #include "l3_2xxx.h"
  18 #include "l4_2xxx.h"
  19 #include "serial.h"
  20
  21 #include "omap_hwmod_common_data.h"
  22
  23 /*
  24  * Common interconnect data
  25  */
  26
  27 /* L3 -> L4_CORE interface */
  28 struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core = {
  29         .master = &omap2xxx_l3_main_hwmod,
  30         .slave  = &omap2xxx_l4_core_hwmod,
  31         .user   = OCP_USER_MPU | OCP_USER_SDMA,
  32 };
  33
  34 /* MPU -> L3 interface */
  35 struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main = {
  36         .master = &omap2xxx_mpu_hwmod,
  37         .slave  = &omap2xxx_l3_main_hwmod,
  38         .user   = OCP_USER_MPU,
  39 };
  40
  41 /* DSS -> l3 */
  42 struct omap_hwmod_ocp_if omap2xxx_dss__l3 = {
  43         .master         = &omap2xxx_dss_core_hwmod,
  44         .slave          = &omap2xxx_l3_main_hwmod,
  45         .fw = {
  46                 .omap2 = {
  47                         .l3_perm_bit  = OMAP2_L3_CORE_FW_CONNID_DSS,
  48                         .flags  = OMAP_FIREWALL_L3,
  49                 },
  50         },
  51         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  52 };
  53
  54 /* L4_CORE -> L4_WKUP interface */
  55 struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup = {
  56         .master = &omap2xxx_l4_core_hwmod,
  57         .slave  = &omap2xxx_l4_wkup_hwmod,
  58         .user   = OCP_USER_MPU | OCP_USER_SDMA,
  59 };
  60
  61 /* L4 CORE -> UART1 interface */
  62 struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
  63         .master         = &omap2xxx_l4_core_hwmod,
  64         .slave          = &omap2xxx_uart1_hwmod,
  65         .clk            = "uart1_ick",
  66         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  67 };
  68
  69 /* L4 CORE -> UART2 interface */
  70 struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
  71         .master         = &omap2xxx_l4_core_hwmod,
  72         .slave          = &omap2xxx_uart2_hwmod,
  73         .clk            = "uart2_ick",
  74         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  75 };
  76
  77 /* L4 PER -> UART3 interface */
  78 struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
  79         .master         = &omap2xxx_l4_core_hwmod,
  80         .slave          = &omap2xxx_uart3_hwmod,
  81         .clk            = "uart3_ick",
  82         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  83 };
  84
  85 /* l4 core -> mcspi1 interface */
  86 struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1 = {
  87         .master         = &omap2xxx_l4_core_hwmod,
  88         .slave          = &omap2xxx_mcspi1_hwmod,
  89         .clk            = "mcspi1_ick",
  90         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  91 };
  92
  93 /* l4 core -> mcspi2 interface */
  94 struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {
  95         .master         = &omap2xxx_l4_core_hwmod,
  96         .slave          = &omap2xxx_mcspi2_hwmod,
  97         .clk            = "mcspi2_ick",
  98         .user           = OCP_USER_MPU | OCP_USER_SDMA,
  99 };
 100
 101 /* l4_core -> timer2 */
 102 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2 = {
 103         .master         = &omap2xxx_l4_core_hwmod,
 104         .slave          = &omap2xxx_timer2_hwmod,
 105         .clk            = "gpt2_ick",
 106         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 107 };
 108
 109 /* l4_core -> timer3 */
 110 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = {
 111         .master         = &omap2xxx_l4_core_hwmod,
 112         .slave          = &omap2xxx_timer3_hwmod,
 113         .clk            = "gpt3_ick",
 114         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 115 };
 116
 117 /* l4_core -> timer4 */
 118 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4 = {
 119         .master         = &omap2xxx_l4_core_hwmod,
 120         .slave          = &omap2xxx_timer4_hwmod,
 121         .clk            = "gpt4_ick",
 122         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 123 };
 124
 125 /* l4_core -> timer5 */
 126 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5 = {
 127         .master         = &omap2xxx_l4_core_hwmod,
 128         .slave          = &omap2xxx_timer5_hwmod,
 129         .clk            = "gpt5_ick",
 130         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 131 };
 132
 133 /* l4_core -> timer6 */
 134 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6 = {
 135         .master         = &omap2xxx_l4_core_hwmod,
 136         .slave          = &omap2xxx_timer6_hwmod,
 137         .clk            = "gpt6_ick",
 138         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 139 };
 140
 141 /* l4_core -> timer7 */
 142 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7 = {
 143         .master         = &omap2xxx_l4_core_hwmod,
 144         .slave          = &omap2xxx_timer7_hwmod,
 145         .clk            = "gpt7_ick",
 146         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 147 };
 148
 149 /* l4_core -> timer8 */
 150 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8 = {
 151         .master         = &omap2xxx_l4_core_hwmod,
 152         .slave          = &omap2xxx_timer8_hwmod,
 153         .clk            = "gpt8_ick",
 154         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 155 };
 156
 157 /* l4_core -> timer9 */
 158 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9 = {
 159         .master         = &omap2xxx_l4_core_hwmod,
 160         .slave          = &omap2xxx_timer9_hwmod,
 161         .clk            = "gpt9_ick",
 162         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 163 };
 164
 165 /* l4_core -> timer10 */
 166 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10 = {
 167         .master         = &omap2xxx_l4_core_hwmod,
 168         .slave          = &omap2xxx_timer10_hwmod,
 169         .clk            = "gpt10_ick",
 170         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 171 };
 172
 173 /* l4_core -> timer11 */
 174 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11 = {
 175         .master         = &omap2xxx_l4_core_hwmod,
 176         .slave          = &omap2xxx_timer11_hwmod,
 177         .clk            = "gpt11_ick",
 178         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 179 };
 180
 181 /* l4_core -> timer12 */
 182 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12 = {
 183         .master         = &omap2xxx_l4_core_hwmod,
 184         .slave          = &omap2xxx_timer12_hwmod,
 185         .clk            = "gpt12_ick",
 186         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 187 };
 188
 189 /* l4_core -> dss */
 190 struct omap_hwmod_ocp_if omap2xxx_l4_core__dss = {
 191         .master         = &omap2xxx_l4_core_hwmod,
 192         .slave          = &omap2xxx_dss_core_hwmod,
 193         .clk            = "dss_ick",
 194         .addr           = omap2_dss_addrs,
 195         .fw = {
 196                 .omap2 = {
 197                         .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
 198                         .flags  = OMAP_FIREWALL_L4,
 199                 },
 200         },
 201         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 202 };
 203
 204 /* l4_core -> dss_dispc */
 205 struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc = {
 206         .master         = &omap2xxx_l4_core_hwmod,
 207         .slave          = &omap2xxx_dss_dispc_hwmod,
 208         .clk            = "dss_ick",
 209         .addr           = omap2_dss_dispc_addrs,
 210         .fw = {
 211                 .omap2 = {
 212                         .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
 213                         .flags  = OMAP_FIREWALL_L4,
 214                 },
 215         },
 216         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 217 };
 218
 219 /* l4_core -> dss_rfbi */
 220 struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi = {
 221         .master         = &omap2xxx_l4_core_hwmod,
 222         .slave          = &omap2xxx_dss_rfbi_hwmod,
 223         .clk            = "dss_ick",
 224         .addr           = omap2_dss_rfbi_addrs,
 225         .fw = {
 226                 .omap2 = {
 227                         .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
 228                         .flags  = OMAP_FIREWALL_L4,
 229                 },
 230         },
 231         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 232 };
 233
 234 /* l4_core -> dss_venc */
 235 struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc = {
 236         .master         = &omap2xxx_l4_core_hwmod,
 237         .slave          = &omap2xxx_dss_venc_hwmod,
 238         .clk            = "dss_ick",
 239         .addr           = omap2_dss_venc_addrs,
 240         .fw = {
 241                 .omap2 = {
 242                         .l4_fw_region  = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
 243                         .flags  = OMAP_FIREWALL_L4,
 244                 },
 245         },
 246         .flags          = OCPIF_SWSUP_IDLE,
 247         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 248 };
 249
 250 /* l4_core -> rng */
 251 struct omap_hwmod_ocp_if omap2xxx_l4_core__rng = {
 252         .master         = &omap2xxx_l4_core_hwmod,
 253         .slave          = &omap2xxx_rng_hwmod,
 254         .clk            = "rng_ick",
 255         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 256 };
 257
 258 /* l4 core -> sham interface */
 259 struct omap_hwmod_ocp_if omap2xxx_l4_core__sham = {
 260         .master         = &omap2xxx_l4_core_hwmod,
 261         .slave          = &omap2xxx_sham_hwmod,
 262         .clk            = "sha_ick",
 263         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 264 };
 265
 266 /* l4 core -> aes interface */
 267 struct omap_hwmod_ocp_if omap2xxx_l4_core__aes = {
 268         .master         = &omap2xxx_l4_core_hwmod,
 269         .slave          = &omap2xxx_aes_hwmod,
 270         .clk            = "aes_ick",
 271         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 272 };