arch/arm/mach-omap2/hsmmc.c

   1 /*
   2  * linux/arch/arm/mach-omap2/hsmmc.c
   3  *
   4  * Copyright (C) 2007-2008 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Author: Texas Instruments
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <linux/kernel.h>
  13 #include <linux/slab.h>
  14 #include <linux/string.h>
  15 #include <linux/delay.h>
  16 #include <linux/gpio.h>
  17 #include <linux/mmc/host.h>
  18 #include <linux/platform_data/gpio-omap.h>
  19 #include <linux/platform_data/hsmmc-omap.h>
  20
  21 #include "soc.h"
  22 #include "omap_device.h"
  23 #include "omap-pm.h"
  24
  25 #include "hsmmc.h"
  26 #include "control.h"
  27
  28 #if IS_ENABLED(CONFIG_MMC_OMAP_HS)
  29
  30 static u16 control_pbias_offset;
  31 static u16 control_devconf1_offset;
  32
  33 #define HSMMC_NAME_LEN  9
  34
  35 static void omap_hsmmc1_before_set_reg(struct device *dev,
  36                                        int power_on, int vdd)
  37 {
  38         u32 reg, prog_io;
  39         struct omap_hsmmc_platform_data *mmc = dev->platform_data;
  40
  41         if (mmc->remux)
  42                 mmc->remux(dev, power_on);
  43
  44         /*
  45          * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
  46          * card with Vcc regulator (from twl4030 or whatever).  OMAP has both
  47          * 1.8V and 3.0V modes, controlled by the PBIAS register.
  48          *
  49          * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
  50          * is most naturally TWL VSIM; those pins also use PBIAS.
  51          *
  52          * FIXME handle VMMC1A as needed ...
  53          */
  54         if (power_on) {
  55                 if (cpu_is_omap2430()) {
  56                         reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
  57                         if ((1 << vdd) >= MMC_VDD_30_31)
  58                                 reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE;
  59                         else
  60                                 reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE;
  61                         omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1);
  62                 }
  63
  64                 if (mmc->internal_clock) {
  65                         reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  66                         reg |= OMAP2_MMCSDIO1ADPCLKISEL;
  67                         omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0);
  68                 }
  69
  70                 reg = omap_ctrl_readl(control_pbias_offset);
  71                 if (cpu_is_omap3630()) {
  72                         /* Set MMC I/O to 52MHz */
  73                         prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1);
  74                         prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL;
  75                         omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1);
  76                 } else {
  77                         reg |= OMAP2_PBIASSPEEDCTRL0;
  78                 }
  79                 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
  80                 omap_ctrl_writel(reg, control_pbias_offset);
  81         } else {
  82                 reg = omap_ctrl_readl(control_pbias_offset);
  83                 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
  84                 omap_ctrl_writel(reg, control_pbias_offset);
  85         }
  86 }
  87
  88 static void omap_hsmmc1_after_set_reg(struct device *dev, int power_on, int vdd)
  89 {
  90         u32 reg;
  91
  92         /* 100ms delay required for PBIAS configuration */
  93         msleep(100);
  94
  95         if (power_on) {
  96                 reg = omap_ctrl_readl(control_pbias_offset);
  97                 reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0);
  98                 if ((1 << vdd) <= MMC_VDD_165_195)
  99                         reg &= ~OMAP2_PBIASLITEVMODE0;
 100                 else
 101                         reg |= OMAP2_PBIASLITEVMODE0;
 102                 omap_ctrl_writel(reg, control_pbias_offset);
 103         } else {
 104                 reg = omap_ctrl_readl(control_pbias_offset);
 105                 reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 |
 106                         OMAP2_PBIASLITEVMODE0);
 107                 omap_ctrl_writel(reg, control_pbias_offset);
 108         }
 109 }
 110
 111 static void hsmmc2_select_input_clk_src(struct omap_hsmmc_platform_data *mmc)
 112 {
 113         u32 reg;
 114
 115         reg = omap_ctrl_readl(control_devconf1_offset);
 116         if (mmc->internal_clock)
 117                 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
 118         else
 119                 reg &= ~OMAP2_MMCSDIO2ADPCLKISEL;
 120         omap_ctrl_writel(reg, control_devconf1_offset);
 121 }
 122
 123 static void hsmmc2_before_set_reg(struct device *dev, int power_on, int vdd)
 124 {
 125         struct omap_hsmmc_platform_data *mmc = dev->platform_data;
 126
 127         if (mmc->remux)
 128                 mmc->remux(dev, power_on);
 129
 130         if (power_on)
 131                 hsmmc2_select_input_clk_src(mmc);
 132 }
 133
 134 static int am35x_hsmmc2_set_power(struct device *dev, int power_on, int vdd)
 135 {
 136         struct omap_hsmmc_platform_data *mmc = dev->platform_data;
 137
 138         if (power_on)
 139                 hsmmc2_select_input_clk_src(mmc);
 140
 141         return 0;
 142 }
 143
 144 static int nop_mmc_set_power(struct device *dev, int power_on, int vdd)
 145 {
 146         return 0;
 147 }
 148
 149 static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
 150                                         struct omap_hsmmc_platform_data *mmc)
 151 {
 152         char *hc_name;
 153
 154         hc_name = kzalloc(sizeof(char) * (HSMMC_NAME_LEN + 1), GFP_KERNEL);
 155         if (!hc_name) {
 156                 kfree(hc_name);
 157                 return -ENOMEM;
 158         }
 159
 160         if (c->name)
 161                 strncpy(hc_name, c->name, HSMMC_NAME_LEN);
 162         else
 163                 snprintf(hc_name, (HSMMC_NAME_LEN + 1), "mmc%islot%i",
 164                                                                 c->mmc, 1);
 165         mmc->name = hc_name;
 166         mmc->caps = c->caps;
 167         mmc->internal_clock = !c->ext_clock;
 168         mmc->reg_offset = 0;
 169
 170         if (c->cover_only) {
 171                 /* detect if mobile phone cover removed */
 172                 mmc->gpio_cd = -EINVAL;
 173                 mmc->gpio_cod = c->gpio_cd;
 174         } else {
 175                 /* card detect pin on the mmc socket itself */
 176                 mmc->gpio_cd = c->gpio_cd;
 177                 mmc->gpio_cod = -EINVAL;
 178         }
 179         mmc->gpio_wp = c->gpio_wp;
 180
 181         mmc->remux = c->remux;
 182         mmc->init_card = c->init_card;
 183
 184         if (c->nonremovable)
 185                 mmc->nonremovable = 1;
 186
 187         /*
 188          * NOTE:  MMC slots should have a Vcc regulator set up.
 189          * This may be from a TWL4030-family chip, another
 190          * controllable regulator, or a fixed supply.
 191          *
 192          * temporary HACK: ocr_mask instead of fixed supply
 193          */
 194         if (soc_is_am35xx())
 195                 mmc->ocr_mask = MMC_VDD_165_195 |
 196                                          MMC_VDD_26_27 |
 197                                          MMC_VDD_27_28 |
 198                                          MMC_VDD_29_30 |
 199                                          MMC_VDD_30_31 |
 200                                          MMC_VDD_31_32;
 201         else
 202                 mmc->ocr_mask = c->ocr_mask;
 203
 204         if (!soc_is_am35xx())
 205                 mmc->features |= HSMMC_HAS_PBIAS;
 206
 207         switch (c->mmc) {
 208         case 1:
 209                 if (mmc->features & HSMMC_HAS_PBIAS) {
 210                         /* on-chip level shifting via PBIAS0/PBIAS1 */
 211                         mmc->before_set_reg =
 212                                         omap_hsmmc1_before_set_reg;
 213                         mmc->after_set_reg =
 214                                         omap_hsmmc1_after_set_reg;
 215                 }
 216
 217                 if (soc_is_am35xx())
 218                         mmc->set_power = nop_mmc_set_power;
 219
 220                 /* OMAP3630 HSMMC1 supports only 4-bit */
 221                 if (cpu_is_omap3630() &&
 222                                 (c->caps & MMC_CAP_8_BIT_DATA)) {
 223                         c->caps &= ~MMC_CAP_8_BIT_DATA;
 224                         c->caps |= MMC_CAP_4_BIT_DATA;
 225                         mmc->caps = c->caps;
 226                 }
 227                 break;
 228         case 2:
 229                 if (soc_is_am35xx())
 230                         mmc->set_power = am35x_hsmmc2_set_power;
 231
 232                 if (c->ext_clock)
 233                         c->transceiver = 1;
 234                 if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) {
 235                         c->caps &= ~MMC_CAP_8_BIT_DATA;
 236                         c->caps |= MMC_CAP_4_BIT_DATA;
 237                 }
 238                 if (mmc->features & HSMMC_HAS_PBIAS) {
 239                         /* off-chip level shifting, or none */
 240                         mmc->before_set_reg = hsmmc2_before_set_reg;
 241                         mmc->after_set_reg = NULL;
 242                 }
 243                 break;
 244         case 3:
 245         case 4:
 246         case 5:
 247                 mmc->before_set_reg = NULL;
 248                 mmc->after_set_reg = NULL;
 249                 break;
 250         default:
 251                 pr_err("MMC%d configuration not supported!\n", c->mmc);
 252                 kfree(hc_name);
 253                 return -ENODEV;
 254         }
 255         return 0;
 256 }
 257
 258 static int omap_hsmmc_done;
 259
 260 void omap_hsmmc_late_init(struct omap2_hsmmc_info *c)
 261 {
 262         struct platform_device *pdev;
 263         struct omap_hsmmc_platform_data *mmc_pdata;
 264         int res;
 265
 266         if (omap_hsmmc_done != 1)
 267                 return;
 268
 269         omap_hsmmc_done++;
 270
 271         for (; c->mmc; c++) {
 272                 if (!c->deferred)
 273                         continue;
 274
 275                 pdev = c->pdev;
 276                 if (!pdev)
 277                         continue;
 278
 279                 mmc_pdata = pdev->dev.platform_data;
 280                 if (!mmc_pdata)
 281                         continue;
 282
 283                 if (c->cover_only) {
 284                         /* detect if mobile phone cover removed */
 285                         mmc_pdata->gpio_cd = -EINVAL;
 286                         mmc_pdata->gpio_cod = c->gpio_cd;
 287                 } else {
 288                         /* card detect pin on the mmc socket itself */
 289                         mmc_pdata->gpio_cd = c->gpio_cd;
 290                         mmc_pdata->gpio_cod = -EINVAL;
 291                 }
 292                 mmc_pdata->gpio_wp = c->gpio_wp;
 293
 294                 res = omap_device_register(pdev);
 295                 if (res)
 296                         pr_err("Could not late init MMC %s\n",
 297                                c->name);
 298         }
 299 }
 300
 301 #define MAX_OMAP_MMC_HWMOD_NAME_LEN             16
 302
 303 static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
 304                                         int ctrl_nr)
 305 {
 306         struct omap_hwmod *oh;
 307         struct omap_hwmod *ohs[1];
 308         struct omap_device *od;
 309         struct platform_device *pdev;
 310         char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN];
 311         struct omap_hsmmc_platform_data *mmc_data;
 312         struct omap_hsmmc_dev_attr *mmc_dev_attr;
 313         char *name;
 314         int res;
 315
 316         mmc_data = kzalloc(sizeof(*mmc_data), GFP_KERNEL);
 317         if (!mmc_data)
 318                 return;
 319
 320         res = omap_hsmmc_pdata_init(hsmmcinfo, mmc_data);
 321         if (res < 0)
 322                 goto free_mmc;
 323
 324         name = "omap_hsmmc";
 325         res = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN,
 326                      "mmc%d", ctrl_nr);
 327         WARN(res >= MAX_OMAP_MMC_HWMOD_NAME_LEN,
 328              "String buffer overflow in MMC%d device setup\n", ctrl_nr);
 329
 330         oh = omap_hwmod_lookup(oh_name);
 331         if (!oh) {
 332                 pr_err("Could not look up %s\n", oh_name);
 333                 goto free_name;
 334         }
 335         ohs[0] = oh;
 336         if (oh->dev_attr != NULL) {
 337                 mmc_dev_attr = oh->dev_attr;
 338                 mmc_data->controller_flags = mmc_dev_attr->flags;
 339                 /*
 340                  * erratum 2.1.1.128 doesn't apply if board has
 341                  * a transceiver is attached
 342                  */
 343                 if (hsmmcinfo->transceiver)
 344                         mmc_data->controller_flags &=
 345                                 ~OMAP_HSMMC_BROKEN_MULTIBLOCK_READ;
 346         }
 347
 348         pdev = platform_device_alloc(name, ctrl_nr - 1);
 349         if (!pdev) {
 350                 pr_err("Could not allocate pdev for %s\n", name);
 351                 goto free_name;
 352         }
 353         dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
 354
 355         od = omap_device_alloc(pdev, ohs, 1);
 356         if (IS_ERR(od)) {
 357                 pr_err("Could not allocate od for %s\n", name);
 358                 goto put_pdev;
 359         }
 360
 361         res = platform_device_add_data(pdev, mmc_data,
 362                               sizeof(struct omap_hsmmc_platform_data));
 363         if (res) {
 364                 pr_err("Could not add pdata for %s\n", name);
 365                 goto put_pdev;
 366         }
 367
 368         hsmmcinfo->pdev = pdev;
 369
 370         if (hsmmcinfo->deferred)
 371                 goto free_mmc;
 372
 373         res = omap_device_register(pdev);
 374         if (res) {
 375                 pr_err("Could not register od for %s\n", name);
 376                 goto free_od;
 377         }
 378
 379         goto free_mmc;
 380
 381 free_od:
 382         omap_device_delete(od);
 383
 384 put_pdev:
 385         platform_device_put(pdev);
 386
 387 free_name:
 388         kfree(mmc_data->name);
 389
 390 free_mmc:
 391         kfree(mmc_data);
 392 }
 393
 394 void __init omap_hsmmc_init(struct omap2_hsmmc_info *controllers)
 395 {
 396         if (omap_hsmmc_done)
 397                 return;
 398
 399         omap_hsmmc_done = 1;
 400
 401         if (cpu_is_omap2430()) {
 402                 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
 403                 control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
 404         } else {
 405                 control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
 406                 control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
 407         }
 408
 409         for (; controllers->mmc; controllers++)
 410                 omap_hsmmc_init_one(controllers, controllers->mmc);
 411
 412 }
 413
 414 #endif