arch/arm/mach-omap2/devices.c

   1 /*
   2  * linux/arch/arm/mach-omap2/devices.c
   3  *
   4  * OMAP2 platform device setup/initialization
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/io.h>
  17 #include <linux/clk.h>
  18
  19 #include <mach/hardware.h>
  20 #include <mach/irqs.h>
  21 #include <asm/mach-types.h>
  22 #include <asm/mach/map.h>
  23 #include <asm/pmu.h>
  24
  25 #include <plat/control.h>
  26 #include <plat/tc.h>
  27 #include <plat/board.h>
  28 #include <plat/mcbsp.h>
  29 #include <mach/gpio.h>
  30 #include <plat/mmc.h>
  31 #include <plat/dma.h>
  32
  33 #include "mux.h"
  34
  35 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  36
  37 static struct resource cam_resources[] = {
  38         {
  39                 .start          = OMAP24XX_CAMERA_BASE,
  40                 .end            = OMAP24XX_CAMERA_BASE + 0xfff,
  41                 .flags          = IORESOURCE_MEM,
  42         },
  43         {
  44                 .start          = INT_24XX_CAM_IRQ,
  45                 .flags          = IORESOURCE_IRQ,
  46         }
  47 };
  48
  49 static struct platform_device omap_cam_device = {
  50         .name           = "omap24xxcam",
  51         .id             = -1,
  52         .num_resources  = ARRAY_SIZE(cam_resources),
  53         .resource       = cam_resources,
  54 };
  55
  56 static inline void omap_init_camera(void)
  57 {
  58         platform_device_register(&omap_cam_device);
  59 }
  60
  61 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
  62
  63 static struct resource omap3isp_resources[] = {
  64         {
  65                 .start          = OMAP3430_ISP_BASE,
  66                 .end            = OMAP3430_ISP_END,
  67                 .flags          = IORESOURCE_MEM,
  68         },
  69         {
  70                 .start          = OMAP3430_ISP_CBUFF_BASE,
  71                 .end            = OMAP3430_ISP_CBUFF_END,
  72                 .flags          = IORESOURCE_MEM,
  73         },
  74         {
  75                 .start          = OMAP3430_ISP_CCP2_BASE,
  76                 .end            = OMAP3430_ISP_CCP2_END,
  77                 .flags          = IORESOURCE_MEM,
  78         },
  79         {
  80                 .start          = OMAP3430_ISP_CCDC_BASE,
  81                 .end            = OMAP3430_ISP_CCDC_END,
  82                 .flags          = IORESOURCE_MEM,
  83         },
  84         {
  85                 .start          = OMAP3430_ISP_HIST_BASE,
  86                 .end            = OMAP3430_ISP_HIST_END,
  87                 .flags          = IORESOURCE_MEM,
  88         },
  89         {
  90                 .start          = OMAP3430_ISP_H3A_BASE,
  91                 .end            = OMAP3430_ISP_H3A_END,
  92                 .flags          = IORESOURCE_MEM,
  93         },
  94         {
  95                 .start          = OMAP3430_ISP_PREV_BASE,
  96                 .end            = OMAP3430_ISP_PREV_END,
  97                 .flags          = IORESOURCE_MEM,
  98         },
  99         {
 100                 .start          = OMAP3430_ISP_RESZ_BASE,
 101                 .end            = OMAP3430_ISP_RESZ_END,
 102                 .flags          = IORESOURCE_MEM,
 103         },
 104         {
 105                 .start          = OMAP3430_ISP_SBL_BASE,
 106                 .end            = OMAP3430_ISP_SBL_END,
 107                 .flags          = IORESOURCE_MEM,
 108         },
 109         {
 110                 .start          = OMAP3430_ISP_CSI2A_BASE,
 111                 .end            = OMAP3430_ISP_CSI2A_END,
 112                 .flags          = IORESOURCE_MEM,
 113         },
 114         {
 115                 .start          = OMAP3430_ISP_CSI2PHY_BASE,
 116                 .end            = OMAP3430_ISP_CSI2PHY_END,
 117                 .flags          = IORESOURCE_MEM,
 118         },
 119         {
 120                 .start          = INT_34XX_CAM_IRQ,
 121                 .flags          = IORESOURCE_IRQ,
 122         }
 123 };
 124
 125 static struct platform_device omap3isp_device = {
 126         .name           = "omap3isp",
 127         .id             = -1,
 128         .num_resources  = ARRAY_SIZE(omap3isp_resources),
 129         .resource       = omap3isp_resources,
 130 };
 131
 132 static inline void omap_init_camera(void)
 133 {
 134         platform_device_register(&omap3isp_device);
 135 }
 136 #else
 137 static inline void omap_init_camera(void)
 138 {
 139 }
 140 #endif
 141
 142 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
 143
 144 #define MBOX_REG_SIZE   0x120
 145
 146 #ifdef CONFIG_ARCH_OMAP2
 147 static struct resource omap2_mbox_resources[] = {
 148         {
 149                 .start          = OMAP24XX_MAILBOX_BASE,
 150                 .end            = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
 151                 .flags          = IORESOURCE_MEM,
 152         },
 153         {
 154                 .start          = INT_24XX_MAIL_U0_MPU,
 155                 .flags          = IORESOURCE_IRQ,
 156                 .name           = "dsp",
 157         },
 158         {
 159                 .start          = INT_24XX_MAIL_U3_MPU,
 160                 .flags          = IORESOURCE_IRQ,
 161                 .name           = "iva",
 162         },
 163 };
 164 static int omap2_mbox_resources_sz = ARRAY_SIZE(omap2_mbox_resources);
 165 #else
 166 #define omap2_mbox_resources            NULL
 167 #define omap2_mbox_resources_sz         0
 168 #endif
 169
 170 #ifdef CONFIG_ARCH_OMAP3
 171 static struct resource omap3_mbox_resources[] = {
 172         {
 173                 .start          = OMAP34XX_MAILBOX_BASE,
 174                 .end            = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
 175                 .flags          = IORESOURCE_MEM,
 176         },
 177         {
 178                 .start          = INT_24XX_MAIL_U0_MPU,
 179                 .flags          = IORESOURCE_IRQ,
 180                 .name           = "dsp",
 181         },
 182 };
 183 static int omap3_mbox_resources_sz = ARRAY_SIZE(omap3_mbox_resources);
 184 #else
 185 #define omap3_mbox_resources            NULL
 186 #define omap3_mbox_resources_sz         0
 187 #endif
 188
 189 #ifdef CONFIG_ARCH_OMAP4
 190
 191 #define OMAP4_MBOX_REG_SIZE     0x130
 192 static struct resource omap4_mbox_resources[] = {
 193         {
 194                 .start          = OMAP44XX_MAILBOX_BASE,
 195                 .end            = OMAP44XX_MAILBOX_BASE +
 196                                         OMAP4_MBOX_REG_SIZE - 1,
 197                 .flags          = IORESOURCE_MEM,
 198         },
 199         {
 200                 .start          = OMAP44XX_IRQ_MAIL_U0,
 201                 .flags          = IORESOURCE_IRQ,
 202                 .name           = "mbox",
 203         },
 204 };
 205 static int omap4_mbox_resources_sz = ARRAY_SIZE(omap4_mbox_resources);
 206 #else
 207 #define omap4_mbox_resources            NULL
 208 #define omap4_mbox_resources_sz         0
 209 #endif
 210
 211 static struct platform_device mbox_device = {
 212         .name           = "omap-mailbox",
 213         .id             = -1,
 214 };
 215
 216 static inline void omap_init_mbox(void)
 217 {
 218         if (cpu_is_omap24xx()) {
 219                 mbox_device.resource = omap2_mbox_resources;
 220                 mbox_device.num_resources = omap2_mbox_resources_sz;
 221         } else if (cpu_is_omap34xx()) {
 222                 mbox_device.resource = omap3_mbox_resources;
 223                 mbox_device.num_resources = omap3_mbox_resources_sz;
 224         } else if (cpu_is_omap44xx()) {
 225                 mbox_device.resource = omap4_mbox_resources;
 226                 mbox_device.num_resources = omap4_mbox_resources_sz;
 227         } else {
 228                 pr_err("%s: platform not supported\n", __func__);
 229                 return;
 230         }
 231         platform_device_register(&mbox_device);
 232 }
 233 #else
 234 static inline void omap_init_mbox(void) { }
 235 #endif /* CONFIG_OMAP_MBOX_FWK */
 236
 237 static inline void omap_init_sti(void) {}
 238
 239 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
 240
 241 static struct platform_device omap_pcm = {
 242         .name   = "omap-pcm-audio",
 243         .id     = -1,
 244 };
 245
 246 /*
 247  * OMAP2420 has 2 McBSP ports
 248  * OMAP2430 has 5 McBSP ports
 249  * OMAP3 has 5 McBSP ports
 250  * OMAP4 has 4 McBSP ports
 251  */
 252 OMAP_MCBSP_PLATFORM_DEVICE(1);
 253 OMAP_MCBSP_PLATFORM_DEVICE(2);
 254 OMAP_MCBSP_PLATFORM_DEVICE(3);
 255 OMAP_MCBSP_PLATFORM_DEVICE(4);
 256 OMAP_MCBSP_PLATFORM_DEVICE(5);
 257
 258 static void omap_init_audio(void)
 259 {
 260         platform_device_register(&omap_mcbsp1);
 261         platform_device_register(&omap_mcbsp2);
 262         if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 263                 platform_device_register(&omap_mcbsp3);
 264                 platform_device_register(&omap_mcbsp4);
 265         }
 266         if (cpu_is_omap243x() || cpu_is_omap34xx())
 267                 platform_device_register(&omap_mcbsp5);
 268
 269         platform_device_register(&omap_pcm);
 270 }
 271
 272 #else
 273 static inline void omap_init_audio(void) {}
 274 #endif
 275
 276 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
 277
 278 #include <plat/mcspi.h>
 279
 280 #define OMAP2_MCSPI1_BASE               0x48098000
 281 #define OMAP2_MCSPI2_BASE               0x4809a000
 282 #define OMAP2_MCSPI3_BASE               0x480b8000
 283 #define OMAP2_MCSPI4_BASE               0x480ba000
 284
 285 #define OMAP4_MCSPI1_BASE               0x48098100
 286 #define OMAP4_MCSPI2_BASE               0x4809a100
 287 #define OMAP4_MCSPI3_BASE               0x480b8100
 288 #define OMAP4_MCSPI4_BASE               0x480ba100
 289
 290 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
 291         .num_cs         = 4,
 292 };
 293
 294 static struct resource omap2_mcspi1_resources[] = {
 295         {
 296                 .start          = OMAP2_MCSPI1_BASE,
 297                 .end            = OMAP2_MCSPI1_BASE + 0xff,
 298                 .flags          = IORESOURCE_MEM,
 299         },
 300 };
 301
 302 static struct platform_device omap2_mcspi1 = {
 303         .name           = "omap2_mcspi",
 304         .id             = 1,
 305         .num_resources  = ARRAY_SIZE(omap2_mcspi1_resources),
 306         .resource       = omap2_mcspi1_resources,
 307         .dev            = {
 308                 .platform_data = &omap2_mcspi1_config,
 309         },
 310 };
 311
 312 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
 313         .num_cs         = 2,
 314 };
 315
 316 static struct resource omap2_mcspi2_resources[] = {
 317         {
 318                 .start          = OMAP2_MCSPI2_BASE,
 319                 .end            = OMAP2_MCSPI2_BASE + 0xff,
 320                 .flags          = IORESOURCE_MEM,
 321         },
 322 };
 323
 324 static struct platform_device omap2_mcspi2 = {
 325         .name           = "omap2_mcspi",
 326         .id             = 2,
 327         .num_resources  = ARRAY_SIZE(omap2_mcspi2_resources),
 328         .resource       = omap2_mcspi2_resources,
 329         .dev            = {
 330                 .platform_data = &omap2_mcspi2_config,
 331         },
 332 };
 333
 334 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
 335         defined(CONFIG_ARCH_OMAP4)
 336 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
 337         .num_cs         = 2,
 338 };
 339
 340 static struct resource omap2_mcspi3_resources[] = {
 341         {
 342         .start          = OMAP2_MCSPI3_BASE,
 343         .end            = OMAP2_MCSPI3_BASE + 0xff,
 344         .flags          = IORESOURCE_MEM,
 345         },
 346 };
 347
 348 static struct platform_device omap2_mcspi3 = {
 349         .name           = "omap2_mcspi",
 350         .id             = 3,
 351         .num_resources  = ARRAY_SIZE(omap2_mcspi3_resources),
 352         .resource       = omap2_mcspi3_resources,
 353         .dev            = {
 354                 .platform_data = &omap2_mcspi3_config,
 355         },
 356 };
 357 #endif
 358
 359 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 360 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
 361         .num_cs         = 1,
 362 };
 363
 364 static struct resource omap2_mcspi4_resources[] = {
 365         {
 366                 .start          = OMAP2_MCSPI4_BASE,
 367                 .end            = OMAP2_MCSPI4_BASE + 0xff,
 368                 .flags          = IORESOURCE_MEM,
 369         },
 370 };
 371
 372 static struct platform_device omap2_mcspi4 = {
 373         .name           = "omap2_mcspi",
 374         .id             = 4,
 375         .num_resources  = ARRAY_SIZE(omap2_mcspi4_resources),
 376         .resource       = omap2_mcspi4_resources,
 377         .dev            = {
 378                 .platform_data = &omap2_mcspi4_config,
 379         },
 380 };
 381 #endif
 382
 383 #ifdef CONFIG_ARCH_OMAP4
 384 static inline void omap4_mcspi_fixup(void)
 385 {
 386         omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
 387         omap2_mcspi1_resources[0].end   = OMAP4_MCSPI1_BASE + 0xff;
 388         omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
 389         omap2_mcspi2_resources[0].end   = OMAP4_MCSPI2_BASE + 0xff;
 390         omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
 391         omap2_mcspi3_resources[0].end   = OMAP4_MCSPI3_BASE + 0xff;
 392         omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
 393         omap2_mcspi4_resources[0].end   = OMAP4_MCSPI4_BASE + 0xff;
 394 }
 395 #else
 396 static inline void omap4_mcspi_fixup(void)
 397 {
 398 }
 399 #endif
 400
 401 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
 402         defined(CONFIG_ARCH_OMAP4)
 403 static inline void omap2_mcspi3_init(void)
 404 {
 405         platform_device_register(&omap2_mcspi3);
 406 }
 407 #else
 408 static inline void omap2_mcspi3_init(void)
 409 {
 410 }
 411 #endif
 412
 413 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 414 static inline void omap2_mcspi4_init(void)
 415 {
 416         platform_device_register(&omap2_mcspi4);
 417 }
 418 #else
 419 static inline void omap2_mcspi4_init(void)
 420 {
 421 }
 422 #endif
 423
 424 static void omap_init_mcspi(void)
 425 {
 426         if (cpu_is_omap44xx())
 427                 omap4_mcspi_fixup();
 428
 429         platform_device_register(&omap2_mcspi1);
 430         platform_device_register(&omap2_mcspi2);
 431
 432         if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
 433                 omap2_mcspi3_init();
 434
 435         if (cpu_is_omap343x() || cpu_is_omap44xx())
 436                 omap2_mcspi4_init();
 437 }
 438
 439 #else
 440 static inline void omap_init_mcspi(void) {}
 441 #endif
 442
 443 static struct resource omap2_pmu_resource = {
 444         .start  = 3,
 445         .end    = 3,
 446         .flags  = IORESOURCE_IRQ,
 447 };
 448
 449 static struct resource omap3_pmu_resource = {
 450         .start  = INT_34XX_BENCH_MPU_EMUL,
 451         .end    = INT_34XX_BENCH_MPU_EMUL,
 452         .flags  = IORESOURCE_IRQ,
 453 };
 454
 455 static struct platform_device omap_pmu_device = {
 456         .name           = "arm-pmu",
 457         .id             = ARM_PMU_DEVICE_CPU,
 458         .num_resources  = 1,
 459 };
 460
 461 static void omap_init_pmu(void)
 462 {
 463         if (cpu_is_omap24xx())
 464                 omap_pmu_device.resource = &omap2_pmu_resource;
 465         else if (cpu_is_omap34xx())
 466                 omap_pmu_device.resource = &omap3_pmu_resource;
 467         else
 468                 return;
 469
 470         platform_device_register(&omap_pmu_device);
 471 }
 472
 473
 474 #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
 475
 476 #ifdef CONFIG_ARCH_OMAP2
 477 static struct resource omap2_sham_resources[] = {
 478         {
 479                 .start  = OMAP24XX_SEC_SHA1MD5_BASE,
 480                 .end    = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
 481                 .flags  = IORESOURCE_MEM,
 482         },
 483         {
 484                 .start  = INT_24XX_SHA1MD5,
 485                 .flags  = IORESOURCE_IRQ,
 486         }
 487 };
 488 static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
 489 #else
 490 #define omap2_sham_resources            NULL
 491 #define omap2_sham_resources_sz         0
 492 #endif
 493
 494 #ifdef CONFIG_ARCH_OMAP3
 495 static struct resource omap3_sham_resources[] = {
 496         {
 497                 .start  = OMAP34XX_SEC_SHA1MD5_BASE,
 498                 .end    = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
 499                 .flags  = IORESOURCE_MEM,
 500         },
 501         {
 502                 .start  = INT_34XX_SHA1MD52_IRQ,
 503                 .flags  = IORESOURCE_IRQ,
 504         },
 505         {
 506                 .start  = OMAP34XX_DMA_SHA1MD5_RX,
 507                 .flags  = IORESOURCE_DMA,
 508         }
 509 };
 510 static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
 511 #else
 512 #define omap3_sham_resources            NULL
 513 #define omap3_sham_resources_sz         0
 514 #endif
 515
 516 static struct platform_device sham_device = {
 517         .name           = "omap-sham",
 518         .id             = -1,
 519 };
 520
 521 static void omap_init_sham(void)
 522 {
 523         if (cpu_is_omap24xx()) {
 524                 sham_device.resource = omap2_sham_resources;
 525                 sham_device.num_resources = omap2_sham_resources_sz;
 526         } else if (cpu_is_omap34xx()) {
 527                 sham_device.resource = omap3_sham_resources;
 528                 sham_device.num_resources = omap3_sham_resources_sz;
 529         } else {
 530                 pr_err("%s: platform not supported\n", __func__);
 531                 return;
 532         }
 533         platform_device_register(&sham_device);
 534 }
 535 #else
 536 static inline void omap_init_sham(void) { }
 537 #endif
 538
 539 #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
 540
 541 #ifdef CONFIG_ARCH_OMAP24XX
 542 static struct resource omap2_aes_resources[] = {
 543         {
 544                 .start  = OMAP24XX_SEC_AES_BASE,
 545                 .end    = OMAP24XX_SEC_AES_BASE + 0x4C,
 546                 .flags  = IORESOURCE_MEM,
 547         },
 548         {
 549                 .start  = OMAP24XX_DMA_AES_TX,
 550                 .flags  = IORESOURCE_DMA,
 551         },
 552         {
 553                 .start  = OMAP24XX_DMA_AES_RX,
 554                 .flags  = IORESOURCE_DMA,
 555         }
 556 };
 557 static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
 558 #else
 559 #define omap2_aes_resources             NULL
 560 #define omap2_aes_resources_sz          0
 561 #endif
 562
 563 #ifdef CONFIG_ARCH_OMAP34XX
 564 static struct resource omap3_aes_resources[] = {
 565         {
 566                 .start  = OMAP34XX_SEC_AES_BASE,
 567                 .end    = OMAP34XX_SEC_AES_BASE + 0x4C,
 568                 .flags  = IORESOURCE_MEM,
 569         },
 570         {
 571                 .start  = OMAP34XX_DMA_AES2_TX,
 572                 .flags  = IORESOURCE_DMA,
 573         },
 574         {
 575                 .start  = OMAP34XX_DMA_AES2_RX,
 576                 .flags  = IORESOURCE_DMA,
 577         }
 578 };
 579 static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
 580 #else
 581 #define omap3_aes_resources             NULL
 582 #define omap3_aes_resources_sz          0
 583 #endif
 584
 585 static struct platform_device aes_device = {
 586         .name           = "omap-aes",
 587         .id             = -1,
 588 };
 589
 590 static void omap_init_aes(void)
 591 {
 592         if (cpu_is_omap24xx()) {
 593                 aes_device.resource = omap2_aes_resources;
 594                 aes_device.num_resources = omap2_aes_resources_sz;
 595         } else if (cpu_is_omap34xx()) {
 596                 aes_device.resource = omap3_aes_resources;
 597                 aes_device.num_resources = omap3_aes_resources_sz;
 598         } else {
 599                 pr_err("%s: platform not supported\n", __func__);
 600                 return;
 601         }
 602         platform_device_register(&aes_device);
 603 }
 604
 605 #else
 606 static inline void omap_init_aes(void) { }
 607 #endif
 608
 609 /*-------------------------------------------------------------------------*/
 610
 611 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 612
 613 #define MMCHS_SYSCONFIG                 0x0010
 614 #define MMCHS_SYSCONFIG_SWRESET         (1 << 1)
 615 #define MMCHS_SYSSTATUS                 0x0014
 616 #define MMCHS_SYSSTATUS_RESETDONE       (1 << 0)
 617
 618 static struct platform_device dummy_pdev = {
 619         .dev = {
 620                 .bus = &platform_bus_type,
 621         },
 622 };
 623
 624 /**
 625  * omap_hsmmc_reset() - Full reset of each HS-MMC controller
 626  *
 627  * Ensure that each MMC controller is fully reset.  Controllers
 628  * left in an unknown state (by bootloader) may prevent retention
 629  * or OFF-mode.  This is especially important in cases where the
 630  * MMC driver is not enabled, _or_ built as a module.
 631  *
 632  * In order for reset to work, interface, functional and debounce
 633  * clocks must be enabled.  The debounce clock comes from func_32k_clk
 634  * and is not under SW control, so we only enable i- and f-clocks.
 635  **/
 636 static void __init omap_hsmmc_reset(void)
 637 {
 638         u32 i, nr_controllers;
 639
 640         if (cpu_is_omap242x())
 641                 return;
 642
 643         nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
 644                 (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
 645
 646         for (i = 0; i < nr_controllers; i++) {
 647                 u32 v, base = 0;
 648                 struct clk *iclk, *fclk;
 649                 struct device *dev = &dummy_pdev.dev;
 650
 651                 switch (i) {
 652                 case 0:
 653                         base = OMAP2_MMC1_BASE;
 654                         break;
 655                 case 1:
 656                         base = OMAP2_MMC2_BASE;
 657                         break;
 658                 case 2:
 659                         base = OMAP3_MMC3_BASE;
 660                         break;
 661                 case 3:
 662                         if (!cpu_is_omap44xx())
 663                                 return;
 664                         base = OMAP4_MMC4_BASE;
 665                         break;
 666                 case 4:
 667                         if (!cpu_is_omap44xx())
 668                                 return;
 669                         base = OMAP4_MMC5_BASE;
 670                         break;
 671                 }
 672
 673                 if (cpu_is_omap44xx())
 674                         base += OMAP4_MMC_REG_OFFSET;
 675
 676                 dummy_pdev.id = i;
 677                 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
 678                 iclk = clk_get(dev, "ick");
 679                 if (iclk && clk_enable(iclk))
 680                         iclk = NULL;
 681
 682                 fclk = clk_get(dev, "fck");
 683                 if (fclk && clk_enable(fclk))
 684                         fclk = NULL;
 685
 686                 if (!iclk || !fclk) {
 687                         printk(KERN_WARNING
 688                                "%s: Unable to enable clocks for MMC%d, "
 689                                "cannot reset.\n",  __func__, i);
 690                         break;
 691                 }
 692
 693                 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
 694                 v = omap_readl(base + MMCHS_SYSSTATUS);
 695                 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
 696                          MMCHS_SYSSTATUS_RESETDONE))
 697                         cpu_relax();
 698
 699                 if (fclk) {
 700                         clk_disable(fclk);
 701                         clk_put(fclk);
 702                 }
 703                 if (iclk) {
 704                         clk_disable(iclk);
 705                         clk_put(iclk);
 706                 }
 707         }
 708 }
 709 #else
 710 static inline void omap_hsmmc_reset(void) {}
 711 #endif
 712
 713 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
 714         defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
 715
 716 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
 717                         int controller_nr)
 718 {
 719         if ((mmc_controller->slots[0].switch_pin > 0) && \
 720                 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
 721                 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
 722                                         OMAP_PIN_INPUT_PULLUP);
 723         if ((mmc_controller->slots[0].gpio_wp > 0) && \
 724                 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
 725                 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
 726                                         OMAP_PIN_INPUT_PULLUP);
 727
 728         if (cpu_is_omap2420() && controller_nr == 0) {
 729                 omap_mux_init_signal("sdmmc_cmd", 0);
 730                 omap_mux_init_signal("sdmmc_clki", 0);
 731                 omap_mux_init_signal("sdmmc_clko", 0);
 732                 omap_mux_init_signal("sdmmc_dat0", 0);
 733                 omap_mux_init_signal("sdmmc_dat_dir0", 0);
 734                 omap_mux_init_signal("sdmmc_cmd_dir", 0);
 735                 if (mmc_controller->slots[0].wires == 4) {
 736                         omap_mux_init_signal("sdmmc_dat1", 0);
 737                         omap_mux_init_signal("sdmmc_dat2", 0);
 738                         omap_mux_init_signal("sdmmc_dat3", 0);
 739                         omap_mux_init_signal("sdmmc_dat_dir1", 0);
 740                         omap_mux_init_signal("sdmmc_dat_dir2", 0);
 741                         omap_mux_init_signal("sdmmc_dat_dir3", 0);
 742                 }
 743
 744                 /*
 745                  * Use internal loop-back in MMC/SDIO Module Input Clock
 746                  * selection
 747                  */
 748                 if (mmc_controller->slots[0].internal_clock) {
 749                         u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 750                         v |= (1 << 24);
 751                         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
 752                 }
 753         }
 754
 755         if (cpu_is_omap34xx()) {
 756                 if (controller_nr == 0) {
 757                         omap_mux_init_signal("sdmmc1_clk",
 758                                 OMAP_PIN_INPUT_PULLUP);
 759                         omap_mux_init_signal("sdmmc1_cmd",
 760                                 OMAP_PIN_INPUT_PULLUP);
 761                         omap_mux_init_signal("sdmmc1_dat0",
 762                                 OMAP_PIN_INPUT_PULLUP);
 763                         if (mmc_controller->slots[0].wires == 4 ||
 764                                 mmc_controller->slots[0].wires == 8) {
 765                                 omap_mux_init_signal("sdmmc1_dat1",
 766                                         OMAP_PIN_INPUT_PULLUP);
 767                                 omap_mux_init_signal("sdmmc1_dat2",
 768                                         OMAP_PIN_INPUT_PULLUP);
 769                                 omap_mux_init_signal("sdmmc1_dat3",
 770                                         OMAP_PIN_INPUT_PULLUP);
 771                         }
 772                         if (mmc_controller->slots[0].wires == 8) {
 773                                 omap_mux_init_signal("sdmmc1_dat4",
 774                                         OMAP_PIN_INPUT_PULLUP);
 775                                 omap_mux_init_signal("sdmmc1_dat5",
 776                                         OMAP_PIN_INPUT_PULLUP);
 777                                 omap_mux_init_signal("sdmmc1_dat6",
 778                                         OMAP_PIN_INPUT_PULLUP);
 779                                 omap_mux_init_signal("sdmmc1_dat7",
 780                                         OMAP_PIN_INPUT_PULLUP);
 781                         }
 782                 }
 783                 if (controller_nr == 1) {
 784                         /* MMC2 */
 785                         omap_mux_init_signal("sdmmc2_clk",
 786                                 OMAP_PIN_INPUT_PULLUP);
 787                         omap_mux_init_signal("sdmmc2_cmd",
 788                                 OMAP_PIN_INPUT_PULLUP);
 789                         omap_mux_init_signal("sdmmc2_dat0",
 790                                 OMAP_PIN_INPUT_PULLUP);
 791
 792                         /*
 793                          * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
 794                          * in the board-*.c files
 795                          */
 796                         if (mmc_controller->slots[0].wires == 4 ||
 797                                 mmc_controller->slots[0].wires == 8) {
 798                                 omap_mux_init_signal("sdmmc2_dat1",
 799                                         OMAP_PIN_INPUT_PULLUP);
 800                                 omap_mux_init_signal("sdmmc2_dat2",
 801                                         OMAP_PIN_INPUT_PULLUP);
 802                                 omap_mux_init_signal("sdmmc2_dat3",
 803                                         OMAP_PIN_INPUT_PULLUP);
 804                         }
 805                         if (mmc_controller->slots[0].wires == 8) {
 806                                 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
 807                                         OMAP_PIN_INPUT_PULLUP);
 808                                 omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5",
 809                                         OMAP_PIN_INPUT_PULLUP);
 810                                 omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6",
 811                                         OMAP_PIN_INPUT_PULLUP);
 812                                 omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7",
 813                                         OMAP_PIN_INPUT_PULLUP);
 814                         }
 815                 }
 816
 817                 /*
 818                  * For MMC3 the pins need to be muxed in the board-*.c files
 819                  */
 820         }
 821 }
 822
 823 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 824                         int nr_controllers)
 825 {
 826         int i;
 827         char *name;
 828
 829         for (i = 0; i < nr_controllers; i++) {
 830                 unsigned long base, size;
 831                 unsigned int irq = 0;
 832
 833                 if (!mmc_data[i])
 834                         continue;
 835
 836                 omap2_mmc_mux(mmc_data[i], i);
 837
 838                 switch (i) {
 839                 case 0:
 840                         base = OMAP2_MMC1_BASE;
 841                         irq = INT_24XX_MMC_IRQ;
 842                         break;
 843                 case 1:
 844                         base = OMAP2_MMC2_BASE;
 845                         irq = INT_24XX_MMC2_IRQ;
 846                         break;
 847                 case 2:
 848                         if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
 849                                 return;
 850                         base = OMAP3_MMC3_BASE;
 851                         irq = INT_34XX_MMC3_IRQ;
 852                         break;
 853                 case 3:
 854                         if (!cpu_is_omap44xx())
 855                                 return;
 856                         base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET;
 857                         irq = OMAP44XX_IRQ_MMC4;
 858                         break;
 859                 case 4:
 860                         if (!cpu_is_omap44xx())
 861                                 return;
 862                         base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
 863                         irq = OMAP44XX_IRQ_MMC5;
 864                         break;
 865                 default:
 866                         continue;
 867                 }
 868
 869                 if (cpu_is_omap2420()) {
 870                         size = OMAP2420_MMC_SIZE;
 871                         name = "mmci-omap";
 872                 } else if (cpu_is_omap44xx()) {
 873                         if (i < 3) {
 874                                 base += OMAP4_MMC_REG_OFFSET;
 875                                 irq += OMAP44XX_IRQ_GIC_START;
 876                         }
 877                         size = OMAP4_HSMMC_SIZE;
 878                         name = "mmci-omap-hs";
 879                 } else {
 880                         size = OMAP3_HSMMC_SIZE;
 881                         name = "mmci-omap-hs";
 882                 }
 883                 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
 884         };
 885 }
 886
 887 #endif
 888
 889 /*-------------------------------------------------------------------------*/
 890
 891 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
 892 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
 893 #define OMAP_HDQ_BASE   0x480B2000
 894 #endif
 895 static struct resource omap_hdq_resources[] = {
 896         {
 897                 .start          = OMAP_HDQ_BASE,
 898                 .end            = OMAP_HDQ_BASE + 0x1C,
 899                 .flags          = IORESOURCE_MEM,
 900         },
 901         {
 902                 .start          = INT_24XX_HDQ_IRQ,
 903                 .flags          = IORESOURCE_IRQ,
 904         },
 905 };
 906 static struct platform_device omap_hdq_dev = {
 907         .name = "omap_hdq",
 908         .id = 0,
 909         .dev = {
 910                 .platform_data = NULL,
 911         },
 912         .num_resources  = ARRAY_SIZE(omap_hdq_resources),
 913         .resource       = omap_hdq_resources,
 914 };
 915 static inline void omap_hdq_init(void)
 916 {
 917         (void) platform_device_register(&omap_hdq_dev);
 918 }
 919 #else
 920 static inline void omap_hdq_init(void) {}
 921 #endif
 922
 923 /*---------------------------------------------------------------------------*/
 924
 925 #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
 926         defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
 927 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
 928 static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
 929 };
 930 #else
 931 static struct resource omap_vout_resource[2] = {
 932 };
 933 #endif
 934
 935 static struct platform_device omap_vout_device = {
 936         .name           = "omap_vout",
 937         .num_resources  = ARRAY_SIZE(omap_vout_resource),
 938         .resource       = &omap_vout_resource[0],
 939         .id             = -1,
 940 };
 941 static void omap_init_vout(void)
 942 {
 943         if (platform_device_register(&omap_vout_device) < 0)
 944                 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
 945 }
 946 #else
 947 static inline void omap_init_vout(void) {}
 948 #endif
 949
 950 /*-------------------------------------------------------------------------*/
 951
 952 static int __init omap2_init_devices(void)
 953 {
 954         /* please keep these calls, and their implementations above,
 955          * in alphabetical order so they're easier to sort through.
 956          */
 957         omap_hsmmc_reset();
 958         omap_init_audio();
 959         omap_init_camera();
 960         omap_init_mbox();
 961         omap_init_mcspi();
 962         omap_init_pmu();
 963         omap_hdq_init();
 964         omap_init_sti();
 965         omap_init_sham();
 966         omap_init_aes();
 967         omap_init_vout();
 968
 969         return 0;
 970 }
 971 arch_initcall(omap2_init_devices);