arch/arm/mach-omap1/board-h3.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-h3.c
   3  *
   4  * This file contains OMAP1710 H3 specific code.
   5  *
   6  * Copyright (C) 2004 Texas Instruments, Inc.
   7  * Copyright (C) 2002 MontaVista Software, Inc.
   8  * Copyright (C) 2001 RidgeRun, Inc.
   9  * Author: RidgeRun, Inc.
  10  *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/init.h>
  19 #include <linux/major.h>
  20 #include <linux/kernel.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/errno.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/i2c.h>
  25 #include <linux/mtd/mtd.h>
  26 #include <linux/mtd/nand.h>
  27 #include <linux/mtd/partitions.h>
  28 #include <linux/input.h>
  29 #include <linux/i2c/tps65010.h>
  30
  31 #include <asm/setup.h>
  32 #include <asm/page.h>
  33 #include <asm/hardware.h>
  34 #include <asm/gpio.h>
  35
  36 #include <asm/mach-types.h>
  37 #include <asm/mach/arch.h>
  38 #include <asm/mach/flash.h>
  39 #include <asm/mach/map.h>
  40
  41 #include <asm/arch/gpioexpander.h>
  42 #include <asm/arch/irqs.h>
  43 #include <asm/arch/mux.h>
  44 #include <asm/arch/tc.h>
  45 #include <asm/arch/nand.h>
  46 #include <asm/arch/irda.h>
  47 #include <asm/arch/usb.h>
  48 #include <asm/arch/keypad.h>
  49 #include <asm/arch/dma.h>
  50 #include <asm/arch/common.h>
  51 #include <asm/arch/mcbsp.h>
  52 #include <asm/arch/omap-alsa.h>
  53
  54 static int h3_keymap[] = {
  55         KEY(0, 0, KEY_LEFT),
  56         KEY(0, 1, KEY_RIGHT),
  57         KEY(0, 2, KEY_3),
  58         KEY(0, 3, KEY_F10),
  59         KEY(0, 4, KEY_F5),
  60         KEY(0, 5, KEY_9),
  61         KEY(1, 0, KEY_DOWN),
  62         KEY(1, 1, KEY_UP),
  63         KEY(1, 2, KEY_2),
  64         KEY(1, 3, KEY_F9),
  65         KEY(1, 4, KEY_F7),
  66         KEY(1, 5, KEY_0),
  67         KEY(2, 0, KEY_ENTER),
  68         KEY(2, 1, KEY_6),
  69         KEY(2, 2, KEY_1),
  70         KEY(2, 3, KEY_F2),
  71         KEY(2, 4, KEY_F6),
  72         KEY(2, 5, KEY_HOME),
  73         KEY(3, 0, KEY_8),
  74         KEY(3, 1, KEY_5),
  75         KEY(3, 2, KEY_F12),
  76         KEY(3, 3, KEY_F3),
  77         KEY(3, 4, KEY_F8),
  78         KEY(3, 5, KEY_END),
  79         KEY(4, 0, KEY_7),
  80         KEY(4, 1, KEY_4),
  81         KEY(4, 2, KEY_F11),
  82         KEY(4, 3, KEY_F1),
  83         KEY(4, 4, KEY_F4),
  84         KEY(4, 5, KEY_ESC),
  85         KEY(5, 0, KEY_F13),
  86         KEY(5, 1, KEY_F14),
  87         KEY(5, 2, KEY_F15),
  88         KEY(5, 3, KEY_F16),
  89         KEY(5, 4, KEY_SLEEP),
  90         0
  91 };
  92
  93
  94 static struct mtd_partition nor_partitions[] = {
  95         /* bootloader (U-Boot, etc) in first sector */
  96         {
  97               .name             = "bootloader",
  98               .offset           = 0,
  99               .size             = SZ_128K,
 100               .mask_flags       = MTD_WRITEABLE, /* force read-only */
 101         },
 102         /* bootloader params in the next sector */
 103         {
 104               .name             = "params",
 105               .offset           = MTDPART_OFS_APPEND,
 106               .size             = SZ_128K,
 107               .mask_flags       = 0,
 108         },
 109         /* kernel */
 110         {
 111               .name             = "kernel",
 112               .offset           = MTDPART_OFS_APPEND,
 113               .size             = SZ_2M,
 114               .mask_flags       = 0
 115         },
 116         /* file system */
 117         {
 118               .name             = "filesystem",
 119               .offset           = MTDPART_OFS_APPEND,
 120               .size             = MTDPART_SIZ_FULL,
 121               .mask_flags       = 0
 122         }
 123 };
 124
 125 static struct flash_platform_data nor_data = {
 126         .map_name       = "cfi_probe",
 127         .width          = 2,
 128         .parts          = nor_partitions,
 129         .nr_parts       = ARRAY_SIZE(nor_partitions),
 130 };
 131
 132 static struct resource nor_resource = {
 133         /* This is on CS3, wherever it's mapped */
 134         .flags          = IORESOURCE_MEM,
 135 };
 136
 137 static struct platform_device nor_device = {
 138         .name           = "omapflash",
 139         .id             = 0,
 140         .dev            = {
 141                 .platform_data  = &nor_data,
 142         },
 143         .num_resources  = 1,
 144         .resource       = &nor_resource,
 145 };
 146
 147 static struct mtd_partition nand_partitions[] = {
 148 #if 0
 149         /* REVISIT: enable these partitions if you make NAND BOOT work */
 150         {
 151                 .name           = "xloader",
 152                 .offset         = 0,
 153                 .size           = 64 * 1024,
 154                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 155         },
 156         {
 157                 .name           = "bootloader",
 158                 .offset         = MTDPART_OFS_APPEND,
 159                 .size           = 256 * 1024,
 160                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 161         },
 162         {
 163                 .name           = "params",
 164                 .offset         = MTDPART_OFS_APPEND,
 165                 .size           = 192 * 1024,
 166         },
 167         {
 168                 .name           = "kernel",
 169                 .offset         = MTDPART_OFS_APPEND,
 170                 .size           = 2 * SZ_1M,
 171         },
 172 #endif
 173         {
 174                 .name           = "filesystem",
 175                 .size           = MTDPART_SIZ_FULL,
 176                 .offset         = MTDPART_OFS_APPEND,
 177         },
 178 };
 179
 180 /* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
 181 static struct omap_nand_platform_data nand_data = {
 182         .options        = NAND_SAMSUNG_LP_OPTIONS,
 183         .parts          = nand_partitions,
 184         .nr_parts       = ARRAY_SIZE(nand_partitions),
 185 };
 186
 187 static struct resource nand_resource = {
 188         .flags          = IORESOURCE_MEM,
 189 };
 190
 191 static struct platform_device nand_device = {
 192         .name           = "omapnand",
 193         .id             = 0,
 194         .dev            = {
 195                 .platform_data  = &nand_data,
 196         },
 197         .num_resources  = 1,
 198         .resource       = &nand_resource,
 199 };
 200
 201 static struct resource smc91x_resources[] = {
 202         [0] = {
 203                 .start  = OMAP1710_ETHR_START,          /* Physical */
 204                 .end    = OMAP1710_ETHR_START + 0xf,
 205                 .flags  = IORESOURCE_MEM,
 206         },
 207         [1] = {
 208                 .start  = OMAP_GPIO_IRQ(40),
 209                 .end    = OMAP_GPIO_IRQ(40),
 210                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 211         },
 212 };
 213
 214 static struct platform_device smc91x_device = {
 215         .name           = "smc91x",
 216         .id             = 0,
 217         .num_resources  = ARRAY_SIZE(smc91x_resources),
 218         .resource       = smc91x_resources,
 219 };
 220
 221 #define GPTIMER_BASE            0xFFFB1400
 222 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
 223 #define GPTIMER_REGS_SIZE       0x46
 224
 225 static struct resource intlat_resources[] = {
 226         [0] = {
 227                 .start  = GPTIMER_REGS(0),            /* Physical */
 228                 .end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
 229                 .flags  = IORESOURCE_MEM,
 230         },
 231         [1] = {
 232                 .start  = INT_1610_GPTIMER1,
 233                 .end    = INT_1610_GPTIMER1,
 234                 .flags  = IORESOURCE_IRQ,
 235         },
 236 };
 237
 238 static struct platform_device intlat_device = {
 239         .name      = "omap_intlat",
 240         .id          = 0,
 241         .num_resources  = ARRAY_SIZE(intlat_resources),
 242         .resource       = intlat_resources,
 243 };
 244
 245 static struct resource h3_kp_resources[] = {
 246         [0] = {
 247                 .start  = INT_KEYBOARD,
 248                 .end    = INT_KEYBOARD,
 249                 .flags  = IORESOURCE_IRQ,
 250         },
 251 };
 252
 253 static struct omap_kp_platform_data h3_kp_data = {
 254         .rows           = 8,
 255         .cols           = 8,
 256         .keymap         = h3_keymap,
 257         .keymapsize     = ARRAY_SIZE(h3_keymap),
 258         .rep            = 1,
 259         .delay          = 9,
 260         .dbounce        = 1,
 261 };
 262
 263 static struct platform_device h3_kp_device = {
 264         .name           = "omap-keypad",
 265         .id             = -1,
 266         .dev            = {
 267                 .platform_data = &h3_kp_data,
 268         },
 269         .num_resources  = ARRAY_SIZE(h3_kp_resources),
 270         .resource       = h3_kp_resources,
 271 };
 272
 273
 274 /* Select between the IrDA and aGPS module
 275  */
 276 static int h3_select_irda(struct device *dev, int state)
 277 {
 278         unsigned char expa;
 279         int err = 0;
 280
 281         if ((err = read_gpio_expa(&expa, 0x26))) {
 282                 printk(KERN_ERR "Error reading from I/O EXPANDER \n");
 283                 return err;
 284         }
 285
 286         /* 'P6' enable/disable IRDA_TX and IRDA_RX */
 287         if (state & IR_SEL) { /* IrDA */
 288                 if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
 289                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 290                         return err;
 291                 }
 292         } else {
 293                 if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
 294                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 295                         return err;
 296                 }
 297         }
 298         return err;
 299 }
 300
 301 static void set_trans_mode(struct work_struct *work)
 302 {
 303         struct omap_irda_config *irda_config =
 304                 container_of(work, struct omap_irda_config, gpio_expa.work);
 305         int mode = irda_config->mode;
 306         unsigned char expa;
 307         int err = 0;
 308
 309         if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
 310                 printk(KERN_ERR "Error reading from I/O expander\n");
 311         }
 312
 313         expa &= ~0x03;
 314
 315         if (mode & IR_SIRMODE) {
 316                 expa |= 0x01;
 317         } else { /* MIR/FIR */
 318                 expa |= 0x03;
 319         }
 320
 321         if ((err = write_gpio_expa(expa, 0x27)) != 0) {
 322                 printk(KERN_ERR "Error writing to I/O expander\n");
 323         }
 324 }
 325
 326 static int h3_transceiver_mode(struct device *dev, int mode)
 327 {
 328         struct omap_irda_config *irda_config = dev->platform_data;
 329
 330         irda_config->mode = mode;
 331         cancel_delayed_work(&irda_config->gpio_expa);
 332         PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
 333         schedule_delayed_work(&irda_config->gpio_expa, 0);
 334
 335         return 0;
 336 }
 337
 338 static struct omap_irda_config h3_irda_data = {
 339         .transceiver_cap        = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
 340         .transceiver_mode       = h3_transceiver_mode,
 341         .select_irda            = h3_select_irda,
 342         .rx_channel             = OMAP_DMA_UART3_RX,
 343         .tx_channel             = OMAP_DMA_UART3_TX,
 344         .dest_start             = UART3_THR,
 345         .src_start              = UART3_RHR,
 346         .tx_trigger             = 0,
 347         .rx_trigger             = 0,
 348 };
 349
 350 static struct resource h3_irda_resources[] = {
 351         [0] = {
 352                 .start  = INT_UART3,
 353                 .end    = INT_UART3,
 354                 .flags  = IORESOURCE_IRQ,
 355         },
 356 };
 357
 358 static u64 irda_dmamask = 0xffffffff;
 359
 360 static struct platform_device h3_irda_device = {
 361         .name           = "omapirda",
 362         .id             = 0,
 363         .dev            = {
 364                 .platform_data  = &h3_irda_data,
 365                 .dma_mask       = &irda_dmamask,
 366         },
 367         .num_resources  = ARRAY_SIZE(h3_irda_resources),
 368         .resource       = h3_irda_resources,
 369 };
 370
 371 static struct platform_device h3_lcd_device = {
 372         .name           = "lcd_h3",
 373         .id             = -1,
 374 };
 375
 376 static struct omap_mcbsp_reg_cfg mcbsp_regs = {
 377         .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
 378         .spcr1 = RINTM(3) | RRST,
 379         .rcr2  = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
 380                 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
 381         .rcr1  = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
 382         .xcr2  = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
 383                 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
 384         .xcr1  = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
 385         .srgr1 = FWID(15),
 386         .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
 387
 388         .pcr0  = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
 389         /*.pcr0 = CLKXP | CLKRP,*/        /* mcbsp: slave */
 390 };
 391
 392 static struct omap_alsa_codec_config alsa_config = {
 393         .name                   = "H3 TSC2101",
 394         .mcbsp_regs_alsa        = &mcbsp_regs,
 395         .codec_configure_dev    = NULL, /* tsc2101_configure, */
 396         .codec_set_samplerate   = NULL, /* tsc2101_set_samplerate, */
 397         .codec_clock_setup      = NULL, /* tsc2101_clock_setup, */
 398         .codec_clock_on         = NULL, /* tsc2101_clock_on, */
 399         .codec_clock_off        = NULL, /* tsc2101_clock_off, */
 400         .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
 401 };
 402
 403 static struct platform_device h3_mcbsp1_device = {
 404         .name   = "omap_alsa_mcbsp",
 405         .id     = 1,
 406         .dev = {
 407                 .platform_data  = &alsa_config,
 408         },
 409 };
 410
 411 static struct platform_device *devices[] __initdata = {
 412         &nor_device,
 413         &nand_device,
 414         &smc91x_device,
 415         &intlat_device,
 416         &h3_irda_device,
 417         &h3_kp_device,
 418         &h3_lcd_device,
 419         &h3_mcbsp1_device,
 420 };
 421
 422 static struct omap_usb_config h3_usb_config __initdata = {
 423         /* usb1 has a Mini-AB port and external isp1301 transceiver */
 424         .otg        = 2,
 425
 426 #ifdef CONFIG_USB_GADGET_OMAP
 427         .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
 428 #elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 429         /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
 430         .hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
 431 #endif
 432
 433         .pins[1]        = 3,
 434 };
 435
 436 static struct omap_mmc_config h3_mmc_config __initdata = {
 437         .mmc[0] = {
 438                 .enabled        = 1,
 439                 .wire4          = 1,
 440        },
 441 };
 442
 443 extern struct omap_mmc_platform_data h3_mmc_data;
 444
 445 static struct omap_uart_config h3_uart_config __initdata = {
 446         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 447 };
 448
 449 static struct omap_lcd_config h3_lcd_config __initdata = {
 450         .ctrl_name      = "internal",
 451 };
 452
 453 static struct omap_board_config_kernel h3_config[] __initdata = {
 454         { OMAP_TAG_USB,         &h3_usb_config },
 455         { OMAP_TAG_MMC,         &h3_mmc_config },
 456         { OMAP_TAG_UART,        &h3_uart_config },
 457         { OMAP_TAG_LCD,         &h3_lcd_config },
 458 };
 459
 460 static struct omap_gpio_switch h3_gpio_switches[] __initdata = {
 461         {
 462                 .name                   = "mmc_slot",
 463                 .gpio                   = OMAP_MPUIO(1),
 464                 .type                   = OMAP_GPIO_SWITCH_TYPE_COVER,
 465                 .debounce_rising        = 100,
 466                 .debounce_falling       = 0,
 467                 .notify                 = h3_mmc_slot_cover_handler,
 468                 .notify_data            = NULL,
 469         },
 470 };
 471
 472 #define H3_NAND_RB_GPIO_PIN     10
 473
 474 static int nand_dev_ready(struct omap_nand_platform_data *data)
 475 {
 476         return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
 477 }
 478
 479 static void __init h3_init(void)
 480 {
 481         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
 482          * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
 483          * notice whether a NAND chip is enabled at probe time.
 484          *
 485          * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
 486          * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
 487          * to avoid probing every possible flash configuration...
 488          */
 489         nor_resource.end = nor_resource.start = omap_cs3_phys();
 490         nor_resource.end += SZ_32M - 1;
 491
 492         nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
 493         nand_resource.end += SZ_4K - 1;
 494         if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
 495                 nand_data.dev_ready = nand_dev_ready;
 496
 497         /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
 498         /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
 499         omap_cfg_reg(V2_1710_GPIO10);
 500
 501         platform_add_devices(devices, ARRAY_SIZE(devices));
 502         spi_register_board_info(h3_spi_board_info,
 503                                 ARRAY_SIZE(h3_spi_board_info));
 504         omap_board_config = h3_config;
 505         omap_board_config_size = ARRAY_SIZE(h3_config);
 506         omap_serial_init();
 507         omap_register_i2c_bus(1, 100, h3_i2c_board_info,
 508                               ARRAY_SIZE(h3_i2c_board_info));
 509         h3_mmc_init();
 510 }
 511
 512 static void __init h3_init_smc91x(void)
 513 {
 514         omap_cfg_reg(W15_1710_GPIO40);
 515         if (omap_request_gpio(40) < 0) {
 516                 printk("Error requesting gpio 40 for smc91x irq\n");
 517                 return;
 518         }
 519 }
 520
 521 static void __init h3_init_irq(void)
 522 {
 523         omap1_init_common_hw();
 524         omap_init_irq();
 525         omap_gpio_init();
 526         h3_init_smc91x();
 527 }
 528
 529 static void __init h3_map_io(void)
 530 {
 531         omap1_map_common_io();
 532 }
 533
 534 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
 535         /* Maintainer: Texas Instruments, Inc. */
 536         .phys_io        = 0xfff00000,
 537         .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
 538         .boot_params    = 0x10000100,
 539         .map_io         = h3_map_io,
 540         .init_irq       = h3_init_irq,
 541         .init_machine   = h3_init,
 542         .timer          = &omap_timer,
 543 MACHINE_END