arch/arm/mach-mx2/mx27ads.c

   1 /*
   2  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   3  *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
   4  *  Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #include <linux/platform_device.h>
  22 #include <linux/mtd/mtd.h>
  23 #include <linux/mtd/map.h>
  24 #include <linux/mtd/partitions.h>
  25 #include <linux/mtd/physmap.h>
  26 #include <mach/common.h>
  27 #include <mach/hardware.h>
  28 #include <asm/mach-types.h>
  29 #include <asm/mach/arch.h>
  30 #include <asm/mach/time.h>
  31 #include <asm/mach/map.h>
  32 #include <mach/gpio.h>
  33 #include <mach/imx-uart.h>
  34 #include <mach/iomux-mx1-mx2.h>
  35 #include <mach/board-mx27ads.h>
  36
  37 #include "devices.h"
  38
  39 /* ADS's NOR flash */
  40 static struct physmap_flash_data mx27ads_flash_data = {
  41         .width = 2,
  42 };
  43
  44 static struct resource mx27ads_flash_resource = {
  45         .start = 0xc0000000,
  46         .end = 0xc0000000 + 0x02000000 - 1,
  47         .flags = IORESOURCE_MEM,
  48
  49 };
  50
  51 static struct platform_device mx27ads_nor_mtd_device = {
  52         .name = "physmap-flash",
  53         .id = 0,
  54         .dev = {
  55                 .platform_data = &mx27ads_flash_data,
  56         },
  57         .num_resources = 1,
  58         .resource = &mx27ads_flash_resource,
  59 };
  60
  61 static int mxc_uart0_pins[] = {
  62         PE12_PF_UART1_TXD,
  63         PE13_PF_UART1_RXD,
  64         PE14_PF_UART1_CTS,
  65         PE15_PF_UART1_RTS
  66 };
  67
  68 static int uart_mxc_port0_init(struct platform_device *pdev)
  69 {
  70         return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
  71                         ARRAY_SIZE(mxc_uart0_pins), "UART0");
  72 }
  73
  74 static int uart_mxc_port0_exit(struct platform_device *pdev)
  75 {
  76         mxc_gpio_release_multiple_pins(mxc_uart0_pins,
  77                         ARRAY_SIZE(mxc_uart0_pins));
  78         return 0;
  79 }
  80
  81 static int mxc_uart1_pins[] = {
  82         PE3_PF_UART2_CTS,
  83         PE4_PF_UART2_RTS,
  84         PE6_PF_UART2_TXD,
  85         PE7_PF_UART2_RXD
  86 };
  87
  88 static int uart_mxc_port1_init(struct platform_device *pdev)
  89 {
  90         return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
  91                         ARRAY_SIZE(mxc_uart1_pins), "UART1");
  92 }
  93
  94 static int uart_mxc_port1_exit(struct platform_device *pdev)
  95 {
  96         mxc_gpio_release_multiple_pins(mxc_uart1_pins,
  97                         ARRAY_SIZE(mxc_uart1_pins));
  98         return 0;
  99 }
 100
 101 static int mxc_uart2_pins[] = {
 102         PE8_PF_UART3_TXD,
 103         PE9_PF_UART3_RXD,
 104         PE10_PF_UART3_CTS,
 105         PE11_PF_UART3_RTS
 106 };
 107
 108 static int uart_mxc_port2_init(struct platform_device *pdev)
 109 {
 110         return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
 111                         ARRAY_SIZE(mxc_uart2_pins), "UART2");
 112 }
 113
 114 static int uart_mxc_port2_exit(struct platform_device *pdev)
 115 {
 116         mxc_gpio_release_multiple_pins(mxc_uart2_pins,
 117                         ARRAY_SIZE(mxc_uart2_pins));
 118         return 0;
 119 }
 120
 121 static int mxc_uart3_pins[] = {
 122         PB26_AF_UART4_RTS,
 123         PB28_AF_UART4_TXD,
 124         PB29_AF_UART4_CTS,
 125         PB31_AF_UART4_RXD
 126 };
 127
 128 static int uart_mxc_port3_init(struct platform_device *pdev)
 129 {
 130         return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
 131                         ARRAY_SIZE(mxc_uart3_pins), "UART3");
 132 }
 133
 134 static int uart_mxc_port3_exit(struct platform_device *pdev)
 135 {
 136         mxc_gpio_release_multiple_pins(mxc_uart3_pins,
 137                         ARRAY_SIZE(mxc_uart3_pins));
 138 }
 139
 140 static int mxc_uart4_pins[] = {
 141         PB18_AF_UART5_TXD,
 142         PB19_AF_UART5_RXD,
 143         PB20_AF_UART5_CTS,
 144         PB21_AF_UART5_RTS
 145 };
 146
 147 static int uart_mxc_port4_init(struct platform_device *pdev)
 148 {
 149         return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
 150                         ARRAY_SIZE(mxc_uart4_pins), "UART4");
 151 }
 152
 153 static int uart_mxc_port4_exit(struct platform_device *pdev)
 154 {
 155         mxc_gpio_release_multiple_pins(mxc_uart4_pins,
 156                         ARRAY_SIZE(mxc_uart4_pins));
 157         return 0;
 158 }
 159
 160 static int mxc_uart5_pins[] = {
 161         PB10_AF_UART6_TXD,
 162         PB12_AF_UART6_CTS,
 163         PB11_AF_UART6_RXD,
 164         PB13_AF_UART6_RTS
 165 };
 166
 167 static int uart_mxc_port5_init(struct platform_device *pdev)
 168 {
 169         return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
 170                         ARRAY_SIZE(mxc_uart5_pins), "UART5");
 171 }
 172
 173 static int uart_mxc_port5_exit(struct platform_device *pdev)
 174 {
 175         mxc_gpio_release_multiple_pins(mxc_uart5_pins,
 176                         ARRAY_SIZE(mxc_uart5_pins));
 177         return 0;
 178 }
 179
 180 static struct platform_device *platform_devices[] __initdata = {
 181         &mx27ads_nor_mtd_device,
 182 };
 183
 184 static int mxc_fec_pins[] = {
 185         PD0_AIN_FEC_TXD0,
 186         PD1_AIN_FEC_TXD1,
 187         PD2_AIN_FEC_TXD2,
 188         PD3_AIN_FEC_TXD3,
 189         PD4_AOUT_FEC_RX_ER,
 190         PD5_AOUT_FEC_RXD1,
 191         PD6_AOUT_FEC_RXD2,
 192         PD7_AOUT_FEC_RXD3,
 193         PD8_AF_FEC_MDIO,
 194         PD9_AIN_FEC_MDC,
 195         PD10_AOUT_FEC_CRS,
 196         PD11_AOUT_FEC_TX_CLK,
 197         PD12_AOUT_FEC_RXD0,
 198         PD13_AOUT_FEC_RX_DV,
 199         PD14_AOUT_FEC_CLR,
 200         PD15_AOUT_FEC_COL,
 201         PD16_AIN_FEC_TX_ER,
 202         PF23_AIN_FEC_TX_EN
 203 };
 204
 205 static void gpio_fec_active(void)
 206 {
 207         mxc_gpio_setup_multiple_pins(mxc_fec_pins,
 208                         ARRAY_SIZE(mxc_fec_pins), "FEC");
 209 }
 210
 211 static void gpio_fec_inactive(void)
 212 {
 213         mxc_gpio_release_multiple_pins(mxc_fec_pins,
 214                         ARRAY_SIZE(mxc_fec_pins));
 215 }
 216
 217 static struct imxuart_platform_data uart_pdata[] = {
 218         {
 219                 .init = uart_mxc_port0_init,
 220                 .exit = uart_mxc_port0_exit,
 221                 .flags = IMXUART_HAVE_RTSCTS,
 222         }, {
 223                 .init = uart_mxc_port1_init,
 224                 .exit = uart_mxc_port1_exit,
 225                 .flags = IMXUART_HAVE_RTSCTS,
 226         }, {
 227                 .init = uart_mxc_port2_init,
 228                 .exit = uart_mxc_port2_exit,
 229                 .flags = IMXUART_HAVE_RTSCTS,
 230         }, {
 231                 .init = uart_mxc_port3_init,
 232                 .exit = uart_mxc_port3_exit,
 233                 .flags = IMXUART_HAVE_RTSCTS,
 234         }, {
 235                 .init = uart_mxc_port4_init,
 236                 .exit = uart_mxc_port4_exit,
 237                 .flags = IMXUART_HAVE_RTSCTS,
 238         }, {
 239                 .init = uart_mxc_port5_init,
 240                 .exit = uart_mxc_port5_exit,
 241                 .flags = IMXUART_HAVE_RTSCTS,
 242         },
 243 };
 244
 245 static void __init mx27ads_board_init(void)
 246 {
 247         gpio_fec_active();
 248
 249         mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
 250         mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
 251         mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
 252         mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
 253         mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
 254         mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
 255
 256         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 257 }
 258
 259 static void __init mx27ads_timer_init(void)
 260 {
 261         unsigned long fref = 26000000;
 262
 263         if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0)
 264                 fref = 27000000;
 265
 266         mxc_clocks_init(fref);
 267         mxc_timer_init("gpt_clk.0");
 268 }
 269
 270 struct sys_timer mx27ads_timer = {
 271         .init   = mx27ads_timer_init,
 272 };
 273
 274 static struct map_desc mx27ads_io_desc[] __initdata = {
 275         {
 276                 .virtual = PBC_BASE_ADDRESS,
 277                 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
 278                 .length = SZ_1M,
 279                 .type = MT_DEVICE,
 280         },
 281 };
 282
 283 void __init mx27ads_map_io(void)
 284 {
 285         mxc_map_io();
 286         iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc));
 287 }
 288
 289 MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
 290         /* maintainer: Freescale Semiconductor, Inc. */
 291         .phys_io        = AIPI_BASE_ADDR,
 292         .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
 293         .boot_params    = PHYS_OFFSET + 0x100,
 294         .map_io         = mx27ads_map_io,
 295         .init_irq       = mxc_init_irq,
 296         .init_machine   = mx27ads_board_init,
 297         .timer          = &mx27ads_timer,
 298 MACHINE_END
 299