arch/arm/mach-msm/board-qsd8x50.c

   1 /* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  15  * 02110-1301, USA.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/irq.h>
  20 #include <linux/gpio.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/delay.h>
  23 #include <linux/usb/msm_hsusb.h>
  24 #include <linux/err.h>
  25 #include <linux/clkdev.h>
  26
  27 #include <asm/mach-types.h>
  28 #include <asm/mach/arch.h>
  29 #include <asm/io.h>
  30 #include <asm/setup.h>
  31
  32 #include <mach/board.h>
  33 #include <mach/irqs.h>
  34 #include <mach/sirc.h>
  35 #include <mach/gpio.h>
  36 #include <mach/vreg.h>
  37 #include <mach/mmc.h>
  38
  39 #include "devices.h"
  40
  41 extern struct sys_timer msm_timer;
  42
  43 static const resource_size_t qsd8x50_surf_smc91x_base __initdata = 0x70000300;
  44 static const unsigned        qsd8x50_surf_smc91x_gpio __initdata = 156;
  45
  46 /* Leave smc91x resources empty here, as we'll fill them in
  47  * at run-time: they vary from board to board, and the true
  48  * configuration won't be known until boot.
  49  */
  50 static struct resource smc91x_resources[] = {
  51         [0] = {
  52                 .flags = IORESOURCE_MEM,
  53         },
  54         [1] = {
  55                 .flags = IORESOURCE_IRQ,
  56         },
  57 };
  58
  59 static struct platform_device smc91x_device = {
  60         .name           = "smc91x",
  61         .id             = 0,
  62         .num_resources  = ARRAY_SIZE(smc91x_resources),
  63         .resource       = smc91x_resources,
  64 };
  65
  66 static int __init msm_init_smc91x(void)
  67 {
  68         if (machine_is_qsd8x50_surf()) {
  69                 smc91x_resources[0].start = qsd8x50_surf_smc91x_base;
  70                 smc91x_resources[0].end   = qsd8x50_surf_smc91x_base + 0xff;
  71                 smc91x_resources[1].start =
  72                         gpio_to_irq(qsd8x50_surf_smc91x_gpio);
  73                 smc91x_resources[1].end   =
  74                         gpio_to_irq(qsd8x50_surf_smc91x_gpio);
  75                 platform_device_register(&smc91x_device);
  76         }
  77
  78         return 0;
  79 }
  80 module_init(msm_init_smc91x);
  81
  82 static int hsusb_phy_init_seq[] = {
  83         0x08, 0x31,     /* Increase HS Driver Amplitude */
  84         0x20, 0x32,     /* Enable and set Pre-Emphasis Depth to 10% */
  85         -1
  86 };
  87
  88 static struct msm_otg_platform_data msm_otg_pdata = {
  89         .phy_init_seq           = hsusb_phy_init_seq,
  90         .mode                   = USB_PERIPHERAL,
  91         .otg_control            = OTG_PHY_CONTROL,
  92 };
  93
  94 static struct platform_device *devices[] __initdata = {
  95         &msm_device_uart3,
  96         &msm_device_smd,
  97         &msm_device_otg,
  98         &msm_device_hsusb,
  99         &msm_device_hsusb_host,
 100 };
 101
 102 static struct msm_mmc_gpio sdc1_gpio_cfg[] = {
 103         {51, "sdc1_dat_3"},
 104         {52, "sdc1_dat_2"},
 105         {53, "sdc1_dat_1"},
 106         {54, "sdc1_dat_0"},
 107         {55, "sdc1_cmd"},
 108         {56, "sdc1_clk"}
 109 };
 110
 111 static struct vreg *vreg_mmc;
 112 static unsigned long vreg_sts;
 113
 114 static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
 115 {
 116         int rc = 0;
 117         struct platform_device *pdev;
 118
 119         pdev = container_of(dv, struct platform_device, dev);
 120
 121         if (vdd == 0) {
 122                 if (!vreg_sts)
 123                         return 0;
 124
 125                 clear_bit(pdev->id, &vreg_sts);
 126
 127                 if (!vreg_sts) {
 128                         rc = vreg_disable(vreg_mmc);
 129                         if (rc)
 130                                 pr_err("vreg_mmc disable failed for slot "
 131                                                 "%d: %d\n", pdev->id, rc);
 132                 }
 133                 return 0;
 134         }
 135
 136         if (!vreg_sts) {
 137                 rc = vreg_set_level(vreg_mmc, 2900);
 138                 if (rc)
 139                         pr_err("vreg_mmc set level failed for slot %d: %d\n",
 140                                         pdev->id, rc);
 141                 rc = vreg_enable(vreg_mmc);
 142                 if (rc)
 143                         pr_err("vreg_mmc enable failed for slot %d: %d\n",
 144                                         pdev->id, rc);
 145         }
 146         set_bit(pdev->id, &vreg_sts);
 147         return 0;
 148 }
 149
 150 static struct msm_mmc_gpio_data sdc1_gpio = {
 151         .gpio = sdc1_gpio_cfg,
 152         .size = ARRAY_SIZE(sdc1_gpio_cfg),
 153 };
 154
 155 static struct msm_mmc_platform_data qsd8x50_sdc1_data = {
 156         .ocr_mask       = MMC_VDD_27_28 | MMC_VDD_28_29,
 157         .translate_vdd  = msm_sdcc_setup_power,
 158         .gpio_data = &sdc1_gpio,
 159 };
 160
 161 static void __init qsd8x50_init_mmc(void)
 162 {
 163         vreg_mmc = vreg_get(NULL, "gp5");
 164
 165         if (IS_ERR(vreg_mmc)) {
 166                 pr_err("vreg get for vreg_mmc failed (%ld)\n",
 167                                 PTR_ERR(vreg_mmc));
 168                 return;
 169         }
 170
 171         msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0);
 172 }
 173
 174 static void __init qsd8x50_map_io(void)
 175 {
 176         msm_map_qsd8x50_io();
 177         msm_clock_init(msm_clocks_8x50, msm_num_clocks_8x50);
 178 }
 179
 180 static void __init qsd8x50_init_irq(void)
 181 {
 182         msm_init_irq();
 183         msm_init_sirc();
 184 }
 185
 186 static void __init qsd8x50_init(void)
 187 {
 188         msm_device_otg.dev.platform_data = &msm_otg_pdata;
 189         msm_device_hsusb.dev.parent = &msm_device_otg.dev;
 190         msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
 191         platform_add_devices(devices, ARRAY_SIZE(devices));
 192         qsd8x50_init_mmc();
 193 }
 194
 195 MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
 196         .boot_params = PLAT_PHYS_OFFSET + 0x100,
 197         .map_io = qsd8x50_map_io,
 198         .init_irq = qsd8x50_init_irq,
 199         .init_machine = qsd8x50_init,
 200         .timer = &msm_timer,
 201 MACHINE_END
 202
 203 MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
 204         .boot_params = PLAT_PHYS_OFFSET + 0x100,
 205         .map_io = qsd8x50_map_io,
 206         .init_irq = qsd8x50_init_irq,
 207         .init_machine = qsd8x50_init,
 208         .timer = &msm_timer,
 209 MACHINE_END