Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes...
[sfrench/cifs-2.6.git] / arch / arm / mach-kirkwood / common.c
1 /*
2  * arch/arm/mach-kirkwood/common.c
3  *
4  * Core functions for Marvell Kirkwood SoCs
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2.  This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/mbus.h>
16 #include <linux/mv643xx_eth.h>
17 #include <linux/mv643xx_i2c.h>
18 #include <linux/ata_platform.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/spi/orion_spi.h>
21 #include <net/dsa.h>
22 #include <asm/page.h>
23 #include <asm/timex.h>
24 #include <asm/mach/map.h>
25 #include <asm/mach/time.h>
26 #include <mach/kirkwood.h>
27 #include <mach/bridge-regs.h>
28 #include <plat/cache-feroceon-l2.h>
29 #include <plat/ehci-orion.h>
30 #include <plat/mvsdio.h>
31 #include <plat/mv_xor.h>
32 #include <plat/orion_nand.h>
33 #include <plat/orion_wdt.h>
34 #include <plat/time.h>
35 #include "common.h"
36
37 /*****************************************************************************
38  * I/O Address Mapping
39  ****************************************************************************/
40 static struct map_desc kirkwood_io_desc[] __initdata = {
41         {
42                 .virtual        = KIRKWOOD_PCIE_IO_VIRT_BASE,
43                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
44                 .length         = KIRKWOOD_PCIE_IO_SIZE,
45                 .type           = MT_DEVICE,
46         }, {
47                 .virtual        = KIRKWOOD_PCIE1_IO_VIRT_BASE,
48                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
49                 .length         = KIRKWOOD_PCIE1_IO_SIZE,
50                 .type           = MT_DEVICE,
51         }, {
52                 .virtual        = KIRKWOOD_REGS_VIRT_BASE,
53                 .pfn            = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
54                 .length         = KIRKWOOD_REGS_SIZE,
55                 .type           = MT_DEVICE,
56         },
57 };
58
59 void __init kirkwood_map_io(void)
60 {
61         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
62 }
63
64 /*
65  * Default clock control bits.  Any bit _not_ set in this variable
66  * will be cleared from the hardware after platform devices have been
67  * registered.  Some reserved bits must be set to 1.
68  */
69 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
70         
71
72 /*****************************************************************************
73  * EHCI
74  ****************************************************************************/
75 static struct orion_ehci_data kirkwood_ehci_data = {
76         .dram           = &kirkwood_mbus_dram_info,
77         .phy_version    = EHCI_PHY_NA,
78 };
79
80 static u64 ehci_dmamask = 0xffffffffUL;
81
82
83 /*****************************************************************************
84  * EHCI0
85  ****************************************************************************/
86 static struct resource kirkwood_ehci_resources[] = {
87         {
88                 .start  = USB_PHYS_BASE,
89                 .end    = USB_PHYS_BASE + 0x0fff,
90                 .flags  = IORESOURCE_MEM,
91         }, {
92                 .start  = IRQ_KIRKWOOD_USB,
93                 .end    = IRQ_KIRKWOOD_USB,
94                 .flags  = IORESOURCE_IRQ,
95         },
96 };
97
98 static struct platform_device kirkwood_ehci = {
99         .name           = "orion-ehci",
100         .id             = 0,
101         .dev            = {
102                 .dma_mask               = &ehci_dmamask,
103                 .coherent_dma_mask      = 0xffffffff,
104                 .platform_data          = &kirkwood_ehci_data,
105         },
106         .resource       = kirkwood_ehci_resources,
107         .num_resources  = ARRAY_SIZE(kirkwood_ehci_resources),
108 };
109
110 void __init kirkwood_ehci_init(void)
111 {
112         kirkwood_clk_ctrl |= CGC_USB0;
113         platform_device_register(&kirkwood_ehci);
114 }
115
116
117 /*****************************************************************************
118  * GE00
119  ****************************************************************************/
120 struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
121         .dram           = &kirkwood_mbus_dram_info,
122 };
123
124 static struct resource kirkwood_ge00_shared_resources[] = {
125         {
126                 .name   = "ge00 base",
127                 .start  = GE00_PHYS_BASE + 0x2000,
128                 .end    = GE00_PHYS_BASE + 0x3fff,
129                 .flags  = IORESOURCE_MEM,
130         }, {
131                 .name   = "ge00 err irq",
132                 .start  = IRQ_KIRKWOOD_GE00_ERR,
133                 .end    = IRQ_KIRKWOOD_GE00_ERR,
134                 .flags  = IORESOURCE_IRQ,
135         },
136 };
137
138 static struct platform_device kirkwood_ge00_shared = {
139         .name           = MV643XX_ETH_SHARED_NAME,
140         .id             = 0,
141         .dev            = {
142                 .platform_data  = &kirkwood_ge00_shared_data,
143         },
144         .num_resources  = ARRAY_SIZE(kirkwood_ge00_shared_resources),
145         .resource       = kirkwood_ge00_shared_resources,
146 };
147
148 static struct resource kirkwood_ge00_resources[] = {
149         {
150                 .name   = "ge00 irq",
151                 .start  = IRQ_KIRKWOOD_GE00_SUM,
152                 .end    = IRQ_KIRKWOOD_GE00_SUM,
153                 .flags  = IORESOURCE_IRQ,
154         },
155 };
156
157 static struct platform_device kirkwood_ge00 = {
158         .name           = MV643XX_ETH_NAME,
159         .id             = 0,
160         .num_resources  = 1,
161         .resource       = kirkwood_ge00_resources,
162         .dev            = {
163                 .coherent_dma_mask      = 0xffffffff,
164         },
165 };
166
167 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
168 {
169         kirkwood_clk_ctrl |= CGC_GE0;
170         eth_data->shared = &kirkwood_ge00_shared;
171         kirkwood_ge00.dev.platform_data = eth_data;
172
173         platform_device_register(&kirkwood_ge00_shared);
174         platform_device_register(&kirkwood_ge00);
175 }
176
177
178 /*****************************************************************************
179  * GE01
180  ****************************************************************************/
181 struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
182         .dram           = &kirkwood_mbus_dram_info,
183         .shared_smi     = &kirkwood_ge00_shared,
184 };
185
186 static struct resource kirkwood_ge01_shared_resources[] = {
187         {
188                 .name   = "ge01 base",
189                 .start  = GE01_PHYS_BASE + 0x2000,
190                 .end    = GE01_PHYS_BASE + 0x3fff,
191                 .flags  = IORESOURCE_MEM,
192         }, {
193                 .name   = "ge01 err irq",
194                 .start  = IRQ_KIRKWOOD_GE01_ERR,
195                 .end    = IRQ_KIRKWOOD_GE01_ERR,
196                 .flags  = IORESOURCE_IRQ,
197         },
198 };
199
200 static struct platform_device kirkwood_ge01_shared = {
201         .name           = MV643XX_ETH_SHARED_NAME,
202         .id             = 1,
203         .dev            = {
204                 .platform_data  = &kirkwood_ge01_shared_data,
205         },
206         .num_resources  = ARRAY_SIZE(kirkwood_ge01_shared_resources),
207         .resource       = kirkwood_ge01_shared_resources,
208 };
209
210 static struct resource kirkwood_ge01_resources[] = {
211         {
212                 .name   = "ge01 irq",
213                 .start  = IRQ_KIRKWOOD_GE01_SUM,
214                 .end    = IRQ_KIRKWOOD_GE01_SUM,
215                 .flags  = IORESOURCE_IRQ,
216         },
217 };
218
219 static struct platform_device kirkwood_ge01 = {
220         .name           = MV643XX_ETH_NAME,
221         .id             = 1,
222         .num_resources  = 1,
223         .resource       = kirkwood_ge01_resources,
224         .dev            = {
225                 .coherent_dma_mask      = 0xffffffff,
226         },
227 };
228
229 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
230 {
231         kirkwood_clk_ctrl |= CGC_GE1;
232         eth_data->shared = &kirkwood_ge01_shared;
233         kirkwood_ge01.dev.platform_data = eth_data;
234
235         platform_device_register(&kirkwood_ge01_shared);
236         platform_device_register(&kirkwood_ge01);
237 }
238
239
240 /*****************************************************************************
241  * Ethernet switch
242  ****************************************************************************/
243 static struct resource kirkwood_switch_resources[] = {
244         {
245                 .start  = 0,
246                 .end    = 0,
247                 .flags  = IORESOURCE_IRQ,
248         },
249 };
250
251 static struct platform_device kirkwood_switch_device = {
252         .name           = "dsa",
253         .id             = 0,
254         .num_resources  = 0,
255         .resource       = kirkwood_switch_resources,
256 };
257
258 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
259 {
260         int i;
261
262         if (irq != NO_IRQ) {
263                 kirkwood_switch_resources[0].start = irq;
264                 kirkwood_switch_resources[0].end = irq;
265                 kirkwood_switch_device.num_resources = 1;
266         }
267
268         d->netdev = &kirkwood_ge00.dev;
269         for (i = 0; i < d->nr_chips; i++)
270                 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
271         kirkwood_switch_device.dev.platform_data = d;
272
273         platform_device_register(&kirkwood_switch_device);
274 }
275
276
277 /*****************************************************************************
278  * NAND flash
279  ****************************************************************************/
280 static struct resource kirkwood_nand_resource = {
281         .flags          = IORESOURCE_MEM,
282         .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
283         .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
284                                 KIRKWOOD_NAND_MEM_SIZE - 1,
285 };
286
287 static struct orion_nand_data kirkwood_nand_data = {
288         .cle            = 0,
289         .ale            = 1,
290         .width          = 8,
291 };
292
293 static struct platform_device kirkwood_nand_flash = {
294         .name           = "orion_nand",
295         .id             = -1,
296         .dev            = {
297                 .platform_data  = &kirkwood_nand_data,
298         },
299         .resource       = &kirkwood_nand_resource,
300         .num_resources  = 1,
301 };
302
303 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
304                                int chip_delay)
305 {
306         kirkwood_clk_ctrl |= CGC_RUNIT;
307         kirkwood_nand_data.parts = parts;
308         kirkwood_nand_data.nr_parts = nr_parts;
309         kirkwood_nand_data.chip_delay = chip_delay;
310         platform_device_register(&kirkwood_nand_flash);
311 }
312
313 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
314                                    int (*dev_ready)(struct mtd_info *))
315 {
316         kirkwood_clk_ctrl |= CGC_RUNIT;
317         kirkwood_nand_data.parts = parts;
318         kirkwood_nand_data.nr_parts = nr_parts;
319         kirkwood_nand_data.dev_ready = dev_ready;
320         platform_device_register(&kirkwood_nand_flash);
321 }
322
323 /*****************************************************************************
324  * SoC RTC
325  ****************************************************************************/
326 static struct resource kirkwood_rtc_resource = {
327         .start  = RTC_PHYS_BASE,
328         .end    = RTC_PHYS_BASE + SZ_16 - 1,
329         .flags  = IORESOURCE_MEM,
330 };
331
332 static void __init kirkwood_rtc_init(void)
333 {
334         platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
335 }
336
337
338 /*****************************************************************************
339  * SATA
340  ****************************************************************************/
341 static struct resource kirkwood_sata_resources[] = {
342         {
343                 .name   = "sata base",
344                 .start  = SATA_PHYS_BASE,
345                 .end    = SATA_PHYS_BASE + 0x5000 - 1,
346                 .flags  = IORESOURCE_MEM,
347         }, {
348                 .name   = "sata irq",
349                 .start  = IRQ_KIRKWOOD_SATA,
350                 .end    = IRQ_KIRKWOOD_SATA,
351                 .flags  = IORESOURCE_IRQ,
352         },
353 };
354
355 static struct platform_device kirkwood_sata = {
356         .name           = "sata_mv",
357         .id             = 0,
358         .dev            = {
359                 .coherent_dma_mask      = 0xffffffff,
360         },
361         .num_resources  = ARRAY_SIZE(kirkwood_sata_resources),
362         .resource       = kirkwood_sata_resources,
363 };
364
365 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
366 {
367         kirkwood_clk_ctrl |= CGC_SATA0;
368         if (sata_data->n_ports > 1)
369                 kirkwood_clk_ctrl |= CGC_SATA1;
370         sata_data->dram = &kirkwood_mbus_dram_info;
371         kirkwood_sata.dev.platform_data = sata_data;
372         platform_device_register(&kirkwood_sata);
373 }
374
375
376 /*****************************************************************************
377  * SD/SDIO/MMC
378  ****************************************************************************/
379 static struct resource mvsdio_resources[] = {
380         [0] = {
381                 .start  = SDIO_PHYS_BASE,
382                 .end    = SDIO_PHYS_BASE + SZ_1K - 1,
383                 .flags  = IORESOURCE_MEM,
384         },
385         [1] = {
386                 .start  = IRQ_KIRKWOOD_SDIO,
387                 .end    = IRQ_KIRKWOOD_SDIO,
388                 .flags  = IORESOURCE_IRQ,
389         },
390 };
391
392 static u64 mvsdio_dmamask = 0xffffffffUL;
393
394 static struct platform_device kirkwood_sdio = {
395         .name           = "mvsdio",
396         .id             = -1,
397         .dev            = {
398                 .dma_mask = &mvsdio_dmamask,
399                 .coherent_dma_mask = 0xffffffff,
400         },
401         .num_resources  = ARRAY_SIZE(mvsdio_resources),
402         .resource       = mvsdio_resources,
403 };
404
405 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
406 {
407         u32 dev, rev;
408
409         kirkwood_pcie_id(&dev, &rev);
410         if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
411                 mvsdio_data->clock = 100000000;
412         else
413                 mvsdio_data->clock = 200000000;
414         mvsdio_data->dram = &kirkwood_mbus_dram_info;
415         kirkwood_clk_ctrl |= CGC_SDIO;
416         kirkwood_sdio.dev.platform_data = mvsdio_data;
417         platform_device_register(&kirkwood_sdio);
418 }
419
420
421 /*****************************************************************************
422  * SPI
423  ****************************************************************************/
424 static struct orion_spi_info kirkwood_spi_plat_data = {
425 };
426
427 static struct resource kirkwood_spi_resources[] = {
428         {
429                 .start  = SPI_PHYS_BASE,
430                 .end    = SPI_PHYS_BASE + SZ_512 - 1,
431                 .flags  = IORESOURCE_MEM,
432         },
433 };
434
435 static struct platform_device kirkwood_spi = {
436         .name           = "orion_spi",
437         .id             = 0,
438         .resource       = kirkwood_spi_resources,
439         .dev            = {
440                 .platform_data  = &kirkwood_spi_plat_data,
441         },
442         .num_resources  = ARRAY_SIZE(kirkwood_spi_resources),
443 };
444
445 void __init kirkwood_spi_init()
446 {
447         kirkwood_clk_ctrl |= CGC_RUNIT;
448         platform_device_register(&kirkwood_spi);
449 }
450
451
452 /*****************************************************************************
453  * I2C
454  ****************************************************************************/
455 static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
456         .freq_m         = 8, /* assumes 166 MHz TCLK */
457         .freq_n         = 3,
458         .timeout        = 1000, /* Default timeout of 1 second */
459 };
460
461 static struct resource kirkwood_i2c_resources[] = {
462         {
463                 .start  = I2C_PHYS_BASE,
464                 .end    = I2C_PHYS_BASE + 0x1f,
465                 .flags  = IORESOURCE_MEM,
466         }, {
467                 .start  = IRQ_KIRKWOOD_TWSI,
468                 .end    = IRQ_KIRKWOOD_TWSI,
469                 .flags  = IORESOURCE_IRQ,
470         },
471 };
472
473 static struct platform_device kirkwood_i2c = {
474         .name           = MV64XXX_I2C_CTLR_NAME,
475         .id             = 0,
476         .num_resources  = ARRAY_SIZE(kirkwood_i2c_resources),
477         .resource       = kirkwood_i2c_resources,
478         .dev            = {
479                 .platform_data  = &kirkwood_i2c_pdata,
480         },
481 };
482
483 void __init kirkwood_i2c_init(void)
484 {
485         platform_device_register(&kirkwood_i2c);
486 }
487
488
489 /*****************************************************************************
490  * UART0
491  ****************************************************************************/
492 static struct plat_serial8250_port kirkwood_uart0_data[] = {
493         {
494                 .mapbase        = UART0_PHYS_BASE,
495                 .membase        = (char *)UART0_VIRT_BASE,
496                 .irq            = IRQ_KIRKWOOD_UART_0,
497                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
498                 .iotype         = UPIO_MEM,
499                 .regshift       = 2,
500                 .uartclk        = 0,
501         }, {
502         },
503 };
504
505 static struct resource kirkwood_uart0_resources[] = {
506         {
507                 .start          = UART0_PHYS_BASE,
508                 .end            = UART0_PHYS_BASE + 0xff,
509                 .flags          = IORESOURCE_MEM,
510         }, {
511                 .start          = IRQ_KIRKWOOD_UART_0,
512                 .end            = IRQ_KIRKWOOD_UART_0,
513                 .flags          = IORESOURCE_IRQ,
514         },
515 };
516
517 static struct platform_device kirkwood_uart0 = {
518         .name                   = "serial8250",
519         .id                     = 0,
520         .dev                    = {
521                 .platform_data  = kirkwood_uart0_data,
522         },
523         .resource               = kirkwood_uart0_resources,
524         .num_resources          = ARRAY_SIZE(kirkwood_uart0_resources),
525 };
526
527 void __init kirkwood_uart0_init(void)
528 {
529         platform_device_register(&kirkwood_uart0);
530 }
531
532
533 /*****************************************************************************
534  * UART1
535  ****************************************************************************/
536 static struct plat_serial8250_port kirkwood_uart1_data[] = {
537         {
538                 .mapbase        = UART1_PHYS_BASE,
539                 .membase        = (char *)UART1_VIRT_BASE,
540                 .irq            = IRQ_KIRKWOOD_UART_1,
541                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
542                 .iotype         = UPIO_MEM,
543                 .regshift       = 2,
544                 .uartclk        = 0,
545         }, {
546         },
547 };
548
549 static struct resource kirkwood_uart1_resources[] = {
550         {
551                 .start          = UART1_PHYS_BASE,
552                 .end            = UART1_PHYS_BASE + 0xff,
553                 .flags          = IORESOURCE_MEM,
554         }, {
555                 .start          = IRQ_KIRKWOOD_UART_1,
556                 .end            = IRQ_KIRKWOOD_UART_1,
557                 .flags          = IORESOURCE_IRQ,
558         },
559 };
560
561 static struct platform_device kirkwood_uart1 = {
562         .name                   = "serial8250",
563         .id                     = 1,
564         .dev                    = {
565                 .platform_data  = kirkwood_uart1_data,
566         },
567         .resource               = kirkwood_uart1_resources,
568         .num_resources          = ARRAY_SIZE(kirkwood_uart1_resources),
569 };
570
571 void __init kirkwood_uart1_init(void)
572 {
573         platform_device_register(&kirkwood_uart1);
574 }
575
576
577 /*****************************************************************************
578  * Cryptographic Engines and Security Accelerator (CESA)
579  ****************************************************************************/
580
581 static struct resource kirkwood_crypto_res[] = {
582         {
583                 .name   = "regs",
584                 .start  = CRYPTO_PHYS_BASE,
585                 .end    = CRYPTO_PHYS_BASE + 0xffff,
586                 .flags  = IORESOURCE_MEM,
587         }, {
588                 .name   = "sram",
589                 .start  = KIRKWOOD_SRAM_PHYS_BASE,
590                 .end    = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
591                 .flags  = IORESOURCE_MEM,
592         }, {
593                 .name   = "crypto interrupt",
594                 .start  = IRQ_KIRKWOOD_CRYPTO,
595                 .end    = IRQ_KIRKWOOD_CRYPTO,
596                 .flags  = IORESOURCE_IRQ,
597         },
598 };
599
600 static struct platform_device kirkwood_crypto_device = {
601         .name           = "mv_crypto",
602         .id             = -1,
603         .num_resources  = ARRAY_SIZE(kirkwood_crypto_res),
604         .resource       = kirkwood_crypto_res,
605 };
606
607 void __init kirkwood_crypto_init(void)
608 {
609         kirkwood_clk_ctrl |= CGC_CRYPTO;
610         platform_device_register(&kirkwood_crypto_device);
611 }
612
613
614 /*****************************************************************************
615  * XOR
616  ****************************************************************************/
617 static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
618         .dram           = &kirkwood_mbus_dram_info,
619 };
620
621 static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
622
623
624 /*****************************************************************************
625  * XOR0
626  ****************************************************************************/
627 static struct resource kirkwood_xor0_shared_resources[] = {
628         {
629                 .name   = "xor 0 low",
630                 .start  = XOR0_PHYS_BASE,
631                 .end    = XOR0_PHYS_BASE + 0xff,
632                 .flags  = IORESOURCE_MEM,
633         }, {
634                 .name   = "xor 0 high",
635                 .start  = XOR0_HIGH_PHYS_BASE,
636                 .end    = XOR0_HIGH_PHYS_BASE + 0xff,
637                 .flags  = IORESOURCE_MEM,
638         },
639 };
640
641 static struct platform_device kirkwood_xor0_shared = {
642         .name           = MV_XOR_SHARED_NAME,
643         .id             = 0,
644         .dev            = {
645                 .platform_data = &kirkwood_xor_shared_data,
646         },
647         .num_resources  = ARRAY_SIZE(kirkwood_xor0_shared_resources),
648         .resource       = kirkwood_xor0_shared_resources,
649 };
650
651 static struct resource kirkwood_xor00_resources[] = {
652         [0] = {
653                 .start  = IRQ_KIRKWOOD_XOR_00,
654                 .end    = IRQ_KIRKWOOD_XOR_00,
655                 .flags  = IORESOURCE_IRQ,
656         },
657 };
658
659 static struct mv_xor_platform_data kirkwood_xor00_data = {
660         .shared         = &kirkwood_xor0_shared,
661         .hw_id          = 0,
662         .pool_size      = PAGE_SIZE,
663 };
664
665 static struct platform_device kirkwood_xor00_channel = {
666         .name           = MV_XOR_NAME,
667         .id             = 0,
668         .num_resources  = ARRAY_SIZE(kirkwood_xor00_resources),
669         .resource       = kirkwood_xor00_resources,
670         .dev            = {
671                 .dma_mask               = &kirkwood_xor_dmamask,
672                 .coherent_dma_mask      = DMA_BIT_MASK(64),
673                 .platform_data          = &kirkwood_xor00_data,
674         },
675 };
676
677 static struct resource kirkwood_xor01_resources[] = {
678         [0] = {
679                 .start  = IRQ_KIRKWOOD_XOR_01,
680                 .end    = IRQ_KIRKWOOD_XOR_01,
681                 .flags  = IORESOURCE_IRQ,
682         },
683 };
684
685 static struct mv_xor_platform_data kirkwood_xor01_data = {
686         .shared         = &kirkwood_xor0_shared,
687         .hw_id          = 1,
688         .pool_size      = PAGE_SIZE,
689 };
690
691 static struct platform_device kirkwood_xor01_channel = {
692         .name           = MV_XOR_NAME,
693         .id             = 1,
694         .num_resources  = ARRAY_SIZE(kirkwood_xor01_resources),
695         .resource       = kirkwood_xor01_resources,
696         .dev            = {
697                 .dma_mask               = &kirkwood_xor_dmamask,
698                 .coherent_dma_mask      = DMA_BIT_MASK(64),
699                 .platform_data          = &kirkwood_xor01_data,
700         },
701 };
702
703 static void __init kirkwood_xor0_init(void)
704 {
705         kirkwood_clk_ctrl |= CGC_XOR0;
706         platform_device_register(&kirkwood_xor0_shared);
707
708         /*
709          * two engines can't do memset simultaneously, this limitation
710          * satisfied by removing memset support from one of the engines.
711          */
712         dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
713         dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
714         platform_device_register(&kirkwood_xor00_channel);
715
716         dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
717         dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
718         dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
719         platform_device_register(&kirkwood_xor01_channel);
720 }
721
722
723 /*****************************************************************************
724  * XOR1
725  ****************************************************************************/
726 static struct resource kirkwood_xor1_shared_resources[] = {
727         {
728                 .name   = "xor 1 low",
729                 .start  = XOR1_PHYS_BASE,
730                 .end    = XOR1_PHYS_BASE + 0xff,
731                 .flags  = IORESOURCE_MEM,
732         }, {
733                 .name   = "xor 1 high",
734                 .start  = XOR1_HIGH_PHYS_BASE,
735                 .end    = XOR1_HIGH_PHYS_BASE + 0xff,
736                 .flags  = IORESOURCE_MEM,
737         },
738 };
739
740 static struct platform_device kirkwood_xor1_shared = {
741         .name           = MV_XOR_SHARED_NAME,
742         .id             = 1,
743         .dev            = {
744                 .platform_data = &kirkwood_xor_shared_data,
745         },
746         .num_resources  = ARRAY_SIZE(kirkwood_xor1_shared_resources),
747         .resource       = kirkwood_xor1_shared_resources,
748 };
749
750 static struct resource kirkwood_xor10_resources[] = {
751         [0] = {
752                 .start  = IRQ_KIRKWOOD_XOR_10,
753                 .end    = IRQ_KIRKWOOD_XOR_10,
754                 .flags  = IORESOURCE_IRQ,
755         },
756 };
757
758 static struct mv_xor_platform_data kirkwood_xor10_data = {
759         .shared         = &kirkwood_xor1_shared,
760         .hw_id          = 0,
761         .pool_size      = PAGE_SIZE,
762 };
763
764 static struct platform_device kirkwood_xor10_channel = {
765         .name           = MV_XOR_NAME,
766         .id             = 2,
767         .num_resources  = ARRAY_SIZE(kirkwood_xor10_resources),
768         .resource       = kirkwood_xor10_resources,
769         .dev            = {
770                 .dma_mask               = &kirkwood_xor_dmamask,
771                 .coherent_dma_mask      = DMA_BIT_MASK(64),
772                 .platform_data          = &kirkwood_xor10_data,
773         },
774 };
775
776 static struct resource kirkwood_xor11_resources[] = {
777         [0] = {
778                 .start  = IRQ_KIRKWOOD_XOR_11,
779                 .end    = IRQ_KIRKWOOD_XOR_11,
780                 .flags  = IORESOURCE_IRQ,
781         },
782 };
783
784 static struct mv_xor_platform_data kirkwood_xor11_data = {
785         .shared         = &kirkwood_xor1_shared,
786         .hw_id          = 1,
787         .pool_size      = PAGE_SIZE,
788 };
789
790 static struct platform_device kirkwood_xor11_channel = {
791         .name           = MV_XOR_NAME,
792         .id             = 3,
793         .num_resources  = ARRAY_SIZE(kirkwood_xor11_resources),
794         .resource       = kirkwood_xor11_resources,
795         .dev            = {
796                 .dma_mask               = &kirkwood_xor_dmamask,
797                 .coherent_dma_mask      = DMA_BIT_MASK(64),
798                 .platform_data          = &kirkwood_xor11_data,
799         },
800 };
801
802 static void __init kirkwood_xor1_init(void)
803 {
804         kirkwood_clk_ctrl |= CGC_XOR1;
805         platform_device_register(&kirkwood_xor1_shared);
806
807         /*
808          * two engines can't do memset simultaneously, this limitation
809          * satisfied by removing memset support from one of the engines.
810          */
811         dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
812         dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
813         platform_device_register(&kirkwood_xor10_channel);
814
815         dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
816         dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
817         dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
818         platform_device_register(&kirkwood_xor11_channel);
819 }
820
821
822 /*****************************************************************************
823  * Watchdog
824  ****************************************************************************/
825 static struct orion_wdt_platform_data kirkwood_wdt_data = {
826         .tclk           = 0,
827 };
828
829 static struct platform_device kirkwood_wdt_device = {
830         .name           = "orion_wdt",
831         .id             = -1,
832         .dev            = {
833                 .platform_data  = &kirkwood_wdt_data,
834         },
835         .num_resources  = 0,
836 };
837
838 static void __init kirkwood_wdt_init(void)
839 {
840         kirkwood_wdt_data.tclk = kirkwood_tclk;
841         platform_device_register(&kirkwood_wdt_device);
842 }
843
844
845 /*****************************************************************************
846  * Time handling
847  ****************************************************************************/
848 int kirkwood_tclk;
849
850 int __init kirkwood_find_tclk(void)
851 {
852         u32 dev, rev;
853
854         kirkwood_pcie_id(&dev, &rev);
855
856         if ((dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 ||
857                                         rev == MV88F6281_REV_A1)) ||
858             (dev == MV88F6282_DEV_ID))
859                 return 200000000;
860
861         return 166666667;
862 }
863
864 static void __init kirkwood_timer_init(void)
865 {
866         kirkwood_tclk = kirkwood_find_tclk();
867         orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
868 }
869
870 struct sys_timer kirkwood_timer = {
871         .init = kirkwood_timer_init,
872 };
873
874
875 /*****************************************************************************
876  * General
877  ****************************************************************************/
878 /*
879  * Identify device ID and revision.
880  */
881 static char * __init kirkwood_id(void)
882 {
883         u32 dev, rev;
884
885         kirkwood_pcie_id(&dev, &rev);
886
887         if (dev == MV88F6281_DEV_ID) {
888                 if (rev == MV88F6281_REV_Z0)
889                         return "MV88F6281-Z0";
890                 else if (rev == MV88F6281_REV_A0)
891                         return "MV88F6281-A0";
892                 else if (rev == MV88F6281_REV_A1)
893                         return "MV88F6281-A1";
894                 else
895                         return "MV88F6281-Rev-Unsupported";
896         } else if (dev == MV88F6192_DEV_ID) {
897                 if (rev == MV88F6192_REV_Z0)
898                         return "MV88F6192-Z0";
899                 else if (rev == MV88F6192_REV_A0)
900                         return "MV88F6192-A0";
901                 else if (rev == MV88F6192_REV_A1)
902                         return "MV88F6192-A1";
903                 else
904                         return "MV88F6192-Rev-Unsupported";
905         } else if (dev == MV88F6180_DEV_ID) {
906                 if (rev == MV88F6180_REV_A0)
907                         return "MV88F6180-Rev-A0";
908                 else if (rev == MV88F6180_REV_A1)
909                         return "MV88F6180-Rev-A1";
910                 else
911                         return "MV88F6180-Rev-Unsupported";
912         } else if (dev == MV88F6282_DEV_ID) {
913                 if (rev == MV88F6282_REV_A0)
914                         return "MV88F6282-Rev-A0";
915                 else
916                         return "MV88F6282-Rev-Unsupported";
917         } else {
918                 return "Device-Unknown";
919         }
920 }
921
922 static void __init kirkwood_l2_init(void)
923 {
924 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
925         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
926         feroceon_l2_init(1);
927 #else
928         writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
929         feroceon_l2_init(0);
930 #endif
931 }
932
933 void __init kirkwood_init(void)
934 {
935         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
936                 kirkwood_id(), kirkwood_tclk);
937         kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
938         kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
939         kirkwood_spi_plat_data.tclk = kirkwood_tclk;
940         kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
941         kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
942
943         /*
944          * Disable propagation of mbus errors to the CPU local bus,
945          * as this causes mbus errors (which can occur for example
946          * for PCI aborts) to throw CPU aborts, which we're not set
947          * up to deal with.
948          */
949         writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
950
951         kirkwood_setup_cpu_mbus();
952
953 #ifdef CONFIG_CACHE_FEROCEON_L2
954         kirkwood_l2_init();
955 #endif
956
957         /* internal devices that every board has */
958         kirkwood_rtc_init();
959         kirkwood_wdt_init();
960         kirkwood_xor0_init();
961         kirkwood_xor1_init();
962         kirkwood_crypto_init();
963 }
964
965 static int __init kirkwood_clock_gate(void)
966 {
967         unsigned int curr = readl(CLOCK_GATING_CTRL);
968         u32 dev, rev;
969
970         kirkwood_pcie_id(&dev, &rev);
971         printk(KERN_DEBUG "Gating clock of unused units\n");
972         printk(KERN_DEBUG "before: 0x%08x\n", curr);
973
974         /* Make sure those units are accessible */
975         writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
976
977         /* For SATA: first shutdown the phy */
978         if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
979                 /* Disable PLL and IVREF */
980                 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
981                 /* Disable PHY */
982                 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
983         }
984         if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
985                 /* Disable PLL and IVREF */
986                 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
987                 /* Disable PHY */
988                 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
989         }
990         
991         /* For PCIe: first shutdown the phy */
992         if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
993                 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
994                 while (1)
995                         if (readl(PCIE_STATUS) & 0x1)
996                                 break;
997                 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
998         }
999
1000         /* For PCIe 1: first shutdown the phy */
1001         if (dev == MV88F6282_DEV_ID) {
1002                 if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
1003                         writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
1004                         while (1)
1005                                 if (readl(PCIE1_STATUS) & 0x1)
1006                                         break;
1007                         writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
1008                 }
1009         } else  /* keep this bit set for devices that don't have PCIe1 */
1010                 kirkwood_clk_ctrl |= CGC_PEX1;
1011
1012         /* Now gate clock the required units */
1013         writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
1014         printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
1015
1016         return 0;
1017 }
1018 late_initcall(kirkwood_clock_gate);