1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _IOP13XX_TIME_H_
3 #define _IOP13XX_TIME_H_
7 #define IRQ_IOP_TIMER0 IRQ_IOP13XX_TIMER0
9 #define IOP_TMR_EN 0x02
10 #define IOP_TMR_RELOAD 0x04
11 #define IOP_TMR_PRIVILEGED 0x08
12 #define IOP_TMR_RATIO_1_1 0x00
14 #define IOP13XX_XSI_FREQ_RATIO_MASK (3 << 19)
15 #define IOP13XX_XSI_FREQ_RATIO_2 (0 << 19)
16 #define IOP13XX_XSI_FREQ_RATIO_3 (1 << 19)
17 #define IOP13XX_XSI_FREQ_RATIO_4 (2 << 19)
18 #define IOP13XX_CORE_FREQ_MASK (7 << 16)
19 #define IOP13XX_CORE_FREQ_600 (0 << 16)
20 #define IOP13XX_CORE_FREQ_667 (1 << 16)
21 #define IOP13XX_CORE_FREQ_800 (2 << 16)
22 #define IOP13XX_CORE_FREQ_933 (3 << 16)
23 #define IOP13XX_CORE_FREQ_1000 (4 << 16)
24 #define IOP13XX_CORE_FREQ_1200 (5 << 16)
26 void iop_init_time(unsigned long tickrate);
28 static inline unsigned long iop13xx_core_freq(void)
30 unsigned long freq = __raw_readl(IOP13XX_PROCESSOR_FREQ);
31 freq &= IOP13XX_CORE_FREQ_MASK;
33 case IOP13XX_CORE_FREQ_600:
35 case IOP13XX_CORE_FREQ_667:
37 case IOP13XX_CORE_FREQ_800:
39 case IOP13XX_CORE_FREQ_933:
41 case IOP13XX_CORE_FREQ_1000:
43 case IOP13XX_CORE_FREQ_1200:
46 printk("%s: warning unknown frequency, defaulting to 800MHz\n",
53 static inline unsigned long iop13xx_xsi_bus_ratio(void)
55 unsigned long ratio = __raw_readl(IOP13XX_PROCESSOR_FREQ);
56 ratio &= IOP13XX_XSI_FREQ_RATIO_MASK;
58 case IOP13XX_XSI_FREQ_RATIO_2:
60 case IOP13XX_XSI_FREQ_RATIO_3:
62 case IOP13XX_XSI_FREQ_RATIO_4:
65 printk("%s: warning unknown ratio, defaulting to 2\n",
72 static inline u32 read_tmr0(void)
75 asm volatile("mrc p6, 0, %0, c0, c9, 0" : "=r" (val));
79 static inline void write_tmr0(u32 val)
81 asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val));
84 static inline void write_tmr1(u32 val)
86 asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (val));
89 static inline u32 read_tcr0(void)
92 asm volatile("mrc p6, 0, %0, c2, c9, 0" : "=r" (val));
96 static inline void write_tcr0(u32 val)
98 asm volatile("mcr p6, 0, %0, c2, c9, 0" : : "r" (val));
101 static inline u32 read_tcr1(void)
104 asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
108 static inline void write_tcr1(u32 val)
110 asm volatile("mcr p6, 0, %0, c3, c9, 0" : : "r" (val));
113 static inline void write_trr0(u32 val)
115 asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val));
118 static inline void write_trr1(u32 val)
120 asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (val));
123 static inline void write_tisr(u32 val)
125 asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (val));