2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/platform_device.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/physmap.h>
20 #include <linux/gpio/driver.h>
21 #include <linux/gpio/machine.h>
22 #include <linux/gpio.h>
23 #include <linux/regulator/fixed.h>
24 #include <linux/regulator/machine.h>
25 #include <asm/mach-types.h>
26 #include <asm/mach/arch.h>
29 #include "devices-imx21.h"
31 #include "iomux-mx21.h"
33 #define MX21ADS_CS8900A_REG (MX21_CS1_BASE_ADDR + 0x000000)
34 #define MX21ADS_ST16C255_IOBASE_REG (MX21_CS1_BASE_ADDR + 0x200000)
35 #define MX21ADS_VERSION_REG (MX21_CS1_BASE_ADDR + 0x400000)
36 #define MX21ADS_IO_REG (MX21_CS1_BASE_ADDR + 0x800000)
38 #define MX21ADS_MMC_CD IMX_GPIO_NR(4, 25)
39 #define MX21ADS_CS8900A_IRQ_GPIO IMX_GPIO_NR(5, 11)
40 #define MX21ADS_MMGPIO_BASE (6 * 32)
42 /* MX21ADS_IO_REG bit definitions */
43 #define MX21ADS_IO_SD_WP (MX21ADS_MMGPIO_BASE + 0)
44 #define MX21ADS_IO_TP6 (MX21ADS_IO_SD_WP)
45 #define MX21ADS_IO_SW_SEL (MX21ADS_MMGPIO_BASE + 1)
46 #define MX21ADS_IO_TP7 (MX21ADS_IO_SW_SEL)
47 #define MX21ADS_IO_RESET_E_UART (MX21ADS_MMGPIO_BASE + 2)
48 #define MX21ADS_IO_RESET_BASE (MX21ADS_MMGPIO_BASE + 3)
49 #define MX21ADS_IO_CSI_CTL2 (MX21ADS_MMGPIO_BASE + 4)
50 #define MX21ADS_IO_CSI_CTL1 (MX21ADS_MMGPIO_BASE + 5)
51 #define MX21ADS_IO_CSI_CTL0 (MX21ADS_MMGPIO_BASE + 6)
52 #define MX21ADS_IO_UART1_EN (MX21ADS_MMGPIO_BASE + 7)
53 #define MX21ADS_IO_UART4_EN (MX21ADS_MMGPIO_BASE + 8)
54 #define MX21ADS_IO_LCDON (MX21ADS_MMGPIO_BASE + 9)
55 #define MX21ADS_IO_IRDA_EN (MX21ADS_MMGPIO_BASE + 10)
56 #define MX21ADS_IO_IRDA_FIR_SEL (MX21ADS_MMGPIO_BASE + 11)
57 #define MX21ADS_IO_IRDA_MD0_B (MX21ADS_MMGPIO_BASE + 12)
58 #define MX21ADS_IO_IRDA_MD1 (MX21ADS_MMGPIO_BASE + 13)
59 #define MX21ADS_IO_LED4_ON (MX21ADS_MMGPIO_BASE + 14)
60 #define MX21ADS_IO_LED3_ON (MX21ADS_MMGPIO_BASE + 15)
62 static const int mx21ads_pins[] __initconst = {
65 (GPIO_PORTE | GPIO_GPIO | GPIO_IN | 11),
73 /* UART3 (IrDA) - only TXD and RXD */
102 PA24_PF_REV, /* Sharp panel dedicated signal */
103 PA25_PF_CLS, /* Sharp panel dedicated signal */
104 PA26_PF_PS, /* Sharp panel dedicated signal */
105 PA27_PF_SPL_SPR, /* Sharp panel dedicated signal */
137 /* ADS's NOR flash: 2x AM29BDS128HE9VKI on 32-bit bus */
138 static struct physmap_flash_data mx21ads_flash_data = {
142 static struct resource mx21ads_flash_resource =
143 DEFINE_RES_MEM(MX21_CS0_BASE_ADDR, SZ_32M);
145 static struct platform_device mx21ads_nor_mtd_device = {
146 .name = "physmap-flash",
149 .platform_data = &mx21ads_flash_data,
152 .resource = &mx21ads_flash_resource,
155 static struct resource mx21ads_cs8900_resources[] __initdata = {
156 DEFINE_RES_MEM(MX21ADS_CS8900A_REG, SZ_1K),
157 /* irq number is run-time assigned */
161 static const struct platform_device_info mx21ads_cs8900_devinfo __initconst = {
164 .res = mx21ads_cs8900_resources,
165 .num_res = ARRAY_SIZE(mx21ads_cs8900_resources),
168 static const struct imxuart_platform_data uart_pdata_rts __initconst = {
169 .flags = IMXUART_HAVE_RTSCTS,
172 static const struct imxuart_platform_data uart_pdata_norts __initconst = {
175 static struct resource mx21ads_mmgpio_resource =
176 DEFINE_RES_MEM_NAMED(MX21ADS_IO_REG, SZ_2, "dat");
178 static struct bgpio_pdata mx21ads_mmgpio_pdata = {
179 .label = "mx21ads-mmgpio",
180 .base = MX21ADS_MMGPIO_BASE,
184 static struct platform_device mx21ads_mmgpio = {
185 .name = "basic-mmio-gpio",
186 .id = PLATFORM_DEVID_AUTO,
187 .resource = &mx21ads_mmgpio_resource,
190 .platform_data = &mx21ads_mmgpio_pdata,
194 static struct regulator_consumer_supply mx21ads_lcd_regulator_consumer =
195 REGULATOR_SUPPLY("lcd", "imx-fb.0");
197 static struct regulator_init_data mx21ads_lcd_regulator_init_data = {
199 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
201 .consumer_supplies = &mx21ads_lcd_regulator_consumer,
202 .num_consumer_supplies = 1,
205 static struct fixed_voltage_config mx21ads_lcd_regulator_pdata = {
206 .supply_name = "LCD",
207 .microvolts = 3300000,
209 .init_data = &mx21ads_lcd_regulator_init_data,
212 static struct platform_device mx21ads_lcd_regulator = {
213 .name = "reg-fixed-voltage",
214 .id = PLATFORM_DEVID_AUTO,
216 .platform_data = &mx21ads_lcd_regulator_pdata,
220 static struct gpiod_lookup_table mx21ads_lcd_regulator_gpiod_table = {
221 .dev_id = "reg-fixed-voltage.0", /* Let's hope ID 0 is what we get */
223 GPIO_LOOKUP("mx21ads-mmgpio", 9, NULL, GPIO_ACTIVE_HIGH),
229 * Connected is a portrait Sharp-QVGA display
230 * of type: LQ035Q7DB02
232 static struct imx_fb_videomode mx21ads_modes[] = {
235 .name = "Sharp-LQ035Q7",
239 .pixclock = 188679, /* in ps (5.3MHz) */
252 static const struct imx_fb_platform_data mx21ads_fb_data __initconst = {
253 .mode = mx21ads_modes,
254 .num_modes = ARRAY_SIZE(mx21ads_modes),
261 static int mx21ads_sdhc_get_ro(struct device *dev)
263 return gpio_get_value(MX21ADS_IO_SD_WP);
266 static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq,
271 ret = gpio_request(MX21ADS_IO_SD_WP, "mmc-ro");
275 return request_irq(gpio_to_irq(MX21ADS_MMC_CD), detect_irq,
276 IRQF_TRIGGER_FALLING, "mmc-detect", data);
279 static void mx21ads_sdhc_exit(struct device *dev, void *data)
281 free_irq(gpio_to_irq(MX21ADS_MMC_CD), data);
282 gpio_free(MX21ADS_IO_SD_WP);
285 static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = {
286 .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */
287 .get_ro = mx21ads_sdhc_get_ro,
288 .init = mx21ads_sdhc_init,
289 .exit = mx21ads_sdhc_exit,
292 static const struct mxc_nand_platform_data
293 mx21ads_nand_board_info __initconst = {
298 static struct platform_device *platform_devices[] __initdata = {
300 &mx21ads_lcd_regulator,
301 &mx21ads_nor_mtd_device,
304 static void __init mx21ads_board_init(void)
308 mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins),
311 imx21_add_imx_uart0(&uart_pdata_rts);
312 imx21_add_imx_uart2(&uart_pdata_norts);
313 imx21_add_imx_uart3(&uart_pdata_rts);
314 imx21_add_mxc_nand(&mx21ads_nand_board_info);
316 imx21_add_imx_fb(&mx21ads_fb_data);
319 static void __init mx21ads_late_init(void)
321 imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata);
323 gpiod_add_lookup_table(&mx21ads_lcd_regulator_gpiod_table);
324 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
326 mx21ads_cs8900_resources[1].start =
327 gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
328 mx21ads_cs8900_resources[1].end =
329 gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO);
330 platform_device_register_full(&mx21ads_cs8900_devinfo);
333 static void __init mx21ads_timer_init(void)
335 mx21_clocks_init(32768, 26000000);
338 MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
339 /* maintainer: Freescale Semiconductor, Inc. */
340 .atag_offset = 0x100,
341 .map_io = mx21_map_io,
342 .init_early = imx21_init_early,
343 .init_irq = mx21_init_irq,
344 .init_time = mx21ads_timer_init,
345 .init_machine = mx21ads_board_init,
346 .init_late = mx21ads_late_init,
347 .restart = mxc_restart,