treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
[sfrench/cifs-2.6.git] / arch / arm / mach-imx / mach-kzm_arm11_01.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * KZM-ARM11-01 support
4  *  Copyright (C) 2009  Yoichi Yuasa <yuasa@linux-mips.org>
5  *
6  * based on code for MX31ADS,
7  *  Copyright (C) 2000 Deep Blue Solutions Ltd
8  *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
9  *  Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
10  */
11
12 #include <linux/gpio.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/serial_8250.h>
16 #include <linux/smsc911x.h>
17 #include <linux/types.h>
18 #include <linux/regulator/machine.h>
19 #include <linux/regulator/fixed.h>
20
21 #include <asm/irq.h>
22 #include <asm/mach-types.h>
23 #include <asm/memory.h>
24 #include <asm/setup.h>
25 #include <asm/mach/arch.h>
26 #include <asm/mach/irq.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/time.h>
29
30 #include "common.h"
31 #include "devices-imx31.h"
32 #include "hardware.h"
33 #include "iomux-mx3.h"
34
35 #define KZM_ARM11_IO_ADDRESS(x) (IOMEM(                                 \
36         IMX_IO_P2V_MODULE(x, MX31_CS4) ?:                               \
37         IMX_IO_P2V_MODULE(x, MX31_CS5)) ?:                              \
38         MX31_IO_ADDRESS(x))
39
40 /*
41  *  KZM-ARM11-01 Board Control Registers on FPGA
42  */
43 #define KZM_ARM11_CTL1          (MX31_CS4_BASE_ADDR + 0x1000)
44 #define KZM_ARM11_CTL2          (MX31_CS4_BASE_ADDR + 0x1001)
45 #define KZM_ARM11_RSW1          (MX31_CS4_BASE_ADDR + 0x1002)
46 #define KZM_ARM11_BACK_LIGHT    (MX31_CS4_BASE_ADDR + 0x1004)
47 #define KZM_ARM11_FPGA_REV      (MX31_CS4_BASE_ADDR + 0x1008)
48 #define KZM_ARM11_7SEG_LED      (MX31_CS4_BASE_ADDR + 0x1010)
49 #define KZM_ARM11_LEDS          (MX31_CS4_BASE_ADDR + 0x1020)
50 #define KZM_ARM11_DIPSW2        (MX31_CS4_BASE_ADDR + 0x1003)
51
52 /*
53  * External UART for touch panel on FPGA
54  */
55 #define KZM_ARM11_16550         (MX31_CS4_BASE_ADDR + 0x1050)
56
57 #if IS_ENABLED(CONFIG_SERIAL_8250)
58 /*
59  * KZM-ARM11-01 has an external UART on FPGA
60  */
61 static struct plat_serial8250_port serial_platform_data[] = {
62         {
63                 .membase        = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
64                 .mapbase        = KZM_ARM11_16550,
65                 /* irq number is run-time assigned */
66                 .irqflags       = IRQ_TYPE_EDGE_RISING,
67                 .uartclk        = 14745600,
68                 .regshift       = 0,
69                 .iotype         = UPIO_MEM,
70                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
71                                   UPF_BUGGY_UART,
72         },
73         {},
74 };
75
76 static struct resource serial8250_resources[] = {
77         {
78                 .start  = KZM_ARM11_16550,
79                 .end    = KZM_ARM11_16550 + 0x10,
80                 .flags  = IORESOURCE_MEM,
81         },
82         {
83                 /* irq number is run-time assigned */
84                 .flags  = IORESOURCE_IRQ,
85         },
86 };
87
88 static struct platform_device serial_device = {
89         .name           = "serial8250",
90         .id             = PLAT8250_DEV_PLATFORM,
91         .dev            = {
92                                 .platform_data = serial_platform_data,
93                           },
94         .num_resources  = ARRAY_SIZE(serial8250_resources),
95         .resource       = serial8250_resources,
96 };
97
98 static int __init kzm_init_ext_uart(void)
99 {
100         u8 tmp;
101
102         /*
103          * GPIO 1-1: external UART interrupt line
104          */
105         mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO));
106         gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int");
107         gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
108
109         /*
110          * Unmask UART interrupt
111          */
112         tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
113         tmp |= 0x2;
114         __raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
115
116         serial_platform_data[0].irq =
117                         gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
118         serial8250_resources[1].start =
119                         gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
120         serial8250_resources[1].end =
121                         gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
122
123         return platform_device_register(&serial_device);
124 }
125 #else
126 static inline int kzm_init_ext_uart(void)
127 {
128         return 0;
129 }
130 #endif
131
132 /*
133  * SMSC LAN9118
134  */
135 #if IS_ENABLED(CONFIG_SMSC911X)
136 static struct smsc911x_platform_config kzm_smsc9118_config = {
137         .phy_interface  = PHY_INTERFACE_MODE_MII,
138         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
139         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
140         .flags          = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
141 };
142
143 static struct resource kzm_smsc9118_resources[] = {
144         {
145                 .start  = MX31_CS5_BASE_ADDR,
146                 .end    = MX31_CS5_BASE_ADDR + SZ_128K - 1,
147                 .flags  = IORESOURCE_MEM,
148         },
149         {
150                 /* irq number is run-time assigned */
151                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
152         },
153 };
154
155 static struct platform_device kzm_smsc9118_device = {
156         .name           = "smsc911x",
157         .id             = -1,
158         .num_resources  = ARRAY_SIZE(kzm_smsc9118_resources),
159         .resource       = kzm_smsc9118_resources,
160         .dev            = {
161                                 .platform_data = &kzm_smsc9118_config,
162                           },
163 };
164
165 static struct regulator_consumer_supply dummy_supplies[] = {
166         REGULATOR_SUPPLY("vdd33a", "smsc911x"),
167         REGULATOR_SUPPLY("vddvario", "smsc911x"),
168 };
169
170 static int __init kzm_init_smsc9118(void)
171 {
172         /*
173          * GPIO 1-2: SMSC9118 interrupt line
174          */
175         mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO));
176         gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
177         gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
178
179         regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
180
181         kzm_smsc9118_resources[1].start =
182                         gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
183         kzm_smsc9118_resources[1].end =
184                         gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
185
186         return platform_device_register(&kzm_smsc9118_device);
187 }
188 #else
189 static inline int kzm_init_smsc9118(void)
190 {
191         return 0;
192 }
193 #endif
194
195 #if IS_ENABLED(CONFIG_SERIAL_IMX)
196 static const struct imxuart_platform_data uart_pdata __initconst = {
197         .flags = IMXUART_HAVE_RTSCTS,
198 };
199
200 static void __init kzm_init_imx_uart(void)
201 {
202         imx31_add_imx_uart0(&uart_pdata);
203         imx31_add_imx_uart1(&uart_pdata);
204 }
205 #else
206 static inline void kzm_init_imx_uart(void)
207 {
208 }
209 #endif
210
211 static int kzm_pins[] __initdata = {
212         MX31_PIN_CTS1__CTS1,
213         MX31_PIN_RTS1__RTS1,
214         MX31_PIN_TXD1__TXD1,
215         MX31_PIN_RXD1__RXD1,
216         MX31_PIN_DCD_DCE1__DCD_DCE1,
217         MX31_PIN_RI_DCE1__RI_DCE1,
218         MX31_PIN_DSR_DCE1__DSR_DCE1,
219         MX31_PIN_DTR_DCE1__DTR_DCE1,
220         MX31_PIN_CTS2__CTS2,
221         MX31_PIN_RTS2__RTS2,
222         MX31_PIN_TXD2__TXD2,
223         MX31_PIN_RXD2__RXD2,
224         MX31_PIN_DCD_DTE1__DCD_DTE2,
225         MX31_PIN_RI_DTE1__RI_DTE2,
226         MX31_PIN_DSR_DTE1__DSR_DTE2,
227         MX31_PIN_DTR_DTE1__DTR_DTE2,
228 };
229
230 /*
231  * Board specific initialization.
232  */
233 static void __init kzm_board_init(void)
234 {
235         imx31_soc_init();
236
237         mxc_iomux_setup_multiple_pins(kzm_pins,
238                                       ARRAY_SIZE(kzm_pins), "kzm");
239         kzm_init_imx_uart();
240
241         pr_info("Clock input source is 26MHz\n");
242 }
243
244 static void __init kzm_late_init(void)
245 {
246         kzm_init_ext_uart();
247         kzm_init_smsc9118();
248 }
249
250 /*
251  * This structure defines static mappings for the kzm-arm11-01 board.
252  */
253 static struct map_desc kzm_io_desc[] __initdata = {
254         {
255                 .virtual        = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
256                 .pfn            = __phys_to_pfn(MX31_CS4_BASE_ADDR),
257                 .length         = MX31_CS4_SIZE,
258                 .type           = MT_DEVICE
259         },
260         {
261                 .virtual        = (unsigned long)MX31_CS5_BASE_ADDR_VIRT,
262                 .pfn            = __phys_to_pfn(MX31_CS5_BASE_ADDR),
263                 .length         = MX31_CS5_SIZE,
264                 .type           = MT_DEVICE
265         },
266 };
267
268 /*
269  * Set up static virtual mappings.
270  */
271 static void __init kzm_map_io(void)
272 {
273         mx31_map_io();
274         iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc));
275 }
276
277 static void __init kzm_timer_init(void)
278 {
279         mx31_clocks_init(26000000);
280 }
281
282 MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
283         .atag_offset = 0x100,
284         .map_io = kzm_map_io,
285         .init_early = imx31_init_early,
286         .init_irq = mx31_init_irq,
287         .init_time      = kzm_timer_init,
288         .init_machine = kzm_board_init,
289         .init_late      = kzm_late_init,
290         .restart        = mxc_restart,
291 MACHINE_END