Merge tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw...
[sfrench/cifs-2.6.git] / arch / arm / mach-davinci / devices.c
1 /*
2  * mach-davinci/devices.c
3  *
4  * DaVinci platform device setup/initialization
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  */
11
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/platform_data/i2c-davinci.h>
15 #include <linux/platform_data/mmc-davinci.h>
16 #include <linux/platform_data/edma.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/io.h>
19 #include <linux/reboot.h>
20
21 #include <mach/hardware.h>
22 #include <mach/cputype.h>
23 #include <mach/mux.h>
24 #include <mach/time.h>
25
26 #include "davinci.h"
27 #include "irqs.h"
28
29 #define DAVINCI_I2C_BASE             0x01C21000
30 #define DAVINCI_ATA_BASE             0x01C66000
31 #define DAVINCI_MMCSD0_BASE          0x01E10000
32 #define DM355_MMCSD0_BASE            0x01E11000
33 #define DM355_MMCSD1_BASE            0x01E00000
34 #define DM365_MMCSD0_BASE            0x01D11000
35 #define DM365_MMCSD1_BASE            0x01D00000
36
37 void __iomem  *davinci_sysmod_base;
38
39 void davinci_map_sysmod(void)
40 {
41         davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
42                                               0x800);
43         /*
44          * Throw a bug since a lot of board initialization code depends
45          * on system module availability. ioremap() failing this early
46          * need careful looking into anyway.
47          */
48         BUG_ON(!davinci_sysmod_base);
49 }
50
51 static struct resource i2c_resources[] = {
52         {
53                 .start          = DAVINCI_I2C_BASE,
54                 .end            = DAVINCI_I2C_BASE + 0x40,
55                 .flags          = IORESOURCE_MEM,
56         },
57         {
58                 .start          = DAVINCI_INTC_IRQ(IRQ_I2C),
59                 .flags          = IORESOURCE_IRQ,
60         },
61 };
62
63 static struct platform_device davinci_i2c_device = {
64         .name           = "i2c_davinci",
65         .id             = 1,
66         .num_resources  = ARRAY_SIZE(i2c_resources),
67         .resource       = i2c_resources,
68 };
69
70 void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
71 {
72         if (cpu_is_davinci_dm644x())
73                 davinci_cfg_reg(DM644X_I2C);
74
75         davinci_i2c_device.dev.platform_data = pdata;
76         (void) platform_device_register(&davinci_i2c_device);
77 }
78
79 static struct resource ide_resources[] = {
80         {
81                 .start          = DAVINCI_ATA_BASE,
82                 .end            = DAVINCI_ATA_BASE + 0x7ff,
83                 .flags          = IORESOURCE_MEM,
84         },
85         {
86                 .start          = DAVINCI_INTC_IRQ(IRQ_IDE),
87                 .end            = DAVINCI_INTC_IRQ(IRQ_IDE),
88                 .flags          = IORESOURCE_IRQ,
89         },
90 };
91
92 static u64 ide_dma_mask = DMA_BIT_MASK(32);
93
94 static struct platform_device ide_device = {
95         .name           = "palm_bk3710",
96         .id             = -1,
97         .resource       = ide_resources,
98         .num_resources  = ARRAY_SIZE(ide_resources),
99         .dev = {
100                 .dma_mask               = &ide_dma_mask,
101                 .coherent_dma_mask      = DMA_BIT_MASK(32),
102         },
103 };
104
105 void __init davinci_init_ide(void)
106 {
107         if (cpu_is_davinci_dm644x()) {
108                 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
109                 davinci_cfg_reg(DM644X_ATAEN);
110                 davinci_cfg_reg(DM644X_HDIREN);
111         } else if (cpu_is_davinci_dm646x()) {
112                 /* IRQ_DM646X_IDE is the same as IRQ_IDE */
113                 davinci_cfg_reg(DM646X_ATAEN);
114         } else {
115                 WARN_ON(1);
116                 return;
117         }
118
119         platform_device_register(&ide_device);
120 }
121
122 #if IS_ENABLED(CONFIG_MMC_DAVINCI)
123
124 static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
125
126 static struct resource mmcsd0_resources[] = {
127         {
128                 /* different on dm355 */
129                 .start = DAVINCI_MMCSD0_BASE,
130                 .end   = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
131                 .flags = IORESOURCE_MEM,
132         },
133         /* IRQs:  MMC/SD, then SDIO */
134         {
135                 .start = DAVINCI_INTC_IRQ(IRQ_MMCINT),
136                 .flags = IORESOURCE_IRQ,
137         }, {
138                 /* different on dm355 */
139                 .start = DAVINCI_INTC_IRQ(IRQ_SDIOINT),
140                 .flags = IORESOURCE_IRQ,
141         },
142 };
143
144 static struct platform_device davinci_mmcsd0_device = {
145         .name = "dm6441-mmc",
146         .id = 0,
147         .dev = {
148                 .dma_mask = &mmcsd0_dma_mask,
149                 .coherent_dma_mask = DMA_BIT_MASK(32),
150         },
151         .num_resources = ARRAY_SIZE(mmcsd0_resources),
152         .resource = mmcsd0_resources,
153 };
154
155 static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
156
157 static struct resource mmcsd1_resources[] = {
158         {
159                 .start = DM355_MMCSD1_BASE,
160                 .end   = DM355_MMCSD1_BASE + SZ_4K - 1,
161                 .flags = IORESOURCE_MEM,
162         },
163         /* IRQs:  MMC/SD, then SDIO */
164         {
165                 .start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1),
166                 .flags = IORESOURCE_IRQ,
167         }, {
168                 .start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1),
169                 .flags = IORESOURCE_IRQ,
170         },
171 };
172
173 static struct platform_device davinci_mmcsd1_device = {
174         .name = "dm6441-mmc",
175         .id = 1,
176         .dev = {
177                 .dma_mask = &mmcsd1_dma_mask,
178                 .coherent_dma_mask = DMA_BIT_MASK(32),
179         },
180         .num_resources = ARRAY_SIZE(mmcsd1_resources),
181         .resource = mmcsd1_resources,
182 };
183
184
185 void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
186 {
187         struct platform_device  *pdev = NULL;
188
189         if (WARN_ON(cpu_is_davinci_dm646x()))
190                 return;
191
192         /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
193          * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
194          *
195          * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
196          * not handled right here ...
197          */
198         switch (module) {
199         case 1:
200                 if (cpu_is_davinci_dm355()) {
201                         /* REVISIT we may not need all these pins if e.g. this
202                          * is a hard-wired SDIO device...
203                          */
204                         davinci_cfg_reg(DM355_SD1_CMD);
205                         davinci_cfg_reg(DM355_SD1_CLK);
206                         davinci_cfg_reg(DM355_SD1_DATA0);
207                         davinci_cfg_reg(DM355_SD1_DATA1);
208                         davinci_cfg_reg(DM355_SD1_DATA2);
209                         davinci_cfg_reg(DM355_SD1_DATA3);
210                 } else if (cpu_is_davinci_dm365()) {
211                         /* Configure pull down control */
212                         unsigned v;
213
214                         v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
215                         __raw_writel(v & ~0xfc0,
216                                         DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
217
218                         mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
219                         mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
220                                                         SZ_4K - 1;
221                         mmcsd1_resources[2].start = DAVINCI_INTC_IRQ(
222                                                         IRQ_DM365_SDIOINT1);
223                         davinci_mmcsd1_device.name = "da830-mmc";
224                 } else
225                         break;
226
227                 pdev = &davinci_mmcsd1_device;
228                 break;
229         case 0:
230                 if (cpu_is_davinci_dm355()) {
231                         mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
232                         mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
233                         mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
234                                                         IRQ_DM355_SDIOINT0);
235
236                         /* expose all 6 MMC0 signals:  CLK, CMD, DATA[0..3] */
237                         davinci_cfg_reg(DM355_MMCSD0);
238
239                         /* enable RX EDMA */
240                         davinci_cfg_reg(DM355_EVT26_MMC0_RX);
241                 } else if (cpu_is_davinci_dm365()) {
242                         mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
243                         mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
244                                                         SZ_4K - 1;
245                         mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
246                                                         IRQ_DM365_SDIOINT0);
247                         davinci_mmcsd0_device.name = "da830-mmc";
248                 } else if (cpu_is_davinci_dm644x()) {
249                         /* REVISIT: should this be in board-init code? */
250                         /* Power-on 3.3V IO cells */
251                         __raw_writel(0,
252                                 DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
253                         /*Set up the pull regiter for MMC */
254                         davinci_cfg_reg(DM644X_MSTK);
255                 }
256
257                 pdev = &davinci_mmcsd0_device;
258                 break;
259         }
260
261         if (WARN_ON(!pdev))
262                 return;
263
264         pdev->dev.platform_data = config;
265         platform_device_register(pdev);
266 }
267
268 #else
269
270 void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
271 {
272 }
273
274 #endif
275
276 /*-------------------------------------------------------------------------*/
277
278 static struct resource wdt_resources[] = {
279         {
280                 .start  = DAVINCI_WDOG_BASE,
281                 .end    = DAVINCI_WDOG_BASE + SZ_1K - 1,
282                 .flags  = IORESOURCE_MEM,
283         },
284 };
285
286 static struct platform_device davinci_wdt_device = {
287         .name           = "davinci-wdt",
288         .id             = -1,
289         .num_resources  = ARRAY_SIZE(wdt_resources),
290         .resource       = wdt_resources,
291 };
292
293 int davinci_init_wdt(void)
294 {
295         return platform_device_register(&davinci_wdt_device);
296 }
297
298 static struct platform_device davinci_gpio_device = {
299         .name   = "davinci_gpio",
300         .id     = -1,
301 };
302
303 int davinci_gpio_register(struct resource *res, int size, void *pdata)
304 {
305         davinci_gpio_device.resource = res;
306         davinci_gpio_device.num_resources = size;
307         davinci_gpio_device.dev.platform_data = pdata;
308         return platform_device_register(&davinci_gpio_device);
309 }
310
311 /*-------------------------------------------------------------------------*/
312
313 /*-------------------------------------------------------------------------*/
314
315 struct davinci_timer_instance davinci_timer_instance[2] = {
316         {
317                 .base           = DAVINCI_TIMER0_BASE,
318                 .bottom_irq     = DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12),
319                 .top_irq        = DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34),
320         },
321         {
322                 .base           = DAVINCI_TIMER1_BASE,
323                 .bottom_irq     = DAVINCI_INTC_IRQ(IRQ_TINT1_TINT12),
324                 .top_irq        = DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34),
325         },
326 };
327