2 * TI DaVinci EVM board support
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/gpio/machine.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_data/pcf857x.h>
19 #include <linux/platform_data/at24.h>
20 #include <linux/platform_data/gpio-davinci.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/rawnand.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/mtd/physmap.h>
25 #include <linux/phy.h>
26 #include <linux/clk.h>
27 #include <linux/videodev2.h>
28 #include <linux/v4l2-dv-timings.h>
29 #include <linux/export.h>
30 #include <linux/leds.h>
32 #include <media/i2c/tvp514x.h>
34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
37 #include <mach/common.h>
38 #include <linux/platform_data/i2c-davinci.h>
39 #include <mach/serial.h>
41 #include <linux/platform_data/mtd-davinci.h>
42 #include <linux/platform_data/mmc-davinci.h>
43 #include <linux/platform_data/usb-davinci.h>
44 #include <linux/platform_data/mtd-davinci-aemif.h>
48 #define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
49 #define LXT971_PHY_ID (0x001378e2)
50 #define LXT971_PHY_MASK (0xfffffff0)
52 static struct mtd_partition davinci_evm_norflash_partitions[] = {
53 /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
58 .mask_flags = MTD_WRITEABLE, /* force read-only */
60 /* bootloader params in the next 1 sectors */
63 .offset = MTDPART_OFS_APPEND,
70 .offset = MTDPART_OFS_APPEND,
77 .offset = MTDPART_OFS_APPEND,
78 .size = MTDPART_SIZ_FULL,
83 static struct physmap_flash_data davinci_evm_norflash_data = {
85 .parts = davinci_evm_norflash_partitions,
86 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
89 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
90 * limits addresses to 16M, so using addresses past 16M will wrap */
91 static struct resource davinci_evm_norflash_resource = {
92 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
93 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
94 .flags = IORESOURCE_MEM,
97 static struct platform_device davinci_evm_norflash_device = {
98 .name = "physmap-flash",
101 .platform_data = &davinci_evm_norflash_data,
104 .resource = &davinci_evm_norflash_resource,
107 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
108 * It may used instead of the (default) NOR chip to boot, using TI's
109 * tools to install the secondary boot loader (UBL) and U-Boot.
111 static struct mtd_partition davinci_evm_nandflash_partition[] = {
112 /* Bootloader layout depends on whose u-boot is installed, but we
113 * can hide all the details.
114 * - block 0 for u-boot environment ... in mainline u-boot
115 * - block 1 for UBL (plus up to four backup copies in blocks 2..5)
116 * - blocks 6...? for u-boot
117 * - blocks 16..23 for u-boot environment ... in TI's u-boot
120 .name = "bootloader",
122 .size = SZ_256K + SZ_128K,
123 .mask_flags = MTD_WRITEABLE, /* force read-only */
128 .offset = MTDPART_OFS_APPEND,
132 /* File system (older GIT kernels started this on the 5MB mark) */
134 .name = "filesystem",
135 .offset = MTDPART_OFS_APPEND,
136 .size = MTDPART_SIZ_FULL,
139 /* A few blocks at end hold a flash BBT ... created by TI's CCS
140 * using flashwriter_nand.out, but ignored by TI's versions of
141 * Linux and u-boot. We boot faster by using them.
145 static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
155 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
157 .parts = davinci_evm_nandflash_partition,
158 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
159 .ecc_mode = NAND_ECC_HW,
161 .bbt_options = NAND_BBT_USE_FLASH,
162 .timing = &davinci_evm_nandflash_timing,
165 static struct resource davinci_evm_nandflash_resource[] = {
167 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
168 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
169 .flags = IORESOURCE_MEM,
171 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
172 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
173 .flags = IORESOURCE_MEM,
177 static struct platform_device davinci_evm_nandflash_device = {
178 .name = "davinci_nand",
181 .platform_data = &davinci_evm_nandflash_data,
183 .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
184 .resource = davinci_evm_nandflash_resource,
187 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
189 static struct platform_device davinci_fb_device = {
193 .dma_mask = &davinci_fb_dma_mask,
194 .coherent_dma_mask = DMA_BIT_MASK(32),
199 static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
205 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
206 /* Inputs available at the TVP5146 */
207 static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
211 .type = V4L2_INPUT_TYPE_CAMERA,
212 .std = TVP514X_STD_ALL,
217 .type = V4L2_INPUT_TYPE_CAMERA,
218 .std = TVP514X_STD_ALL,
223 * this is the route info for connecting each input to decoder
224 * ouput that goes to vpfe. There is a one to one correspondence
225 * with tvp5146_inputs
227 static struct vpfe_route dm644xevm_tvp5146_routes[] = {
229 .input = INPUT_CVBS_VI2B,
230 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
233 .input = INPUT_SVIDEO_VI2C_VI1C,
234 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
238 static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
242 .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
243 .inputs = dm644xevm_tvp5146_inputs,
244 .routes = dm644xevm_tvp5146_routes,
247 .if_type = VPFE_BT656,
248 .hdpol = VPFE_PINPOL_POSITIVE,
249 .vdpol = VPFE_PINPOL_POSITIVE,
252 I2C_BOARD_INFO("tvp5146", 0x5d),
253 .platform_data = &dm644xevm_tvp5146_pdata,
258 static struct vpfe_config dm644xevm_capture_cfg = {
259 .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
261 .sub_devs = dm644xevm_vpfe_sub_devs,
262 .card_name = "DM6446 EVM",
263 .ccdc = "DM6446 CCDC",
266 static struct platform_device rtc_dev = {
267 .name = "rtc_davinci_evm",
271 /*----------------------------------------------------------------------*/
277 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
282 static struct gpio_led evm_leds[] = {
283 { .name = "DS8", .active_low = 1,
284 .default_trigger = "heartbeat", },
285 { .name = "DS7", .active_low = 1, },
286 { .name = "DS6", .active_low = 1, },
287 { .name = "DS5", .active_low = 1, },
288 { .name = "DS4", .active_low = 1, },
289 { .name = "DS3", .active_low = 1, },
290 { .name = "DS2", .active_low = 1,
291 .default_trigger = "mmc0", },
292 { .name = "DS1", .active_low = 1,
293 .default_trigger = "disk-activity", },
296 static const struct gpio_led_platform_data evm_led_data = {
297 .num_leds = ARRAY_SIZE(evm_leds),
301 static struct platform_device *evm_led_dev;
304 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
306 struct gpio_led *leds = evm_leds;
314 /* what an extremely annoying way to be forced to handle
315 * device unregistration ...
317 evm_led_dev = platform_device_alloc("leds-gpio", 0);
318 platform_device_add_data(evm_led_dev,
319 &evm_led_data, sizeof evm_led_data);
321 evm_led_dev->dev.parent = &client->dev;
322 status = platform_device_add(evm_led_dev);
324 platform_device_put(evm_led_dev);
331 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
334 platform_device_unregister(evm_led_dev);
340 static struct pcf857x_platform_data pcf_data_u2 = {
341 .gpio_base = PCF_Uxx_BASE(0),
342 .setup = evm_led_setup,
343 .teardown = evm_led_teardown,
347 /* U18 - A/V clock generator and user switch */
352 sw_show(struct device *d, struct device_attribute *a, char *buf)
354 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
360 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
363 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
367 /* export dip switch option */
369 status = gpio_request(sw_gpio, "user_sw");
371 status = gpio_direction_input(sw_gpio);
373 status = device_create_file(&client->dev, &dev_attr_user_sw);
379 /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
380 gpio_request(gpio + 3, "pll_fs2");
381 gpio_direction_output(gpio + 3, 0);
383 gpio_request(gpio + 2, "pll_fs1");
384 gpio_direction_output(gpio + 2, 0);
386 gpio_request(gpio + 1, "pll_sr");
387 gpio_direction_output(gpio + 1, 0);
393 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
400 device_remove_file(&client->dev, &dev_attr_user_sw);
406 static struct pcf857x_platform_data pcf_data_u18 = {
407 .gpio_base = PCF_Uxx_BASE(1),
408 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
409 .setup = evm_u18_setup,
410 .teardown = evm_u18_teardown,
414 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
417 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
419 /* p0 = nDRV_VBUS (initial: don't supply it) */
420 gpio_request(gpio + 0, "nDRV_VBUS");
421 gpio_direction_output(gpio + 0, 1);
424 gpio_request(gpio + 1, "VDDIMX_EN");
425 gpio_direction_output(gpio + 1, 1);
428 gpio_request(gpio + 2, "VLYNQ_EN");
429 gpio_direction_output(gpio + 2, 1);
431 /* p3 = n3V3_CF_RESET (initial: stay in reset) */
432 gpio_request(gpio + 3, "nCF_RESET");
433 gpio_direction_output(gpio + 3, 0);
437 /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
438 gpio_request(gpio + 5, "WLAN_RESET");
439 gpio_direction_output(gpio + 5, 1);
441 /* p6 = nATA_SEL (initial: select) */
442 gpio_request(gpio + 6, "nATA_SEL");
443 gpio_direction_output(gpio + 6, 0);
445 /* p7 = nCF_SEL (initial: deselect) */
446 gpio_request(gpio + 7, "nCF_SEL");
447 gpio_direction_output(gpio + 7, 1);
453 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
465 static struct pcf857x_platform_data pcf_data_u35 = {
466 .gpio_base = PCF_Uxx_BASE(2),
467 .setup = evm_u35_setup,
468 .teardown = evm_u35_teardown,
471 /*----------------------------------------------------------------------*/
473 /* Most of this EEPROM is unused, but U-Boot uses some data:
474 * - 0x7f00, 6 bytes Ethernet Address
475 * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
476 * - ... newer boards may have more
479 static struct at24_platform_data eeprom_info = {
480 .byte_len = (256*1024) / 8,
482 .flags = AT24_FLAG_ADDR16,
483 .setup = davinci_get_mac_addr,
484 .context = (void *)0x7f00,
488 * MSP430 supports RTC, card detection, input from IR remote, and
489 * a bit more. It triggers interrupts on GPIO(7) from pressing
490 * buttons on the IR remote, and for card detect switches.
492 static struct i2c_client *dm6446evm_msp;
494 static int dm6446evm_msp_probe(struct i2c_client *client,
495 const struct i2c_device_id *id)
497 dm6446evm_msp = client;
501 static int dm6446evm_msp_remove(struct i2c_client *client)
503 dm6446evm_msp = NULL;
507 static const struct i2c_device_id dm6446evm_msp_ids[] = {
508 { "dm6446evm_msp", 0, },
509 { /* end of list */ },
512 static struct i2c_driver dm6446evm_msp_driver = {
513 .driver.name = "dm6446evm_msp",
514 .id_table = dm6446evm_msp_ids,
515 .probe = dm6446evm_msp_probe,
516 .remove = dm6446evm_msp_remove,
519 static int dm6444evm_msp430_get_pins(void)
521 static const char txbuf[2] = { 2, 4, };
523 struct i2c_msg msg[2] = {
527 .buf = (void __force *)txbuf,
540 msg[0].addr = dm6446evm_msp->addr;
541 msg[1].addr = dm6446evm_msp->addr;
543 /* Command 4 == get input state, returns port 2 and port3 data
544 * S Addr W [A] len=2 [A] cmd=4 [A]
545 * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
547 status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
551 dev_dbg(&dm6446evm_msp->dev, "PINS: %4ph\n", buf);
553 return (buf[3] << 8) | buf[2];
556 static int dm6444evm_mmc_get_cd(int module)
558 int status = dm6444evm_msp430_get_pins();
560 return (status < 0) ? status : !(status & BIT(1));
563 static int dm6444evm_mmc_get_ro(int module)
565 int status = dm6444evm_msp430_get_pins();
567 return (status < 0) ? status : status & BIT(6 + 8);
570 static struct davinci_mmc_config dm6446evm_mmc_config = {
571 .get_cd = dm6444evm_mmc_get_cd,
572 .get_ro = dm6444evm_mmc_get_ro,
576 static struct i2c_board_info __initdata i2c_info[] = {
578 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
581 I2C_BOARD_INFO("pcf8574", 0x38),
582 .platform_data = &pcf_data_u2,
585 I2C_BOARD_INFO("pcf8574", 0x39),
586 .platform_data = &pcf_data_u18,
589 I2C_BOARD_INFO("pcf8574", 0x3a),
590 .platform_data = &pcf_data_u35,
593 I2C_BOARD_INFO("24c256", 0x50),
594 .platform_data = &eeprom_info,
597 I2C_BOARD_INFO("tlv320aic33", 0x1b),
601 #define DM644X_I2C_SDA_PIN GPIO_TO_PIN(2, 12)
602 #define DM644X_I2C_SCL_PIN GPIO_TO_PIN(2, 11)
604 static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
605 .dev_id = "i2c_davinci.1",
607 GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SDA_PIN, "sda",
608 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
609 GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SCL_PIN, "scl",
610 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
614 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
615 * which requires 100 usec of idle bus after i2c writes sent to it.
617 static struct davinci_i2c_platform_data i2c_pdata = {
618 .bus_freq = 20 /* kHz */,
619 .bus_delay = 100 /* usec */,
620 .gpio_recovery = true,
623 static void __init evm_init_i2c(void)
625 gpiod_add_lookup_table(&i2c_recovery_gpiod_table);
626 davinci_init_i2c(&i2c_pdata);
627 i2c_add_driver(&dm6446evm_msp_driver);
628 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
632 #define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
634 /* venc standard timings */
635 static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
638 .timings_type = VPBE_ENC_STD,
639 .std_id = V4L2_STD_NTSC,
644 .fps = {30000, 1001},
646 .upper_margin = 0x10,
650 .timings_type = VPBE_ENC_STD,
651 .std_id = V4L2_STD_PAL,
658 .upper_margin = 0x16,
662 /* venc dv preset timings */
663 static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
666 .timings_type = VPBE_ENC_DV_TIMINGS,
667 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
674 .upper_margin = 0x20,
678 .timings_type = VPBE_ENC_DV_TIMINGS,
679 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
686 .upper_margin = 0x30,
691 * The outputs available from VPBE + encoders. Keep the order same
692 * as that of encoders. First those from venc followed by that from
693 * encoders. Index in the output refers to index on a particular encoder.
694 * Driver uses this index to pass it to encoder when it supports more
695 * than one output. Userspace applications use index of the array to
698 static struct vpbe_output dm644xevm_vpbe_outputs[] = {
703 .type = V4L2_OUTPUT_TYPE_ANALOG,
705 .capabilities = V4L2_OUT_CAP_STD,
707 .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
708 .default_mode = "ntsc",
709 .num_modes = ARRAY_SIZE(dm644xevm_enc_std_timing),
710 .modes = dm644xevm_enc_std_timing,
716 .type = V4L2_OUTPUT_TYPE_ANALOG,
717 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
719 .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
720 .default_mode = "480p59_94",
721 .num_modes = ARRAY_SIZE(dm644xevm_enc_preset_timing),
722 .modes = dm644xevm_enc_preset_timing,
726 static struct vpbe_config dm644xevm_display_cfg = {
727 .module_name = "dm644x-vpbe-display",
730 .module_name = DM644X_VPBE_OSD_SUBDEV_NAME,
733 .module_name = DM644X_VPBE_VENC_SUBDEV_NAME,
735 .num_outputs = ARRAY_SIZE(dm644xevm_vpbe_outputs),
736 .outputs = dm644xevm_vpbe_outputs,
739 static struct platform_device *davinci_evm_devices[] __initdata = {
745 davinci_evm_map_io(void)
750 static int davinci_phy_fixup(struct phy_device *phydev)
752 unsigned int control;
753 /* CRITICAL: Fix for increasing PHY signal drive strength for
754 * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
755 * signal strength was low causing TX to fail randomly. The
756 * fix is to Set bit 11 (Increased MII drive strength) of PHY
757 * register 26 (Digital Config register) on this phy. */
758 control = phy_read(phydev, 26);
759 phy_write(phydev, 26, (control | 0x800));
763 #define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
764 IS_ENABLED(CONFIG_PATA_BK3710))
766 #define HAS_NOR IS_ENABLED(CONFIG_MTD_PHYSMAP)
768 #define HAS_NAND IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
770 static __init void davinci_evm_init(void)
773 struct clk *aemif_clk;
774 struct davinci_soc_info *soc_info = &davinci_soc_info;
776 dm644x_init_devices();
778 ret = dm644x_gpio_register();
780 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
782 aemif_clk = clk_get(NULL, "aemif");
783 clk_prepare_enable(aemif_clk);
786 if (HAS_NAND || HAS_NOR)
787 pr_warn("WARNING: both IDE and Flash are enabled, but they share AEMIF pins\n"
788 "\tDisable IDE for NAND/NOR support\n");
790 } else if (HAS_NAND || HAS_NOR) {
791 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
792 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
794 /* only one device will be jumpered and detected */
796 platform_device_register(&davinci_evm_nandflash_device);
798 if (davinci_aemif_setup(&davinci_evm_nandflash_device))
799 pr_warn("%s: Cannot configure AEMIF\n",
803 evm_leds[7].default_trigger = "nand-disk";
806 pr_warn("WARNING: both NAND and NOR flash are enabled; disable one of them.\n");
808 platform_device_register(&davinci_evm_norflash_device);
811 platform_add_devices(davinci_evm_devices,
812 ARRAY_SIZE(davinci_evm_devices));
815 davinci_setup_mmc(0, &dm6446evm_mmc_config);
817 dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
819 davinci_serial_init(dm644x_serial_device);
822 /* irlml6401 switches over 1A, in under 8 msec */
823 davinci_setup_usb(1000, 8);
825 if (IS_BUILTIN(CONFIG_PHYLIB)) {
826 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
827 /* Register the fixup for PHY on DaVinci */
828 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
833 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
834 /* Maintainer: MontaVista Software <source@mvista.com> */
835 .atag_offset = 0x100,
836 .map_io = davinci_evm_map_io,
837 .init_irq = davinci_irq_init,
838 .init_time = dm644x_init_time,
839 .init_machine = davinci_evm_init,
840 .init_late = davinci_init_late,
841 .dma_zone_size = SZ_128M,