2 * TI DA830/OMAP L137 EVM board
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/console.h>
15 #include <linux/interrupt.h>
16 #include <linux/gpio.h>
17 #include <linux/gpio/machine.h>
18 #include <linux/platform_device.h>
19 #include <linux/i2c.h>
20 #include <linux/platform_data/pcf857x.h>
21 #include <linux/platform_data/at24.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/spi/spi.h>
25 #include <linux/spi/flash.h>
26 #include <linux/platform_data/gpio-davinci.h>
27 #include <linux/platform_data/mtd-davinci.h>
28 #include <linux/platform_data/mtd-davinci-aemif.h>
29 #include <linux/platform_data/spi-davinci.h>
30 #include <linux/platform_data/usb-davinci.h>
31 #include <linux/platform_data/ti-aemif.h>
32 #include <linux/regulator/machine.h>
33 #include <linux/nvmem-provider.h>
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
38 #include <mach/common.h>
41 #include <mach/da8xx.h>
43 #define DA830_EVM_PHY_ID ""
45 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
47 #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
48 #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
50 static const short da830_evm_usb11_pins[] = {
51 DA830_GPIO1_15, DA830_GPIO2_4,
55 static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
57 static int da830_evm_usb_set_power(unsigned port, int on)
59 gpio_set_value(ON_BD_USB_DRV, on);
63 static int da830_evm_usb_get_power(unsigned port)
65 return gpio_get_value(ON_BD_USB_DRV);
68 static int da830_evm_usb_get_oci(unsigned port)
70 return !gpio_get_value(ON_BD_USB_OVC);
73 static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
75 static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
77 int irq = gpio_to_irq(ON_BD_USB_OVC);
80 if (handler != NULL) {
81 da830_evm_usb_ocic_handler = handler;
83 error = request_irq(irq, da830_evm_usb_ocic_irq,
84 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
85 "OHCI over-current indicator", NULL);
87 pr_err("%s: could not request IRQ to watch over-current indicator changes\n",
95 static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
96 .set_power = da830_evm_usb_set_power,
97 .get_power = da830_evm_usb_get_power,
98 .get_oci = da830_evm_usb_get_oci,
99 .ocic_notify = da830_evm_usb_ocic_notify,
101 /* TPS2065 switch @ 5V */
102 .potpgt = (3 + 1) / 2, /* 3 ms max */
105 static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
107 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
111 static __init void da830_evm_usb_init(void)
115 ret = da8xx_register_usb_phy_clocks();
117 pr_warn("%s: USB PHY CLK registration failed: %d\n",
120 ret = da8xx_register_usb_phy();
122 pr_warn("%s: USB PHY registration failed: %d\n",
125 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
127 pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret);
130 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
131 * with the power on to power good time of 3 ms.
133 ret = da8xx_register_usb20(1000, 3);
135 pr_warn("%s: USB 2.0 registration failed: %d\n",
139 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
141 pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret);
145 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
147 pr_err("%s: failed to request GPIO for USB 1.1 port power control: %d\n",
151 gpio_direction_output(ON_BD_USB_DRV, 0);
153 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
155 pr_err("%s: failed to request GPIO for USB 1.1 port over-current indicator: %d\n",
159 gpio_direction_input(ON_BD_USB_OVC);
161 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
163 pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
166 static const short da830_evm_mcasp1_pins[] = {
167 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
168 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
169 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
174 static u8 da830_iis_serializer_direction[] = {
175 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
176 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
177 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
180 static struct snd_platform_data da830_evm_snd_data = {
181 .tx_dma_offset = 0x2000,
182 .rx_dma_offset = 0x2000,
183 .op_mode = DAVINCI_MCASP_IIS_MODE,
184 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
186 .serial_dir = da830_iis_serializer_direction,
187 .asp_chan_q = EVENTQ_0,
188 .version = MCASP_VERSION_2,
194 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
196 static const short da830_evm_mmc_sd_pins[] = {
197 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
198 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
199 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
200 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
204 #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
205 #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
207 static struct gpiod_lookup_table mmc_gpios_table = {
208 .dev_id = "da830-mmc.0",
210 /* gpio chip 1 contains gpio range 32-63 */
211 GPIO_LOOKUP("davinci_gpio", DA830_MMCSD_CD_PIN, "cd",
213 GPIO_LOOKUP("davinci_gpio", DA830_MMCSD_WP_PIN, "wp",
218 static struct davinci_mmc_config da830_evm_mmc_config = {
220 .max_freq = 50000000,
221 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
224 static inline void da830_evm_init_mmc(void)
228 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
230 pr_warn("%s: mmc/sd mux setup failed: %d\n", __func__, ret);
234 gpiod_add_lookup_table(&mmc_gpios_table);
236 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
238 pr_warn("%s: mmc/sd registration failed: %d\n", __func__, ret);
239 gpiod_remove_lookup_table(&mmc_gpios_table);
243 #define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
245 #ifdef CONFIG_DA830_UI_NAND
246 static struct mtd_partition da830_evm_nand_partitions[] = {
247 /* bootloader (U-Boot, etc) in first sector */
249 .name = "bootloader",
252 .mask_flags = MTD_WRITEABLE, /* force read-only */
254 /* bootloader params in the next sector */
257 .offset = MTDPART_OFS_APPEND,
259 .mask_flags = MTD_WRITEABLE, /* force read-only */
264 .offset = MTDPART_OFS_APPEND,
270 .name = "filesystem",
271 .offset = MTDPART_OFS_APPEND,
272 .size = MTDPART_SIZ_FULL,
277 /* flash bbt decriptors */
278 static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
279 static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
281 static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
282 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
283 NAND_BBT_WRITE | NAND_BBT_2BIT |
284 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
289 .pattern = da830_evm_nand_bbt_pattern
292 static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
293 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
294 NAND_BBT_WRITE | NAND_BBT_2BIT |
295 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
300 .pattern = da830_evm_nand_mirror_pattern
303 static struct davinci_aemif_timing da830_evm_nandflash_timing = {
313 static struct davinci_nand_pdata da830_evm_nand_pdata = {
315 .parts = da830_evm_nand_partitions,
316 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
317 .ecc_mode = NAND_ECC_HW,
319 .bbt_options = NAND_BBT_USE_FLASH,
320 .bbt_td = &da830_evm_nand_bbt_main_descr,
321 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
322 .timing = &da830_evm_nandflash_timing,
325 static struct resource da830_evm_nand_resources[] = {
326 [0] = { /* First memory resource is NAND I/O window */
327 .start = DA8XX_AEMIF_CS3_BASE,
328 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
329 .flags = IORESOURCE_MEM,
331 [1] = { /* Second memory resource is AEMIF control registers */
332 .start = DA8XX_AEMIF_CTL_BASE,
333 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
334 .flags = IORESOURCE_MEM,
338 static struct platform_device da830_evm_aemif_devices[] = {
340 .name = "davinci_nand",
343 .platform_data = &da830_evm_nand_pdata,
345 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
346 .resource = da830_evm_nand_resources,
350 static struct resource da830_evm_aemif_resource[] = {
352 .start = DA8XX_AEMIF_CTL_BASE,
353 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
354 .flags = IORESOURCE_MEM,
358 static struct aemif_abus_data da830_evm_aemif_abus_data[] = {
364 static struct aemif_platform_data da830_evm_aemif_pdata = {
365 .abus_data = da830_evm_aemif_abus_data,
366 .num_abus_data = ARRAY_SIZE(da830_evm_aemif_abus_data),
367 .sub_devices = da830_evm_aemif_devices,
368 .num_sub_devices = ARRAY_SIZE(da830_evm_aemif_devices),
372 static struct platform_device da830_evm_aemif_device = {
376 .platform_data = &da830_evm_aemif_pdata,
378 .resource = da830_evm_aemif_resource,
379 .num_resources = ARRAY_SIZE(da830_evm_aemif_resource),
383 * UI board NAND/NOR flashes only use 8-bit data bus.
385 static const short da830_evm_emif25_pins[] = {
386 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
387 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
388 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
389 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
390 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
391 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
392 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
396 static inline void da830_evm_init_nand(int mux_mode)
401 pr_warn("WARNING: both MMC/SD and NAND are enabled, but they share AEMIF pins\n"
402 "\tDisable MMC/SD for NAND support\n");
406 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
408 pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret);
410 ret = platform_device_register(&da830_evm_aemif_device);
412 pr_warn("%s: AEMIF device not registered\n", __func__);
414 gpio_direction_output(mux_mode, 1);
417 static inline void da830_evm_init_nand(int mux_mode) { }
420 #ifdef CONFIG_DA830_UI_LCD
421 static inline void da830_evm_init_lcdc(int mux_mode)
425 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
427 pr_warn("%s: lcdcntl mux setup failed: %d\n", __func__, ret);
429 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
431 pr_warn("%s: lcd setup failed: %d\n", __func__, ret);
433 gpio_direction_output(mux_mode, 0);
436 static inline void da830_evm_init_lcdc(int mux_mode) { }
439 static struct nvmem_cell_info da830_evm_nvmem_cells[] = {
447 static struct nvmem_cell_table da830_evm_nvmem_cell_table = {
448 .nvmem_name = "1-00500",
449 .cells = da830_evm_nvmem_cells,
450 .ncells = ARRAY_SIZE(da830_evm_nvmem_cells),
453 static struct nvmem_cell_lookup da830_evm_nvmem_cell_lookup = {
454 .nvmem_name = "1-00500",
455 .cell_name = "macaddr",
456 .dev_id = "davinci_emac.1",
457 .con_id = "mac-address",
460 static struct at24_platform_data da830_evm_i2c_eeprom_info = {
461 .byte_len = SZ_256K / 8,
463 .flags = AT24_FLAG_ADDR16,
464 .setup = davinci_get_mac_addr,
465 .context = (void *)0x7f00,
468 static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
469 int gpio, unsigned ngpio, void *context)
471 gpio_request(gpio + 6, "UI MUX_MODE");
473 /* Drive mux mode low to match the default without UI card */
474 gpio_direction_output(gpio + 6, 0);
476 da830_evm_init_lcdc(gpio + 6);
478 da830_evm_init_nand(gpio + 6);
483 static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
484 unsigned ngpio, void *context)
490 static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
491 .gpio_base = DAVINCI_N_GPIO,
492 .setup = da830_evm_ui_expander_setup,
493 .teardown = da830_evm_ui_expander_teardown,
496 static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
498 I2C_BOARD_INFO("24c256", 0x50),
499 .platform_data = &da830_evm_i2c_eeprom_info,
502 I2C_BOARD_INFO("tlv320aic3x", 0x18),
505 I2C_BOARD_INFO("pcf8574", 0x3f),
506 .platform_data = &da830_evm_ui_expander_info,
510 static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
511 .bus_freq = 100, /* kHz */
512 .bus_delay = 0, /* usec */
516 * The following EDMA channels/slots are not being used by drivers (for
517 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
518 * they are being reserved for codecs on the DSP side.
520 static const s16 da830_dma_rsv_chans[][2] = {
521 /* (offset, number) */
529 static const s16 da830_dma_rsv_slots[][2] = {
530 /* (offset, number) */
538 static struct edma_rsv_info da830_edma_rsv[] = {
540 .rsv_chans = da830_dma_rsv_chans,
541 .rsv_slots = da830_dma_rsv_slots,
545 static struct mtd_partition da830evm_spiflash_part[] = {
550 .mask_flags = MTD_WRITEABLE,
554 .offset = MTDPART_OFS_APPEND,
555 .size = SZ_16K + SZ_8K,
556 .mask_flags = MTD_WRITEABLE,
560 .offset = MTDPART_OFS_APPEND,
561 .size = SZ_256K - SZ_32K,
562 .mask_flags = MTD_WRITEABLE,
565 .name = "U-Boot-Environment",
566 .offset = MTDPART_OFS_APPEND,
572 .offset = MTDPART_OFS_APPEND,
573 .size = MTDPART_SIZ_FULL,
578 static struct flash_platform_data da830evm_spiflash_data = {
580 .parts = da830evm_spiflash_part,
581 .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
585 static struct davinci_spi_config da830evm_spiflash_cfg = {
586 .io_type = SPI_IO_TYPE_DMA,
591 static struct spi_board_info da830evm_spi_info[] = {
593 .modalias = "m25p80",
594 .platform_data = &da830evm_spiflash_data,
595 .controller_data = &da830evm_spiflash_cfg,
597 .max_speed_hz = 30000000,
603 static __init void da830_evm_init(void)
605 struct davinci_soc_info *soc_info = &davinci_soc_info;
608 da830_register_clocks();
610 ret = da830_register_gpio();
612 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
614 ret = da830_register_edma(da830_edma_rsv);
616 pr_warn("%s: edma registration failed: %d\n", __func__, ret);
618 ret = davinci_cfg_reg_list(da830_i2c0_pins);
620 pr_warn("%s: i2c0 mux setup failed: %d\n", __func__, ret);
622 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
624 pr_warn("%s: i2c0 registration failed: %d\n", __func__, ret);
626 da830_evm_usb_init();
628 soc_info->emac_pdata->rmii_en = 1;
629 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
631 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
633 pr_warn("%s: cpgmac mux setup failed: %d\n", __func__, ret);
635 ret = da8xx_register_emac();
637 pr_warn("%s: emac registration failed: %d\n", __func__, ret);
639 ret = da8xx_register_watchdog();
641 pr_warn("%s: watchdog registration failed: %d\n",
644 davinci_serial_init(da8xx_serial_device);
646 nvmem_add_cell_table(&da830_evm_nvmem_cell_table);
647 nvmem_add_cell_lookups(&da830_evm_nvmem_cell_lookup, 1);
649 i2c_register_board_info(1, da830_evm_i2c_devices,
650 ARRAY_SIZE(da830_evm_i2c_devices));
652 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
654 pr_warn("%s: mcasp1 mux setup failed: %d\n", __func__, ret);
656 da8xx_register_mcasp(1, &da830_evm_snd_data);
658 da830_evm_init_mmc();
660 ret = da8xx_register_rtc();
662 pr_warn("%s: rtc setup failed: %d\n", __func__, ret);
664 ret = spi_register_board_info(da830evm_spi_info,
665 ARRAY_SIZE(da830evm_spi_info));
667 pr_warn("%s: spi info registration failed: %d\n",
670 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
672 pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret);
674 regulator_has_full_constraints();
677 #ifdef CONFIG_SERIAL_8250_CONSOLE
678 static int __init da830_evm_console_init(void)
680 if (!machine_is_davinci_da830_evm())
683 return add_preferred_console("ttyS", 2, "115200");
685 console_initcall(da830_evm_console_init);
688 static void __init da830_evm_map_io(void)
693 MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
694 .atag_offset = 0x100,
695 .map_io = da830_evm_map_io,
696 .init_irq = cp_intc_init,
697 .init_time = da830_init_time,
698 .init_machine = da830_evm_init,
699 .init_late = davinci_init_late,
700 .dma_zone_size = SZ_128M,