arch/arm/mach-at91/pm.c

   1 /*
   2  * arch/arm/mach-at91/pm.c
   3  * AT91 Power Management
   4  *
   5  * Copyright (C) 2005 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12
  13 #include <linux/gpio.h>
  14 #include <linux/suspend.h>
  15 #include <linux/sched.h>
  16 #include <linux/proc_fs.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/sysfs.h>
  19 #include <linux/module.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/io.h>
  22
  23 #include <asm/irq.h>
  24 #include <linux/atomic.h>
  25 #include <asm/mach/time.h>
  26 #include <asm/mach/irq.h>
  27
  28 #include <mach/at91_pmc.h>
  29 #include <mach/cpu.h>
  30
  31 #include "generic.h"
  32 #include "pm.h"
  33
  34 /*
  35  * Show the reason for the previous system reset.
  36  */
  37 #if defined(AT91_RSTC)
  38
  39 #include <mach/at91_rstc.h>
  40 #include <mach/at91_shdwc.h>
  41
  42 static void __init show_reset_status(void)
  43 {
  44         static char reset[] __initdata = "reset";
  45
  46         static char general[] __initdata = "general";
  47         static char wakeup[] __initdata = "wakeup";
  48         static char watchdog[] __initdata = "watchdog";
  49         static char software[] __initdata = "software";
  50         static char user[] __initdata = "user";
  51         static char unknown[] __initdata = "unknown";
  52
  53         static char signal[] __initdata = "signal";
  54         static char rtc[] __initdata = "rtc";
  55         static char rtt[] __initdata = "rtt";
  56         static char restore[] __initdata = "power-restored";
  57
  58         char *reason, *r2 = reset;
  59         u32 reset_type, wake_type;
  60
  61         if (!at91_shdwc_base)
  62                 return;
  63
  64         reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
  65         wake_type = at91_shdwc_read(AT91_SHDW_SR);
  66
  67         switch (reset_type) {
  68         case AT91_RSTC_RSTTYP_GENERAL:
  69                 reason = general;
  70                 break;
  71         case AT91_RSTC_RSTTYP_WAKEUP:
  72                 /* board-specific code enabled the wakeup sources */
  73                 reason = wakeup;
  74
  75                 /* "wakeup signal" */
  76                 if (wake_type & AT91_SHDW_WAKEUP0)
  77                         r2 = signal;
  78                 else {
  79                         r2 = reason;
  80                         if (wake_type & AT91_SHDW_RTTWK)        /* rtt wakeup */
  81                                 reason = rtt;
  82                         else if (wake_type & AT91_SHDW_RTCWK)   /* rtc wakeup */
  83                                 reason = rtc;
  84                         else if (wake_type == 0)        /* power-restored wakeup */
  85                                 reason = restore;
  86                         else                            /* unknown wakeup */
  87                                 reason = unknown;
  88                 }
  89                 break;
  90         case AT91_RSTC_RSTTYP_WATCHDOG:
  91                 reason = watchdog;
  92                 break;
  93         case AT91_RSTC_RSTTYP_SOFTWARE:
  94                 reason = software;
  95                 break;
  96         case AT91_RSTC_RSTTYP_USER:
  97                 reason = user;
  98                 break;
  99         default:
 100                 reason = unknown;
 101                 break;
 102         }
 103         pr_info("AT91: Starting after %s %s\n", reason, r2);
 104 }
 105 #else
 106 static void __init show_reset_status(void) {}
 107 #endif
 108
 109
 110 static int at91_pm_valid_state(suspend_state_t state)
 111 {
 112         switch (state) {
 113                 case PM_SUSPEND_ON:
 114                 case PM_SUSPEND_STANDBY:
 115                 case PM_SUSPEND_MEM:
 116                         return 1;
 117
 118                 default:
 119                         return 0;
 120         }
 121 }
 122
 123
 124 static suspend_state_t target_state;
 125
 126 /*
 127  * Called after processes are frozen, but before we shutdown devices.
 128  */
 129 static int at91_pm_begin(suspend_state_t state)
 130 {
 131         target_state = state;
 132         return 0;
 133 }
 134
 135 /*
 136  * Verify that all the clocks are correct before entering
 137  * slow-clock mode.
 138  */
 139 static int at91_pm_verify_clocks(void)
 140 {
 141         unsigned long scsr;
 142         int i;
 143
 144         scsr = at91_sys_read(AT91_PMC_SCSR);
 145
 146         /* USB must not be using PLLB */
 147         if (cpu_is_at91rm9200()) {
 148                 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
 149                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
 150                         return 0;
 151                 }
 152         } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()
 153                         || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) {
 154                 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
 155                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
 156                         return 0;
 157                 }
 158         } else if (cpu_is_at91cap9()) {
 159                 if ((scsr & AT91CAP9_PMC_UHP) != 0) {
 160                         pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
 161                         return 0;
 162                 }
 163         }
 164
 165 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
 166         /* PCK0..PCK3 must be disabled, or configured to use clk32k */
 167         for (i = 0; i < 4; i++) {
 168                 u32 css;
 169
 170                 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
 171                         continue;
 172
 173                 css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
 174                 if (css != AT91_PMC_CSS_SLOW) {
 175                         pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
 176                         return 0;
 177                 }
 178         }
 179 #endif
 180
 181         return 1;
 182 }
 183
 184 /*
 185  * Call this from platform driver suspend() to see how deeply to suspend.
 186  * For example, some controllers (like OHCI) need one of the PLL clocks
 187  * in order to act as a wakeup source, and those are not available when
 188  * going into slow clock mode.
 189  *
 190  * REVISIT: generalize as clk_will_be_available(clk)?  Other platforms have
 191  * the very same problem (but not using at91 main_clk), and it'd be better
 192  * to add one generic API rather than lots of platform-specific ones.
 193  */
 194 int at91_suspend_entering_slow_clock(void)
 195 {
 196         return (target_state == PM_SUSPEND_MEM);
 197 }
 198 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
 199
 200
 201 static void (*slow_clock)(void);
 202
 203 #ifdef CONFIG_AT91_SLOW_CLOCK
 204 extern void at91_slow_clock(void);
 205 extern u32 at91_slow_clock_sz;
 206 #endif
 207
 208
 209 static int at91_pm_enter(suspend_state_t state)
 210 {
 211         u32 saved_lpr;
 212         at91_gpio_suspend();
 213         at91_irq_suspend();
 214
 215         pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
 216                         /* remember all the always-wake irqs */
 217                         (at91_sys_read(AT91_PMC_PCSR)
 218                                         | (1 << AT91_ID_FIQ)
 219                                         | (1 << AT91_ID_SYS)
 220                                         | (at91_extern_irq))
 221                                 & at91_aic_read(AT91_AIC_IMR),
 222                         state);
 223
 224         switch (state) {
 225                 /*
 226                  * Suspend-to-RAM is like STANDBY plus slow clock mode, so
 227                  * drivers must suspend more deeply:  only the master clock
 228                  * controller may be using the main oscillator.
 229                  */
 230                 case PM_SUSPEND_MEM:
 231                         /*
 232                          * Ensure that clocks are in a valid state.
 233                          */
 234                         if (!at91_pm_verify_clocks())
 235                                 goto error;
 236
 237                         /*
 238                          * Enter slow clock mode by switching over to clk32k and
 239                          * turning off the main oscillator; reverse on wakeup.
 240                          */
 241                         if (slow_clock) {
 242 #ifdef CONFIG_AT91_SLOW_CLOCK
 243                                 /* copy slow_clock handler to SRAM, and call it */
 244                                 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
 245 #endif
 246                                 slow_clock();
 247                                 break;
 248                         } else {
 249                                 pr_info("AT91: PM - no slow clock mode enabled ...\n");
 250                                 /* FALLTHROUGH leaving master clock alone */
 251                         }
 252
 253                 /*
 254                  * STANDBY mode has *all* drivers suspended; ignores irqs not
 255                  * marked as 'wakeup' event sources; and reduces DRAM power.
 256                  * But otherwise it's identical to PM_SUSPEND_ON:  cpu idle, and
 257                  * nothing fancy done with main or cpu clocks.
 258                  */
 259                 case PM_SUSPEND_STANDBY:
 260                         /*
 261                          * NOTE: the Wait-for-Interrupt instruction needs to be
 262                          * in icache so no SDRAM accesses are needed until the
 263                          * wakeup IRQ occurs and self-refresh is terminated.
 264                          * For ARM 926 based chips, this requirement is weaker
 265                          * as at91sam9 can access a RAM in self-refresh mode.
 266                          */
 267                         asm volatile (  "mov r0, #0\n\t"
 268                                         "b 1f\n\t"
 269                                         ".align 5\n\t"
 270                                         "1: mcr p15, 0, r0, c7, c10, 4\n\t"
 271                                         : /* no output */
 272                                         : /* no input */
 273                                         : "r0");
 274                         saved_lpr = sdram_selfrefresh_enable();
 275                         wait_for_interrupt_enable();
 276                         sdram_selfrefresh_disable(saved_lpr);
 277                         break;
 278
 279                 case PM_SUSPEND_ON:
 280                         cpu_do_idle();
 281                         break;
 282
 283                 default:
 284                         pr_debug("AT91: PM - bogus suspend state %d\n", state);
 285                         goto error;
 286         }
 287
 288         pr_debug("AT91: PM - wakeup %08x\n",
 289                         at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
 290
 291 error:
 292         target_state = PM_SUSPEND_ON;
 293         at91_irq_resume();
 294         at91_gpio_resume();
 295         return 0;
 296 }
 297
 298 /*
 299  * Called right prior to thawing processes.
 300  */
 301 static void at91_pm_end(void)
 302 {
 303         target_state = PM_SUSPEND_ON;
 304 }
 305
 306
 307 static const struct platform_suspend_ops at91_pm_ops = {
 308         .valid  = at91_pm_valid_state,
 309         .begin  = at91_pm_begin,
 310         .enter  = at91_pm_enter,
 311         .end    = at91_pm_end,
 312 };
 313
 314 static int __init at91_pm_init(void)
 315 {
 316 #ifdef CONFIG_AT91_SLOW_CLOCK
 317         slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
 318 #endif
 319
 320         pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
 321
 322 #ifdef CONFIG_ARCH_AT91RM9200
 323         /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
 324         at91_sys_write(AT91_SDRAMC_LPR, 0);
 325 #endif
 326
 327         suspend_set_ops(&at91_pm_ops);
 328
 329         show_reset_status();
 330         return 0;
 331 }
 332 arch_initcall(at91_pm_init);