arch/arm/mach-at91/at91sam9rl_devices.c

   1 /*
   2  *  Copyright (C) 2007 Atmel Corporation
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file COPYING in the main directory of this archive for
   6  * more details.
   7  */
   8
   9 #include <asm/mach/arch.h>
  10 #include <asm/mach/map.h>
  11
  12 #include <linux/dma-mapping.h>
  13 #include <linux/gpio.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/i2c-gpio.h>
  16
  17 #include <linux/fb.h>
  18 #include <video/atmel_lcdc.h>
  19
  20 #include <mach/at91sam9rl.h>
  21 #include <mach/at91sam9rl_matrix.h>
  22 #include <mach/at91_matrix.h>
  23 #include <mach/at91sam9_smc.h>
  24 #include <mach/hardware.h>
  25 #include <linux/platform_data/dma-atmel.h>
  26 #include <linux/platform_data/at91_adc.h>
  27
  28 #include "board.h"
  29 #include "generic.h"
  30 #include "gpio.h"
  31
  32
  33 /* --------------------------------------------------------------------
  34  *  HDMAC - AHB DMA Controller
  35  * -------------------------------------------------------------------- */
  36
  37 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
  38 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
  39
  40 static struct resource hdmac_resources[] = {
  41         [0] = {
  42                 .start  = AT91SAM9RL_BASE_DMA,
  43                 .end    = AT91SAM9RL_BASE_DMA + SZ_512 - 1,
  44                 .flags  = IORESOURCE_MEM,
  45         },
  46         [2] = {
  47                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
  48                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA,
  49                 .flags  = IORESOURCE_IRQ,
  50         },
  51 };
  52
  53 static struct platform_device at_hdmac_device = {
  54         .name           = "at91sam9rl_dma",
  55         .id             = -1,
  56         .dev            = {
  57                                 .dma_mask               = &hdmac_dmamask,
  58                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  59         },
  60         .resource       = hdmac_resources,
  61         .num_resources  = ARRAY_SIZE(hdmac_resources),
  62 };
  63
  64 void __init at91_add_device_hdmac(void)
  65 {
  66         platform_device_register(&at_hdmac_device);
  67 }
  68 #else
  69 void __init at91_add_device_hdmac(void) {}
  70 #endif
  71
  72 /* --------------------------------------------------------------------
  73  *  USB HS Device (Gadget)
  74  * -------------------------------------------------------------------- */
  75
  76 #if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
  77
  78 static struct resource usba_udc_resources[] = {
  79         [0] = {
  80                 .start  = AT91SAM9RL_UDPHS_FIFO,
  81                 .end    = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,
  82                 .flags  = IORESOURCE_MEM,
  83         },
  84         [1] = {
  85                 .start  = AT91SAM9RL_BASE_UDPHS,
  86                 .end    = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,
  87                 .flags  = IORESOURCE_MEM,
  88         },
  89         [2] = {
  90                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
  91                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS,
  92                 .flags  = IORESOURCE_IRQ,
  93         },
  94 };
  95
  96 #define EP(nam, idx, maxpkt, maxbk, dma, isoc)                  \
  97         [idx] = {                                               \
  98                 .name           = nam,                          \
  99                 .index          = idx,                          \
 100                 .fifo_size      = maxpkt,                       \
 101                 .nr_banks       = maxbk,                        \
 102                 .can_dma        = dma,                          \
 103                 .can_isoc       = isoc,                         \
 104         }
 105
 106 static struct usba_ep_data usba_udc_ep[] __initdata = {
 107         EP("ep0", 0, 64, 1, 0, 0),
 108         EP("ep1", 1, 1024, 2, 1, 1),
 109         EP("ep2", 2, 1024, 2, 1, 1),
 110         EP("ep3", 3, 1024, 3, 1, 0),
 111         EP("ep4", 4, 1024, 3, 1, 0),
 112         EP("ep5", 5, 1024, 3, 1, 1),
 113         EP("ep6", 6, 1024, 3, 1, 1),
 114 };
 115
 116 #undef EP
 117
 118 /*
 119  * pdata doesn't have room for any endpoints, so we need to
 120  * append room for the ones we need right after it.
 121  */
 122 static struct {
 123         struct usba_platform_data pdata;
 124         struct usba_ep_data ep[7];
 125 } usba_udc_data;
 126
 127 static struct platform_device at91_usba_udc_device = {
 128         .name           = "atmel_usba_udc",
 129         .id             = -1,
 130         .dev            = {
 131                                 .platform_data  = &usba_udc_data.pdata,
 132         },
 133         .resource       = usba_udc_resources,
 134         .num_resources  = ARRAY_SIZE(usba_udc_resources),
 135 };
 136
 137 void __init at91_add_device_usba(struct usba_platform_data *data)
 138 {
 139         /*
 140          * Invalid pins are 0 on AT91, but the usba driver is shared
 141          * with AVR32, which use negative values instead. Once/if
 142          * gpio_is_valid() is ported to AT91, revisit this code.
 143          */
 144         usba_udc_data.pdata.vbus_pin = -EINVAL;
 145         usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
 146         memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
 147
 148         if (data && gpio_is_valid(data->vbus_pin)) {
 149                 at91_set_gpio_input(data->vbus_pin, 0);
 150                 at91_set_deglitch(data->vbus_pin, 1);
 151                 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
 152         }
 153
 154         /* Pullup pin is handled internally by USB device peripheral */
 155
 156         platform_device_register(&at91_usba_udc_device);
 157 }
 158 #else
 159 void __init at91_add_device_usba(struct usba_platform_data *data) {}
 160 #endif
 161
 162
 163 /* --------------------------------------------------------------------
 164  *  MMC / SD
 165  * -------------------------------------------------------------------- */
 166
 167 #if IS_ENABLED(CONFIG_MMC_ATMELMCI)
 168 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 169 static struct mci_platform_data mmc_data;
 170
 171 static struct resource mmc_resources[] = {
 172         [0] = {
 173                 .start  = AT91SAM9RL_BASE_MCI,
 174                 .end    = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
 175                 .flags  = IORESOURCE_MEM,
 176         },
 177         [1] = {
 178                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
 179                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI,
 180                 .flags  = IORESOURCE_IRQ,
 181         },
 182 };
 183
 184 static struct platform_device at91sam9rl_mmc_device = {
 185         .name           = "atmel_mci",
 186         .id             = -1,
 187         .dev            = {
 188                                 .dma_mask               = &mmc_dmamask,
 189                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 190                                 .platform_data          = &mmc_data,
 191         },
 192         .resource       = mmc_resources,
 193         .num_resources  = ARRAY_SIZE(mmc_resources),
 194 };
 195
 196 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 197 {
 198         if (!data)
 199                 return;
 200
 201         if (data->slot[0].bus_width) {
 202                 /* input/irq */
 203                 if (gpio_is_valid(data->slot[0].detect_pin)) {
 204                         at91_set_gpio_input(data->slot[0].detect_pin, 1);
 205                         at91_set_deglitch(data->slot[0].detect_pin, 1);
 206                 }
 207                 if (gpio_is_valid(data->slot[0].wp_pin))
 208                         at91_set_gpio_input(data->slot[0].wp_pin, 1);
 209
 210                 /* CLK */
 211                 at91_set_A_periph(AT91_PIN_PA2, 0);
 212
 213                 /* CMD */
 214                 at91_set_A_periph(AT91_PIN_PA1, 1);
 215
 216                 /* DAT0, maybe DAT1..DAT3 */
 217                 at91_set_A_periph(AT91_PIN_PA0, 1);
 218                 if (data->slot[0].bus_width == 4) {
 219                         at91_set_A_periph(AT91_PIN_PA3, 1);
 220                         at91_set_A_periph(AT91_PIN_PA4, 1);
 221                         at91_set_A_periph(AT91_PIN_PA5, 1);
 222                 }
 223
 224                 mmc_data = *data;
 225                 platform_device_register(&at91sam9rl_mmc_device);
 226         }
 227 }
 228 #else
 229 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
 230 #endif
 231
 232
 233 /* --------------------------------------------------------------------
 234  *  NAND / SmartMedia
 235  * -------------------------------------------------------------------- */
 236
 237 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 238 static struct atmel_nand_data nand_data;
 239
 240 #define NAND_BASE       AT91_CHIPSELECT_3
 241
 242 static struct resource nand_resources[] = {
 243         [0] = {
 244                 .start  = NAND_BASE,
 245                 .end    = NAND_BASE + SZ_256M - 1,
 246                 .flags  = IORESOURCE_MEM,
 247         },
 248         [1] = {
 249                 .start  = AT91SAM9RL_BASE_ECC,
 250                 .end    = AT91SAM9RL_BASE_ECC + SZ_512 - 1,
 251                 .flags  = IORESOURCE_MEM,
 252         }
 253 };
 254
 255 static struct platform_device atmel_nand_device = {
 256         .name           = "atmel_nand",
 257         .id             = -1,
 258         .dev            = {
 259                                 .platform_data  = &nand_data,
 260         },
 261         .resource       = nand_resources,
 262         .num_resources  = ARRAY_SIZE(nand_resources),
 263 };
 264
 265 void __init at91_add_device_nand(struct atmel_nand_data *data)
 266 {
 267         unsigned long csa;
 268
 269         if (!data)
 270                 return;
 271
 272         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
 273         at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 274
 275         /* enable pin */
 276         if (gpio_is_valid(data->enable_pin))
 277                 at91_set_gpio_output(data->enable_pin, 1);
 278
 279         /* ready/busy pin */
 280         if (gpio_is_valid(data->rdy_pin))
 281                 at91_set_gpio_input(data->rdy_pin, 1);
 282
 283         /* card detect pin */
 284         if (gpio_is_valid(data->det_pin))
 285                 at91_set_gpio_input(data->det_pin, 1);
 286
 287         at91_set_A_periph(AT91_PIN_PB4, 0);             /* NANDOE */
 288         at91_set_A_periph(AT91_PIN_PB5, 0);             /* NANDWE */
 289
 290         nand_data = *data;
 291         platform_device_register(&atmel_nand_device);
 292 }
 293
 294 #else
 295 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 296 #endif
 297
 298
 299 /* --------------------------------------------------------------------
 300  *  TWI (i2c)
 301  * -------------------------------------------------------------------- */
 302
 303 /*
 304  * Prefer the GPIO code since the TWI controller isn't robust
 305  * (gets overruns and underruns under load) and can only issue
 306  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 307  */
 308 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 309
 310 static struct i2c_gpio_platform_data pdata = {
 311         .sda_pin                = AT91_PIN_PA23,
 312         .sda_is_open_drain      = 1,
 313         .scl_pin                = AT91_PIN_PA24,
 314         .scl_is_open_drain      = 1,
 315         .udelay                 = 2,            /* ~100 kHz */
 316 };
 317
 318 static struct platform_device at91sam9rl_twi_device = {
 319         .name                   = "i2c-gpio",
 320         .id                     = 0,
 321         .dev.platform_data      = &pdata,
 322 };
 323
 324 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 325 {
 326         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
 327         at91_set_multi_drive(AT91_PIN_PA23, 1);
 328
 329         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
 330         at91_set_multi_drive(AT91_PIN_PA24, 1);
 331
 332         i2c_register_board_info(0, devices, nr_devices);
 333         platform_device_register(&at91sam9rl_twi_device);
 334 }
 335
 336 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 337
 338 static struct resource twi_resources[] = {
 339         [0] = {
 340                 .start  = AT91SAM9RL_BASE_TWI0,
 341                 .end    = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
 342                 .flags  = IORESOURCE_MEM,
 343         },
 344         [1] = {
 345                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
 346                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0,
 347                 .flags  = IORESOURCE_IRQ,
 348         },
 349 };
 350
 351 static struct platform_device at91sam9rl_twi_device = {
 352         .name           = "i2c-at91sam9g20",
 353         .id             = 0,
 354         .resource       = twi_resources,
 355         .num_resources  = ARRAY_SIZE(twi_resources),
 356 };
 357
 358 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 359 {
 360         /* pins used for TWI interface */
 361         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
 362         at91_set_multi_drive(AT91_PIN_PA23, 1);
 363
 364         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
 365         at91_set_multi_drive(AT91_PIN_PA24, 1);
 366
 367         i2c_register_board_info(0, devices, nr_devices);
 368         platform_device_register(&at91sam9rl_twi_device);
 369 }
 370 #else
 371 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 372 #endif
 373
 374
 375 /* --------------------------------------------------------------------
 376  *  SPI
 377  * -------------------------------------------------------------------- */
 378
 379 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 380 static u64 spi_dmamask = DMA_BIT_MASK(32);
 381
 382 static struct resource spi_resources[] = {
 383         [0] = {
 384                 .start  = AT91SAM9RL_BASE_SPI,
 385                 .end    = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
 386                 .flags  = IORESOURCE_MEM,
 387         },
 388         [1] = {
 389                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
 390                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI,
 391                 .flags  = IORESOURCE_IRQ,
 392         },
 393 };
 394
 395 static struct platform_device at91sam9rl_spi_device = {
 396         .name           = "atmel_spi",
 397         .id             = 0,
 398         .dev            = {
 399                                 .dma_mask               = &spi_dmamask,
 400                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 401         },
 402         .resource       = spi_resources,
 403         .num_resources  = ARRAY_SIZE(spi_resources),
 404 };
 405
 406 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
 407
 408
 409 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 410 {
 411         int i;
 412         unsigned long cs_pin;
 413
 414         at91_set_A_periph(AT91_PIN_PA25, 0);    /* MISO */
 415         at91_set_A_periph(AT91_PIN_PA26, 0);    /* MOSI */
 416         at91_set_A_periph(AT91_PIN_PA27, 0);    /* SPCK */
 417
 418         /* Enable SPI chip-selects */
 419         for (i = 0; i < nr_devices; i++) {
 420                 if (devices[i].controller_data)
 421                         cs_pin = (unsigned long) devices[i].controller_data;
 422                 else
 423                         cs_pin = spi_standard_cs[devices[i].chip_select];
 424
 425                 if (!gpio_is_valid(cs_pin))
 426                         continue;
 427
 428                 /* enable chip-select pin */
 429                 at91_set_gpio_output(cs_pin, 1);
 430
 431                 /* pass chip-select pin to driver */
 432                 devices[i].controller_data = (void *) cs_pin;
 433         }
 434
 435         spi_register_board_info(devices, nr_devices);
 436         platform_device_register(&at91sam9rl_spi_device);
 437 }
 438 #else
 439 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 440 #endif
 441
 442
 443 /* --------------------------------------------------------------------
 444  *  AC97
 445  * -------------------------------------------------------------------- */
 446
 447 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
 448 static u64 ac97_dmamask = DMA_BIT_MASK(32);
 449 static struct ac97c_platform_data ac97_data;
 450
 451 static struct resource ac97_resources[] = {
 452         [0] = {
 453                 .start  = AT91SAM9RL_BASE_AC97C,
 454                 .end    = AT91SAM9RL_BASE_AC97C + SZ_16K - 1,
 455                 .flags  = IORESOURCE_MEM,
 456         },
 457         [1] = {
 458                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C,
 459                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C,
 460                 .flags  = IORESOURCE_IRQ,
 461         },
 462 };
 463
 464 static struct platform_device at91sam9rl_ac97_device = {
 465         .name           = "atmel_ac97c",
 466         .id             = 0,
 467         .dev            = {
 468                                 .dma_mask               = &ac97_dmamask,
 469                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 470                                 .platform_data          = &ac97_data,
 471         },
 472         .resource       = ac97_resources,
 473         .num_resources  = ARRAY_SIZE(ac97_resources),
 474 };
 475
 476 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
 477 {
 478         if (!data)
 479                 return;
 480
 481         at91_set_A_periph(AT91_PIN_PD1, 0);     /* AC97FS */
 482         at91_set_A_periph(AT91_PIN_PD2, 0);     /* AC97CK */
 483         at91_set_A_periph(AT91_PIN_PD3, 0);     /* AC97TX */
 484         at91_set_A_periph(AT91_PIN_PD4, 0);     /* AC97RX */
 485
 486         /* reset */
 487         if (gpio_is_valid(data->reset_pin))
 488                 at91_set_gpio_output(data->reset_pin, 0);
 489
 490         ac97_data = *data;
 491         platform_device_register(&at91sam9rl_ac97_device);
 492 }
 493 #else
 494 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
 495 #endif
 496
 497
 498 /* --------------------------------------------------------------------
 499  *  LCD Controller
 500  * -------------------------------------------------------------------- */
 501
 502 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 503 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 504 static struct atmel_lcdfb_pdata lcdc_data;
 505
 506 static struct resource lcdc_resources[] = {
 507         [0] = {
 508                 .start  = AT91SAM9RL_LCDC_BASE,
 509                 .end    = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
 510                 .flags  = IORESOURCE_MEM,
 511         },
 512         [1] = {
 513                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC,
 514                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC,
 515                 .flags  = IORESOURCE_IRQ,
 516         },
 517 };
 518
 519 static struct platform_device at91_lcdc_device = {
 520         .name           = "at91sam9rl-lcdfb",
 521         .id             = 0,
 522         .dev            = {
 523                                 .dma_mask               = &lcdc_dmamask,
 524                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 525                                 .platform_data          = &lcdc_data,
 526         },
 527         .resource       = lcdc_resources,
 528         .num_resources  = ARRAY_SIZE(lcdc_resources),
 529 };
 530
 531 void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data)
 532 {
 533         if (!data) {
 534                 return;
 535         }
 536
 537         at91_set_B_periph(AT91_PIN_PC1, 0);     /* LCDPWR */
 538         at91_set_A_periph(AT91_PIN_PC5, 0);     /* LCDHSYNC */
 539         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDDOTCK */
 540         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDDEN */
 541         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDCC */
 542         at91_set_B_periph(AT91_PIN_PC9, 0);     /* LCDD3 */
 543         at91_set_B_periph(AT91_PIN_PC10, 0);    /* LCDD4 */
 544         at91_set_B_periph(AT91_PIN_PC11, 0);    /* LCDD5 */
 545         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD6 */
 546         at91_set_B_periph(AT91_PIN_PC13, 0);    /* LCDD7 */
 547         at91_set_B_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 548         at91_set_B_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 549         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
 550         at91_set_B_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 551         at91_set_B_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 552         at91_set_B_periph(AT91_PIN_PC20, 0);    /* LCDD18 */
 553         at91_set_B_periph(AT91_PIN_PC21, 0);    /* LCDD19 */
 554         at91_set_B_periph(AT91_PIN_PC22, 0);    /* LCDD20 */
 555         at91_set_B_periph(AT91_PIN_PC23, 0);    /* LCDD21 */
 556         at91_set_B_periph(AT91_PIN_PC24, 0);    /* LCDD22 */
 557         at91_set_B_periph(AT91_PIN_PC25, 0);    /* LCDD23 */
 558
 559         lcdc_data = *data;
 560         platform_device_register(&at91_lcdc_device);
 561 }
 562 #else
 563 void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data) {}
 564 #endif
 565
 566
 567 /* --------------------------------------------------------------------
 568  *  Timer/Counter block
 569  * -------------------------------------------------------------------- */
 570
 571 #ifdef CONFIG_ATMEL_TCLIB
 572
 573 static struct resource tcb_resources[] = {
 574         [0] = {
 575                 .start  = AT91SAM9RL_BASE_TCB0,
 576                 .end    = AT91SAM9RL_BASE_TCB0 + SZ_16K - 1,
 577                 .flags  = IORESOURCE_MEM,
 578         },
 579         [1] = {
 580                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0,
 581                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0,
 582                 .flags  = IORESOURCE_IRQ,
 583         },
 584         [2] = {
 585                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1,
 586                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1,
 587                 .flags  = IORESOURCE_IRQ,
 588         },
 589         [3] = {
 590                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2,
 591                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2,
 592                 .flags  = IORESOURCE_IRQ,
 593         },
 594 };
 595
 596 static struct platform_device at91sam9rl_tcb_device = {
 597         .name           = "atmel_tcb",
 598         .id             = 0,
 599         .resource       = tcb_resources,
 600         .num_resources  = ARRAY_SIZE(tcb_resources),
 601 };
 602
 603 static void __init at91_add_device_tc(void)
 604 {
 605         platform_device_register(&at91sam9rl_tcb_device);
 606 }
 607 #else
 608 static void __init at91_add_device_tc(void) { }
 609 #endif
 610
 611
 612 /* --------------------------------------------------------------------
 613  *  ADC and Touchscreen
 614  * -------------------------------------------------------------------- */
 615
 616 #if IS_ENABLED(CONFIG_AT91_ADC)
 617 static struct at91_adc_data adc_data;
 618
 619 static struct resource adc_resources[] = {
 620         [0] = {
 621                 .start  = AT91SAM9RL_BASE_TSC,
 622                 .end    = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
 623                 .flags  = IORESOURCE_MEM,
 624         },
 625         [1] = {
 626                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC,
 627                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC,
 628                 .flags  = IORESOURCE_IRQ,
 629         }
 630 };
 631
 632 static struct platform_device at91_adc_device = {
 633         .name           = "at91sam9rl-adc",
 634         .id             = -1,
 635         .dev            = {
 636                 .platform_data  = &adc_data,
 637         },
 638         .resource       = adc_resources,
 639         .num_resources  = ARRAY_SIZE(adc_resources),
 640 };
 641
 642 static struct at91_adc_trigger at91_adc_triggers[] = {
 643         [0] = {
 644                 .name = "external-rising",
 645                 .value = 1,
 646                 .is_external = true,
 647         },
 648         [1] = {
 649                 .name = "external-falling",
 650                 .value = 2,
 651                 .is_external = true,
 652         },
 653         [2] = {
 654                 .name = "external-any",
 655                 .value = 3,
 656                 .is_external = true,
 657         },
 658         [3] = {
 659                 .name = "continuous",
 660                 .value = 6,
 661                 .is_external = false,
 662         },
 663 };
 664
 665 void __init at91_add_device_adc(struct at91_adc_data *data)
 666 {
 667         if (!data)
 668                 return;
 669
 670         if (test_bit(0, &data->channels_used))
 671                 at91_set_A_periph(AT91_PIN_PA17, 0);
 672         if (test_bit(1, &data->channels_used))
 673                 at91_set_A_periph(AT91_PIN_PA18, 0);
 674         if (test_bit(2, &data->channels_used))
 675                 at91_set_A_periph(AT91_PIN_PA19, 0);
 676         if (test_bit(3, &data->channels_used))
 677                 at91_set_A_periph(AT91_PIN_PA20, 0);
 678         if (test_bit(4, &data->channels_used))
 679                 at91_set_A_periph(AT91_PIN_PD6, 0);
 680         if (test_bit(5, &data->channels_used))
 681                 at91_set_A_periph(AT91_PIN_PD7, 0);
 682
 683         if (data->use_external_triggers)
 684                 at91_set_A_periph(AT91_PIN_PB15, 0);
 685
 686         data->startup_time = 40;
 687         data->trigger_number = 4;
 688         data->trigger_list = at91_adc_triggers;
 689
 690         adc_data = *data;
 691         platform_device_register(&at91_adc_device);
 692 }
 693 #else
 694 void __init at91_add_device_adc(struct at91_adc_data *data) {}
 695 #endif
 696
 697 /* --------------------------------------------------------------------
 698  *  RTC
 699  * -------------------------------------------------------------------- */
 700
 701 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
 702 static struct platform_device at91sam9rl_rtc_device = {
 703         .name           = "at91_rtc",
 704         .id             = -1,
 705         .num_resources  = 0,
 706 };
 707
 708 static void __init at91_add_device_rtc(void)
 709 {
 710         platform_device_register(&at91sam9rl_rtc_device);
 711 }
 712 #else
 713 static void __init at91_add_device_rtc(void) {}
 714 #endif
 715
 716
 717 /* --------------------------------------------------------------------
 718  *  RTT
 719  * -------------------------------------------------------------------- */
 720
 721 static struct resource rtt_resources[] = {
 722         {
 723                 .start  = AT91SAM9RL_BASE_RTT,
 724                 .end    = AT91SAM9RL_BASE_RTT + SZ_16 - 1,
 725                 .flags  = IORESOURCE_MEM,
 726         }, {
 727                 .flags  = IORESOURCE_MEM,
 728         }, {
 729                 .flags  = IORESOURCE_IRQ,
 730         }
 731 };
 732
 733 static struct platform_device at91sam9rl_rtt_device = {
 734         .name           = "at91_rtt",
 735         .id             = 0,
 736         .resource       = rtt_resources,
 737 };
 738
 739 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
 740 static void __init at91_add_device_rtt_rtc(void)
 741 {
 742         at91sam9rl_rtt_device.name = "rtc-at91sam9";
 743         /*
 744          * The second resource is needed:
 745          * GPBR will serve as the storage for RTC time offset
 746          */
 747         at91sam9rl_rtt_device.num_resources = 3;
 748         rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
 749                                  4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
 750         rtt_resources[1].end = rtt_resources[1].start + 3;
 751         rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
 752         rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 753 }
 754 #else
 755 static void __init at91_add_device_rtt_rtc(void)
 756 {
 757         /* Only one resource is needed: RTT not used as RTC */
 758         at91sam9rl_rtt_device.num_resources = 1;
 759 }
 760 #endif
 761
 762 static void __init at91_add_device_rtt(void)
 763 {
 764         at91_add_device_rtt_rtc();
 765         platform_device_register(&at91sam9rl_rtt_device);
 766 }
 767
 768
 769 /* --------------------------------------------------------------------
 770  *  Watchdog
 771  * -------------------------------------------------------------------- */
 772
 773 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
 774 static struct resource wdt_resources[] = {
 775         {
 776                 .start  = AT91SAM9RL_BASE_WDT,
 777                 .end    = AT91SAM9RL_BASE_WDT + SZ_16 - 1,
 778                 .flags  = IORESOURCE_MEM,
 779         }
 780 };
 781
 782 static struct platform_device at91sam9rl_wdt_device = {
 783         .name           = "at91_wdt",
 784         .id             = -1,
 785         .resource       = wdt_resources,
 786         .num_resources  = ARRAY_SIZE(wdt_resources),
 787 };
 788
 789 static void __init at91_add_device_watchdog(void)
 790 {
 791         platform_device_register(&at91sam9rl_wdt_device);
 792 }
 793 #else
 794 static void __init at91_add_device_watchdog(void) {}
 795 #endif
 796
 797
 798 /* --------------------------------------------------------------------
 799  *  PWM
 800  * --------------------------------------------------------------------*/
 801
 802 #if IS_ENABLED(CONFIG_PWM_ATMEL)
 803 static struct resource pwm_resources[] = {
 804         [0] = {
 805                 .start  = AT91SAM9RL_BASE_PWMC,
 806                 .end    = AT91SAM9RL_BASE_PWMC + SZ_16K - 1,
 807                 .flags  = IORESOURCE_MEM,
 808         },
 809         [1] = {
 810                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC,
 811                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC,
 812                 .flags  = IORESOURCE_IRQ,
 813         },
 814 };
 815
 816 static struct platform_device at91sam9rl_pwm0_device = {
 817         .name   = "at91sam9rl-pwm",
 818         .id     = -1,
 819         .resource       = pwm_resources,
 820         .num_resources  = ARRAY_SIZE(pwm_resources),
 821 };
 822
 823 void __init at91_add_device_pwm(u32 mask)
 824 {
 825         if (mask & (1 << AT91_PWM0))
 826                 at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM0 */
 827
 828         if (mask & (1 << AT91_PWM1))
 829                 at91_set_B_periph(AT91_PIN_PB9, 1);     /* enable PWM1 */
 830
 831         if (mask & (1 << AT91_PWM2))
 832                 at91_set_B_periph(AT91_PIN_PD5, 1);     /* enable PWM2 */
 833
 834         if (mask & (1 << AT91_PWM3))
 835                 at91_set_B_periph(AT91_PIN_PD8, 1);     /* enable PWM3 */
 836
 837         platform_device_register(&at91sam9rl_pwm0_device);
 838 }
 839 #else
 840 void __init at91_add_device_pwm(u32 mask) {}
 841 #endif
 842
 843
 844 /* --------------------------------------------------------------------
 845  *  SSC -- Synchronous Serial Controller
 846  * -------------------------------------------------------------------- */
 847
 848 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 849 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 850
 851 static struct resource ssc0_resources[] = {
 852         [0] = {
 853                 .start  = AT91SAM9RL_BASE_SSC0,
 854                 .end    = AT91SAM9RL_BASE_SSC0 + SZ_16K - 1,
 855                 .flags  = IORESOURCE_MEM,
 856         },
 857         [1] = {
 858                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0,
 859                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0,
 860                 .flags  = IORESOURCE_IRQ,
 861         },
 862 };
 863
 864 static struct platform_device at91sam9rl_ssc0_device = {
 865         .name   = "at91rm9200_ssc",
 866         .id     = 0,
 867         .dev    = {
 868                 .dma_mask               = &ssc0_dmamask,
 869                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 870         },
 871         .resource       = ssc0_resources,
 872         .num_resources  = ARRAY_SIZE(ssc0_resources),
 873 };
 874
 875 static inline void configure_ssc0_pins(unsigned pins)
 876 {
 877         if (pins & ATMEL_SSC_TF)
 878                 at91_set_A_periph(AT91_PIN_PC0, 1);
 879         if (pins & ATMEL_SSC_TK)
 880                 at91_set_A_periph(AT91_PIN_PC1, 1);
 881         if (pins & ATMEL_SSC_TD)
 882                 at91_set_A_periph(AT91_PIN_PA15, 1);
 883         if (pins & ATMEL_SSC_RD)
 884                 at91_set_A_periph(AT91_PIN_PA16, 1);
 885         if (pins & ATMEL_SSC_RK)
 886                 at91_set_B_periph(AT91_PIN_PA10, 1);
 887         if (pins & ATMEL_SSC_RF)
 888                 at91_set_B_periph(AT91_PIN_PA22, 1);
 889 }
 890
 891 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 892
 893 static struct resource ssc1_resources[] = {
 894         [0] = {
 895                 .start  = AT91SAM9RL_BASE_SSC1,
 896                 .end    = AT91SAM9RL_BASE_SSC1 + SZ_16K - 1,
 897                 .flags  = IORESOURCE_MEM,
 898         },
 899         [1] = {
 900                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1,
 901                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1,
 902                 .flags  = IORESOURCE_IRQ,
 903         },
 904 };
 905
 906 static struct platform_device at91sam9rl_ssc1_device = {
 907         .name   = "at91rm9200_ssc",
 908         .id     = 1,
 909         .dev    = {
 910                 .dma_mask               = &ssc1_dmamask,
 911                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 912         },
 913         .resource       = ssc1_resources,
 914         .num_resources  = ARRAY_SIZE(ssc1_resources),
 915 };
 916
 917 static inline void configure_ssc1_pins(unsigned pins)
 918 {
 919         if (pins & ATMEL_SSC_TF)
 920                 at91_set_B_periph(AT91_PIN_PA29, 1);
 921         if (pins & ATMEL_SSC_TK)
 922                 at91_set_B_periph(AT91_PIN_PA30, 1);
 923         if (pins & ATMEL_SSC_TD)
 924                 at91_set_B_periph(AT91_PIN_PA13, 1);
 925         if (pins & ATMEL_SSC_RD)
 926                 at91_set_B_periph(AT91_PIN_PA14, 1);
 927         if (pins & ATMEL_SSC_RK)
 928                 at91_set_B_periph(AT91_PIN_PA9, 1);
 929         if (pins & ATMEL_SSC_RF)
 930                 at91_set_B_periph(AT91_PIN_PA8, 1);
 931 }
 932
 933 /*
 934  * SSC controllers are accessed through library code, instead of any
 935  * kind of all-singing/all-dancing driver.  For example one could be
 936  * used by a particular I2S audio codec's driver, while another one
 937  * on the same system might be used by a custom data capture driver.
 938  */
 939 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 940 {
 941         struct platform_device *pdev;
 942
 943         /*
 944          * NOTE: caller is responsible for passing information matching
 945          * "pins" to whatever will be using each particular controller.
 946          */
 947         switch (id) {
 948         case AT91SAM9RL_ID_SSC0:
 949                 pdev = &at91sam9rl_ssc0_device;
 950                 configure_ssc0_pins(pins);
 951                 break;
 952         case AT91SAM9RL_ID_SSC1:
 953                 pdev = &at91sam9rl_ssc1_device;
 954                 configure_ssc1_pins(pins);
 955                 break;
 956         default:
 957                 return;
 958         }
 959
 960         platform_device_register(pdev);
 961 }
 962
 963 #else
 964 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 965 #endif
 966
 967
 968 /* --------------------------------------------------------------------
 969  *  UART
 970  * -------------------------------------------------------------------- */
 971
 972 #if defined(CONFIG_SERIAL_ATMEL)
 973 static struct resource dbgu_resources[] = {
 974         [0] = {
 975                 .start  = AT91SAM9RL_BASE_DBGU,
 976                 .end    = AT91SAM9RL_BASE_DBGU + SZ_512 - 1,
 977                 .flags  = IORESOURCE_MEM,
 978         },
 979         [1] = {
 980                 .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
 981                 .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
 982                 .flags  = IORESOURCE_IRQ,
 983         },
 984 };
 985
 986 static struct atmel_uart_data dbgu_data = {
 987         .use_dma_tx     = 0,
 988         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 989 };
 990
 991 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 992
 993 static struct platform_device at91sam9rl_dbgu_device = {
 994         .name           = "atmel_usart",
 995         .id             = 0,
 996         .dev            = {
 997                                 .dma_mask               = &dbgu_dmamask,
 998                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 999                                 .platform_data          = &dbgu_data,
1000         },
1001         .resource       = dbgu_resources,
1002         .num_resources  = ARRAY_SIZE(dbgu_resources),
1003 };
1004
1005 static inline void configure_dbgu_pins(void)
1006 {
1007         at91_set_A_periph(AT91_PIN_PA21, 0);            /* DRXD */
1008         at91_set_A_periph(AT91_PIN_PA22, 1);            /* DTXD */
1009 }
1010
1011 static struct resource uart0_resources[] = {
1012         [0] = {
1013                 .start  = AT91SAM9RL_BASE_US0,
1014                 .end    = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
1015                 .flags  = IORESOURCE_MEM,
1016         },
1017         [1] = {
1018                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0,
1019                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0,
1020                 .flags  = IORESOURCE_IRQ,
1021         },
1022 };
1023
1024 static struct atmel_uart_data uart0_data = {
1025         .use_dma_tx     = 1,
1026         .use_dma_rx     = 1,
1027 };
1028
1029 static u64 uart0_dmamask = DMA_BIT_MASK(32);
1030
1031 static struct platform_device at91sam9rl_uart0_device = {
1032         .name           = "atmel_usart",
1033         .id             = 1,
1034         .dev            = {
1035                                 .dma_mask               = &uart0_dmamask,
1036                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1037                                 .platform_data          = &uart0_data,
1038         },
1039         .resource       = uart0_resources,
1040         .num_resources  = ARRAY_SIZE(uart0_resources),
1041 };
1042
1043 static inline void configure_usart0_pins(unsigned pins)
1044 {
1045         at91_set_A_periph(AT91_PIN_PA6, 1);             /* TXD0 */
1046         at91_set_A_periph(AT91_PIN_PA7, 0);             /* RXD0 */
1047
1048         if (pins & ATMEL_UART_RTS)
1049                 at91_set_A_periph(AT91_PIN_PA9, 0);     /* RTS0 */
1050         if (pins & ATMEL_UART_CTS)
1051                 at91_set_A_periph(AT91_PIN_PA10, 0);    /* CTS0 */
1052         if (pins & ATMEL_UART_DSR)
1053                 at91_set_A_periph(AT91_PIN_PD14, 0);    /* DSR0 */
1054         if (pins & ATMEL_UART_DTR)
1055                 at91_set_A_periph(AT91_PIN_PD15, 0);    /* DTR0 */
1056         if (pins & ATMEL_UART_DCD)
1057                 at91_set_A_periph(AT91_PIN_PD16, 0);    /* DCD0 */
1058         if (pins & ATMEL_UART_RI)
1059                 at91_set_A_periph(AT91_PIN_PD17, 0);    /* RI0 */
1060 }
1061
1062 static struct resource uart1_resources[] = {
1063         [0] = {
1064                 .start  = AT91SAM9RL_BASE_US1,
1065                 .end    = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
1066                 .flags  = IORESOURCE_MEM,
1067         },
1068         [1] = {
1069                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1,
1070                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1,
1071                 .flags  = IORESOURCE_IRQ,
1072         },
1073 };
1074
1075 static struct atmel_uart_data uart1_data = {
1076         .use_dma_tx     = 1,
1077         .use_dma_rx     = 1,
1078 };
1079
1080 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1081
1082 static struct platform_device at91sam9rl_uart1_device = {
1083         .name           = "atmel_usart",
1084         .id             = 2,
1085         .dev            = {
1086                                 .dma_mask               = &uart1_dmamask,
1087                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1088                                 .platform_data          = &uart1_data,
1089         },
1090         .resource       = uart1_resources,
1091         .num_resources  = ARRAY_SIZE(uart1_resources),
1092 };
1093
1094 static inline void configure_usart1_pins(unsigned pins)
1095 {
1096         at91_set_A_periph(AT91_PIN_PA11, 1);            /* TXD1 */
1097         at91_set_A_periph(AT91_PIN_PA12, 0);            /* RXD1 */
1098
1099         if (pins & ATMEL_UART_RTS)
1100                 at91_set_B_periph(AT91_PIN_PA18, 0);    /* RTS1 */
1101         if (pins & ATMEL_UART_CTS)
1102                 at91_set_B_periph(AT91_PIN_PA19, 0);    /* CTS1 */
1103 }
1104
1105 static struct resource uart2_resources[] = {
1106         [0] = {
1107                 .start  = AT91SAM9RL_BASE_US2,
1108                 .end    = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
1109                 .flags  = IORESOURCE_MEM,
1110         },
1111         [1] = {
1112                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2,
1113                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2,
1114                 .flags  = IORESOURCE_IRQ,
1115         },
1116 };
1117
1118 static struct atmel_uart_data uart2_data = {
1119         .use_dma_tx     = 1,
1120         .use_dma_rx     = 1,
1121 };
1122
1123 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1124
1125 static struct platform_device at91sam9rl_uart2_device = {
1126         .name           = "atmel_usart",
1127         .id             = 3,
1128         .dev            = {
1129                                 .dma_mask               = &uart2_dmamask,
1130                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1131                                 .platform_data          = &uart2_data,
1132         },
1133         .resource       = uart2_resources,
1134         .num_resources  = ARRAY_SIZE(uart2_resources),
1135 };
1136
1137 static inline void configure_usart2_pins(unsigned pins)
1138 {
1139         at91_set_A_periph(AT91_PIN_PA13, 1);            /* TXD2 */
1140         at91_set_A_periph(AT91_PIN_PA14, 0);            /* RXD2 */
1141
1142         if (pins & ATMEL_UART_RTS)
1143                 at91_set_A_periph(AT91_PIN_PA29, 0);    /* RTS2 */
1144         if (pins & ATMEL_UART_CTS)
1145                 at91_set_A_periph(AT91_PIN_PA30, 0);    /* CTS2 */
1146 }
1147
1148 static struct resource uart3_resources[] = {
1149         [0] = {
1150                 .start  = AT91SAM9RL_BASE_US3,
1151                 .end    = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
1152                 .flags  = IORESOURCE_MEM,
1153         },
1154         [1] = {
1155                 .start  = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3,
1156                 .end    = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3,
1157                 .flags  = IORESOURCE_IRQ,
1158         },
1159 };
1160
1161 static struct atmel_uart_data uart3_data = {
1162         .use_dma_tx     = 1,
1163         .use_dma_rx     = 1,
1164 };
1165
1166 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1167
1168 static struct platform_device at91sam9rl_uart3_device = {
1169         .name           = "atmel_usart",
1170         .id             = 4,
1171         .dev            = {
1172                                 .dma_mask               = &uart3_dmamask,
1173                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1174                                 .platform_data          = &uart3_data,
1175         },
1176         .resource       = uart3_resources,
1177         .num_resources  = ARRAY_SIZE(uart3_resources),
1178 };
1179
1180 static inline void configure_usart3_pins(unsigned pins)
1181 {
1182         at91_set_A_periph(AT91_PIN_PB0, 1);             /* TXD3 */
1183         at91_set_A_periph(AT91_PIN_PB1, 0);             /* RXD3 */
1184
1185         if (pins & ATMEL_UART_RTS)
1186                 at91_set_B_periph(AT91_PIN_PD4, 0);     /* RTS3 */
1187         if (pins & ATMEL_UART_CTS)
1188                 at91_set_B_periph(AT91_PIN_PD3, 0);     /* CTS3 */
1189 }
1190
1191 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1192
1193 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1194 {
1195         struct platform_device *pdev;
1196         struct atmel_uart_data *pdata;
1197
1198         switch (id) {
1199                 case 0:         /* DBGU */
1200                         pdev = &at91sam9rl_dbgu_device;
1201                         configure_dbgu_pins();
1202                         break;
1203                 case AT91SAM9RL_ID_US0:
1204                         pdev = &at91sam9rl_uart0_device;
1205                         configure_usart0_pins(pins);
1206                         break;
1207                 case AT91SAM9RL_ID_US1:
1208                         pdev = &at91sam9rl_uart1_device;
1209                         configure_usart1_pins(pins);
1210                         break;
1211                 case AT91SAM9RL_ID_US2:
1212                         pdev = &at91sam9rl_uart2_device;
1213                         configure_usart2_pins(pins);
1214                         break;
1215                 case AT91SAM9RL_ID_US3:
1216                         pdev = &at91sam9rl_uart3_device;
1217                         configure_usart3_pins(pins);
1218                         break;
1219                 default:
1220                         return;
1221         }
1222         pdata = pdev->dev.platform_data;
1223         pdata->num = portnr;            /* update to mapped ID */
1224
1225         if (portnr < ATMEL_MAX_UART)
1226                 at91_uarts[portnr] = pdev;
1227 }
1228
1229 void __init at91_add_device_serial(void)
1230 {
1231         int i;
1232
1233         for (i = 0; i < ATMEL_MAX_UART; i++) {
1234                 if (at91_uarts[i])
1235                         platform_device_register(at91_uarts[i]);
1236         }
1237 }
1238 #else
1239 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1240 void __init at91_add_device_serial(void) {}
1241 #endif
1242
1243
1244 /* -------------------------------------------------------------------- */
1245
1246 /*
1247  * These devices are always present and don't need any board-specific
1248  * setup.
1249  */
1250 static int __init at91_add_standard_devices(void)
1251 {
1252         at91_add_device_hdmac();
1253         at91_add_device_rtc();
1254         at91_add_device_rtt();
1255         at91_add_device_watchdog();
1256         at91_add_device_tc();
1257         return 0;
1258 }
1259
1260 arch_initcall(at91_add_standard_devices);