1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
4 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
7 #ifndef __ARM_KVM_HOST_H__
8 #define __ARM_KVM_HOST_H__
10 #include <linux/errno.h>
11 #include <linux/types.h>
12 #include <linux/kvm_types.h>
13 #include <asm/cputype.h>
15 #include <asm/kvm_asm.h>
16 #include <asm/kvm_mmio.h>
17 #include <asm/fpstate.h>
18 #include <kvm/arm_arch_timer.h>
20 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
22 #define KVM_USER_MEM_SLOTS 32
23 #define KVM_HAVE_ONE_REG
24 #define KVM_HALT_POLL_NS_DEFAULT 500000
26 #define KVM_VCPU_MAX_FEATURES 2
28 #include <kvm/arm_vgic.h>
31 #ifdef CONFIG_ARM_GIC_V3
32 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
34 #define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
37 #define KVM_REQ_SLEEP \
38 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
39 #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1)
40 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2)
42 DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
44 static inline int kvm_arm_init_sve(void) { return 0; }
46 u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
47 int __attribute_const__ kvm_target_cpu(void);
48 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
49 void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
52 /* The VMID generation used for the virt. memory system */
58 /* The last vcpu id that ran on each physical CPU */
59 int __percpu *last_vcpu_ran;
62 * Anything that is not used directly from assembly code goes
66 /* The VMID generation used for the virt. memory system */
69 /* Stage-2 page table */
73 /* Interrupt controller */
74 struct vgic_dist vgic;
77 /* Mandated version of PSCI */
81 #define KVM_NR_MEM_OBJS 40
84 * We don't want allocation failures within the mmu code, so we preallocate
85 * enough memory for a single page fault in a cache.
87 struct kvm_mmu_memory_cache {
89 void *objects[KVM_NR_MEM_OBJS];
92 struct kvm_vcpu_fault_info {
93 u32 hsr; /* Hyp Syndrome Register */
94 u32 hxfar; /* Hyp Data/Inst. Fault Address Register */
95 u32 hpfar; /* Hyp IPA Fault Address Register */
99 * 0 is reserved as an invalid value.
100 * Order should be kept in sync with the save/restore code.
104 c0_MPIDR, /* MultiProcessor ID Register */
105 c0_CSSELR, /* Cache Size Selection Register */
106 c1_SCTLR, /* System Control Register */
107 c1_ACTLR, /* Auxiliary Control Register */
108 c1_CPACR, /* Coprocessor Access Control */
109 c2_TTBR0, /* Translation Table Base Register 0 */
110 c2_TTBR0_high, /* TTBR0 top 32 bits */
111 c2_TTBR1, /* Translation Table Base Register 1 */
112 c2_TTBR1_high, /* TTBR1 top 32 bits */
113 c2_TTBCR, /* Translation Table Base Control R. */
114 c3_DACR, /* Domain Access Control Register */
115 c5_DFSR, /* Data Fault Status Register */
116 c5_IFSR, /* Instruction Fault Status Register */
117 c5_ADFSR, /* Auxilary Data Fault Status R */
118 c5_AIFSR, /* Auxilary Instrunction Fault Status R */
119 c6_DFAR, /* Data Fault Address Register */
120 c6_IFAR, /* Instruction Fault Address Register */
121 c7_PAR, /* Physical Address Register */
122 c7_PAR_high, /* PAR top 32 bits */
123 c9_L2CTLR, /* Cortex A15/A7 L2 Control Register */
124 c10_PRRR, /* Primary Region Remap Register */
125 c10_NMRR, /* Normal Memory Remap Register */
126 c12_VBAR, /* Vector Base Address Register */
127 c13_CID, /* Context ID Register */
128 c13_TID_URW, /* Thread ID, User R/W */
129 c13_TID_URO, /* Thread ID, User R/O */
130 c13_TID_PRIV, /* Thread ID, Privileged */
131 c14_CNTKCTL, /* Timer Control Register (PL1) */
132 c10_AMAIR0, /* Auxilary Memory Attribute Indirection Reg0 */
133 c10_AMAIR1, /* Auxilary Memory Attribute Indirection Reg1 */
134 NR_CP15_REGS /* Number of regs (incl. invalid) */
137 struct kvm_cpu_context {
138 struct kvm_regs gp_regs;
139 struct vfp_hard_struct vfp;
140 u32 cp15[NR_CP15_REGS];
143 struct kvm_host_data {
144 struct kvm_cpu_context host_ctxt;
147 typedef struct kvm_host_data kvm_host_data_t;
149 static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt)
151 /* The host's MPIDR is immutable, so let's set it up at boot time */
152 cpu_ctxt->cp15[c0_MPIDR] = read_cpuid_mpidr();
155 struct vcpu_reset_state {
162 struct kvm_vcpu_arch {
163 struct kvm_cpu_context ctxt;
165 int target; /* Processor target */
166 DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
168 /* The CPU type we expose to the VM */
171 /* HYP trapping configuration */
174 /* Exception Information */
175 struct kvm_vcpu_fault_info fault;
177 /* Host FP context */
178 struct kvm_cpu_context *host_cpu_context;
181 struct vgic_cpu vgic_cpu;
182 struct arch_timer_cpu timer_cpu;
185 * Anything that is not used directly from assembly code goes
189 /* vcpu power-off state */
192 /* Don't run the guest (internal implementation need) */
195 /* IO related fields */
196 struct kvm_decode mmio_decode;
198 /* Cache some mmu pages needed inside spinlock regions */
199 struct kvm_mmu_memory_cache mmu_page_cache;
201 struct vcpu_reset_state reset_state;
203 /* Detect first run of a vcpu */
208 ulong remote_tlb_flush;
211 struct kvm_vcpu_stat {
212 u64 halt_successful_poll;
213 u64 halt_attempted_poll;
214 u64 halt_poll_invalid;
220 u64 mmio_exit_kernel;
224 #define vcpu_cp15(v,r) (v)->arch.ctxt.cp15[r]
226 int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
227 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
228 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
229 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
230 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
232 unsigned long __kvm_call_hyp(void *hypfn, ...);
235 * The has_vhe() part doesn't get emitted, but is used for type-checking.
237 #define kvm_call_hyp(f, ...) \
242 __kvm_call_hyp(kvm_ksym_ref(f), ##__VA_ARGS__); \
246 #define kvm_call_hyp_ret(f, ...) \
248 typeof(f(__VA_ARGS__)) ret; \
251 ret = f(__VA_ARGS__); \
253 ret = __kvm_call_hyp(kvm_ksym_ref(f), \
260 void force_vm_exit(const cpumask_t *mask);
261 int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,
262 struct kvm_vcpu_events *events);
264 int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
265 struct kvm_vcpu_events *events);
267 #define KVM_ARCH_WANT_MMU_NOTIFIER
268 int kvm_unmap_hva_range(struct kvm *kvm,
269 unsigned long start, unsigned long end);
270 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
272 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
273 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
274 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
275 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
277 struct kvm_vcpu *kvm_arm_get_running_vcpu(void);
278 struct kvm_vcpu __percpu **kvm_get_running_vcpus(void);
279 void kvm_arm_halt_guest(struct kvm *kvm);
280 void kvm_arm_resume_guest(struct kvm *kvm);
282 int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
283 unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu);
284 int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
285 int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
287 int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
288 int exception_index);
290 static inline void handle_exit_early(struct kvm_vcpu *vcpu, struct kvm_run *run,
291 int exception_index) {}
293 static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
294 unsigned long hyp_stack_ptr,
295 unsigned long vector_ptr)
298 * Call initialization code, and switch to the full blown HYP
299 * code. The init code doesn't need to preserve these
300 * registers as r0-r3 are already callee saved according to
302 * Note that we slightly misuse the prototype by casting the
303 * stack pointer to a void *.
305 * The PGDs are always passed as the third argument, in order
306 * to be passed into r2-r3 to the init code (yes, this is
307 * compliant with the PCS!).
310 __kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);
313 static inline void __cpu_init_stage2(void)
315 kvm_call_hyp(__init_stage2_translation);
318 static inline int kvm_arch_vm_ioctl_check_extension(struct kvm *kvm, long ext)
323 int kvm_perf_init(void);
324 int kvm_perf_teardown(void);
326 void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot);
328 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
330 static inline bool kvm_arch_requires_vhe(void) { return false; }
331 static inline void kvm_arch_hardware_unsetup(void) {}
332 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
333 static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
334 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
335 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
337 static inline void kvm_arm_init_debug(void) {}
338 static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}
339 static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {}
340 static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {}
342 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
343 struct kvm_device_attr *attr);
344 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
345 struct kvm_device_attr *attr);
346 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
347 struct kvm_device_attr *attr);
350 * VFP/NEON switching is all done by the hyp switch code, so no need to
351 * coordinate with host context handling for this state:
353 static inline void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu) {}
354 static inline void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu) {}
355 static inline void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu) {}
357 static inline void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu) {}
358 static inline void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu) {}
360 static inline void kvm_arm_vhe_guest_enter(void) {}
361 static inline void kvm_arm_vhe_guest_exit(void) {}
363 #define KVM_BP_HARDEN_UNKNOWN -1
364 #define KVM_BP_HARDEN_WA_NEEDED 0
365 #define KVM_BP_HARDEN_NOT_REQUIRED 1
367 static inline int kvm_arm_harden_branch_predictor(void)
369 switch(read_cpuid_part()) {
370 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
371 case ARM_CPU_PART_BRAHMA_B15:
372 case ARM_CPU_PART_CORTEX_A12:
373 case ARM_CPU_PART_CORTEX_A15:
374 case ARM_CPU_PART_CORTEX_A17:
375 return KVM_BP_HARDEN_WA_NEEDED;
377 case ARM_CPU_PART_CORTEX_A7:
378 return KVM_BP_HARDEN_NOT_REQUIRED;
380 return KVM_BP_HARDEN_UNKNOWN;
384 #define KVM_SSBD_UNKNOWN -1
385 #define KVM_SSBD_FORCE_DISABLE 0
386 #define KVM_SSBD_KERNEL 1
387 #define KVM_SSBD_FORCE_ENABLE 2
388 #define KVM_SSBD_MITIGATED 3
390 static inline int kvm_arm_have_ssbd(void)
392 /* No way to detect it yet, pretend it is not there. */
393 return KVM_SSBD_UNKNOWN;
396 static inline void kvm_vcpu_load_sysregs(struct kvm_vcpu *vcpu) {}
397 static inline void kvm_vcpu_put_sysregs(struct kvm_vcpu *vcpu) {}
399 #define __KVM_HAVE_ARCH_VM_ALLOC
400 struct kvm *kvm_arch_alloc_vm(void);
401 void kvm_arch_free_vm(struct kvm *kvm);
403 static inline int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type)
406 * On 32bit ARM, VMs get a static 40bit IPA stage2 setup,
407 * so any non-zero value used as type is illegal.
414 static inline int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature)
419 static inline bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu)
424 #endif /* __ARM_KVM_HOST_H__ */