Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / zynq-zc702.dts
1 /*
2  *  Copyright (C) 2011 - 2014 Xilinx
3  *  Copyright (C) 2012 National Instruments Corp.
4  *
5  * This software is licensed under the terms of the GNU General Public
6  * License version 2, as published by the Free Software Foundation, and
7  * may be copied, distributed, and modified under those terms.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14 /dts-v1/;
15 #include "zynq-7000.dtsi"
16
17 / {
18         model = "Zynq ZC702 Development Board";
19         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
20
21         aliases {
22                 ethernet0 = &gem0;
23                 i2c0 = &i2c0;
24                 serial0 = &uart1;
25         };
26
27         memory@0 {
28                 device_type = "memory";
29                 reg = <0x0 0x40000000>;
30         };
31
32         chosen {
33                 bootargs = "";
34                 stdout-path = "serial0:115200n8";
35         };
36
37         gpio-keys {
38                 compatible = "gpio-keys";
39                 #address-cells = <1>;
40                 #size-cells = <0>;
41                 autorepeat;
42                 sw14 {
43                         label = "sw14";
44                         gpios = <&gpio0 12 0>;
45                         linux,code = <108>; /* down */
46                         wakeup-source;
47                         autorepeat;
48                 };
49                 sw13 {
50                         label = "sw13";
51                         gpios = <&gpio0 14 0>;
52                         linux,code = <103>; /* up */
53                         wakeup-source;
54                         autorepeat;
55                 };
56         };
57
58         leds {
59                 compatible = "gpio-leds";
60
61                 ds23 {
62                         label = "ds23";
63                         gpios = <&gpio0 10 0>;
64                         linux,default-trigger = "heartbeat";
65                 };
66         };
67
68         usb_phy0: phy0 {
69                 compatible = "usb-nop-xceiv";
70                 #phy-cells = <0>;
71         };
72 };
73
74 &amba {
75         ocm: sram@fffc0000 {
76                 compatible = "mmio-sram";
77                 reg = <0xfffc0000 0x10000>;
78         };
79 };
80
81 &can0 {
82         status = "okay";
83         pinctrl-names = "default";
84         pinctrl-0 = <&pinctrl_can0_default>;
85 };
86
87 &clkc {
88         ps-clk-frequency = <33333333>;
89 };
90
91 &gem0 {
92         status = "okay";
93         phy-mode = "rgmii-id";
94         phy-handle = <&ethernet_phy>;
95         pinctrl-names = "default";
96         pinctrl-0 = <&pinctrl_gem0_default>;
97
98         ethernet_phy: ethernet-phy@7 {
99                 reg = <7>;
100                 device_type = "ethernet-phy";
101         };
102 };
103
104 &gpio0 {
105         pinctrl-names = "default";
106         pinctrl-0 = <&pinctrl_gpio0_default>;
107 };
108
109 &i2c0 {
110         status = "okay";
111         clock-frequency = <400000>;
112         pinctrl-names = "default";
113         pinctrl-0 = <&pinctrl_i2c0_default>;
114
115         i2cswitch@74 {
116                 compatible = "nxp,pca9548";
117                 #address-cells = <1>;
118                 #size-cells = <0>;
119                 reg = <0x74>;
120
121                 i2c@0 {
122                         #address-cells = <1>;
123                         #size-cells = <0>;
124                         reg = <0>;
125                         si570: clock-generator@5d {
126                                 #clock-cells = <0>;
127                                 compatible = "silabs,si570";
128                                 temperature-stability = <50>;
129                                 reg = <0x5d>;
130                                 factory-fout = <156250000>;
131                                 clock-frequency = <148500000>;
132                         };
133                 };
134
135                 i2c@1 {
136                         #address-cells = <1>;
137                         #size-cells = <0>;
138                         reg = <1>;
139                         adv7511: hdmi-tx@39 {
140                                 compatible = "adi,adv7511";
141                                 reg = <0x39>;
142                                 adi,input-depth = <8>;
143                                 adi,input-colorspace = "yuv422";
144                                 adi,input-clock = "1x";
145                                 adi,input-style = <3>;
146                                 adi,input-justification = "right";
147                         };
148                 };
149
150                 i2c@2 {
151                         #address-cells = <1>;
152                         #size-cells = <0>;
153                         reg = <2>;
154                         eeprom@54 {
155                                 compatible = "atmel,24c08";
156                                 reg = <0x54>;
157                         };
158                 };
159
160                 i2c@3 {
161                         #address-cells = <1>;
162                         #size-cells = <0>;
163                         reg = <3>;
164                         gpio@21 {
165                                 compatible = "ti,tca6416";
166                                 reg = <0x21>;
167                                 gpio-controller;
168                                 #gpio-cells = <2>;
169                         };
170                 };
171
172                 i2c@4 {
173                         #address-cells = <1>;
174                         #size-cells = <0>;
175                         reg = <4>;
176                         rtc@51 {
177                                 compatible = "nxp,pcf8563";
178                                 reg = <0x51>;
179                         };
180                 };
181
182                 i2c@7 {
183                         #address-cells = <1>;
184                         #size-cells = <0>;
185                         reg = <7>;
186                         hwmon@52 {
187                                 compatible = "ti,ucd9248";
188                                 reg = <52>;
189                         };
190                         hwmon@53 {
191                                 compatible = "ti,ucd9248";
192                                 reg = <53>;
193                         };
194                         hwmon@54 {
195                                 compatible = "ti,ucd9248";
196                                 reg = <54>;
197                         };
198                 };
199         };
200 };
201
202 &pinctrl0 {
203         pinctrl_can0_default: can0-default {
204                 mux {
205                         function = "can0";
206                         groups = "can0_9_grp";
207                 };
208
209                 conf {
210                         groups = "can0_9_grp";
211                         slew-rate = <0>;
212                         io-standard = <1>;
213                 };
214
215                 conf-rx {
216                         pins = "MIO46";
217                         bias-high-impedance;
218                 };
219
220                 conf-tx {
221                         pins = "MIO47";
222                         bias-disable;
223                 };
224         };
225
226         pinctrl_gem0_default: gem0-default {
227                 mux {
228                         function = "ethernet0";
229                         groups = "ethernet0_0_grp";
230                 };
231
232                 conf {
233                         groups = "ethernet0_0_grp";
234                         slew-rate = <0>;
235                         io-standard = <4>;
236                 };
237
238                 conf-rx {
239                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
240                         bias-high-impedance;
241                         low-power-disable;
242                 };
243
244                 conf-tx {
245                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
246                         bias-disable;
247                         low-power-enable;
248                 };
249
250                 mux-mdio {
251                         function = "mdio0";
252                         groups = "mdio0_0_grp";
253                 };
254
255                 conf-mdio {
256                         groups = "mdio0_0_grp";
257                         slew-rate = <0>;
258                         io-standard = <1>;
259                         bias-disable;
260                 };
261         };
262
263         pinctrl_gpio0_default: gpio0-default {
264                 mux {
265                         function = "gpio0";
266                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
267                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
268                                  "gpio0_13_grp", "gpio0_14_grp";
269                 };
270
271                 conf {
272                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
273                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
274                                  "gpio0_13_grp", "gpio0_14_grp";
275                         slew-rate = <0>;
276                         io-standard = <1>;
277                 };
278
279                 conf-pull-up {
280                         pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
281                         bias-pull-up;
282                 };
283
284                 conf-pull-none {
285                         pins = "MIO7", "MIO8";
286                         bias-disable;
287                 };
288         };
289
290         pinctrl_i2c0_default: i2c0-default {
291                 mux {
292                         groups = "i2c0_10_grp";
293                         function = "i2c0";
294                 };
295
296                 conf {
297                         groups = "i2c0_10_grp";
298                         bias-pull-up;
299                         slew-rate = <0>;
300                         io-standard = <1>;
301                 };
302         };
303
304         pinctrl_sdhci0_default: sdhci0-default {
305                 mux {
306                         groups = "sdio0_2_grp";
307                         function = "sdio0";
308                 };
309
310                 conf {
311                         groups = "sdio0_2_grp";
312                         slew-rate = <0>;
313                         io-standard = <1>;
314                         bias-disable;
315                 };
316
317                 mux-cd {
318                         groups = "gpio0_0_grp";
319                         function = "sdio0_cd";
320                 };
321
322                 conf-cd {
323                         groups = "gpio0_0_grp";
324                         bias-high-impedance;
325                         bias-pull-up;
326                         slew-rate = <0>;
327                         io-standard = <1>;
328                 };
329
330                 mux-wp {
331                         groups = "gpio0_15_grp";
332                         function = "sdio0_wp";
333                 };
334
335                 conf-wp {
336                         groups = "gpio0_15_grp";
337                         bias-high-impedance;
338                         bias-pull-up;
339                         slew-rate = <0>;
340                         io-standard = <1>;
341                 };
342         };
343
344         pinctrl_uart1_default: uart1-default {
345                 mux {
346                         groups = "uart1_10_grp";
347                         function = "uart1";
348                 };
349
350                 conf {
351                         groups = "uart1_10_grp";
352                         slew-rate = <0>;
353                         io-standard = <1>;
354                 };
355
356                 conf-rx {
357                         pins = "MIO49";
358                         bias-high-impedance;
359                 };
360
361                 conf-tx {
362                         pins = "MIO48";
363                         bias-disable;
364                 };
365         };
366
367         pinctrl_usb0_default: usb0-default {
368                 mux {
369                         groups = "usb0_0_grp";
370                         function = "usb0";
371                 };
372
373                 conf {
374                         groups = "usb0_0_grp";
375                         slew-rate = <0>;
376                         io-standard = <1>;
377                 };
378
379                 conf-rx {
380                         pins = "MIO29", "MIO31", "MIO36";
381                         bias-high-impedance;
382                 };
383
384                 conf-tx {
385                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
386                                "MIO35", "MIO37", "MIO38", "MIO39";
387                         bias-disable;
388                 };
389         };
390 };
391
392 &sdhci0 {
393         status = "okay";
394         pinctrl-names = "default";
395         pinctrl-0 = <&pinctrl_sdhci0_default>;
396 };
397
398 &uart1 {
399         status = "okay";
400         pinctrl-names = "default";
401         pinctrl-0 = <&pinctrl_uart1_default>;
402 };
403
404 &usb0 {
405         status = "okay";
406         dr_mode = "host";
407         usb-phy = <&usb_phy0>;
408         pinctrl-names = "default";
409         pinctrl-0 = <&pinctrl_usb0_default>;
410 };