Merge tag 'modules-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / zynq-parallella.dts
1 /*
2  * Copyright (c) 2014 SUSE LINUX Products GmbH
3  *
4  * Derived from zynq-zed.dts:
5  *
6  *  Copyright (C) 2011 Xilinx
7  *  Copyright (C) 2012 National Instruments Corp.
8  *  Copyright (C) 2013 Xilinx
9  *
10  * This software is licensed under the terms of the GNU General Public
11  * License version 2, as published by the Free Software Foundation, and
12  * may be copied, distributed, and modified under those terms.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  */
19 /dts-v1/;
20 /include/ "zynq-7000.dtsi"
21
22 / {
23         model = "Adapteva Parallella Board";
24         compatible = "adapteva,parallella", "xlnx,zynq-7000";
25
26         memory {
27                 device_type = "memory";
28                 reg = <0x0 0x40000000>;
29         };
30
31         chosen {
32                 bootargs = "console=ttyPS0,115200 earlyprintk root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait";
33                 linux,stdout-path = "/amba/serial@e0001000";
34         };
35 };
36
37 &gem0 {
38         status = "okay";
39         phy-mode = "rgmii-id";
40         phy-handle = <&ethernet_phy>;
41
42         ethernet_phy: ethernet-phy@0 {
43                 /* Marvell 88E1318 */
44                 compatible = "ethernet-phy-id0141.0e90",
45                              "ethernet-phy-ieee802.3-c22";
46                 reg = <0>;
47                 marvell,reg-init = <0x3 0x10 0xff00 0x1e>,
48                                    <0x3 0x11 0xfff0 0xa>;
49         };
50 };
51
52 &i2c0 {
53         status = "okay";
54
55         isl9305: isl9305@68 {
56                 compatible = "isl,isl9305";
57                 reg = <0x68>;
58
59                 regulators {
60                         dcd1 {
61                                 regulator-name = "VDD_DSP";
62                                 regulator-always-on;
63                         };
64                         dcd2 {
65                                 regulator-name = "1P35V";
66                                 regulator-always-on;
67                         };
68                         ldo1 {
69                                 regulator-name = "VDD_ADJ";
70                         };
71                         ldo2 {
72                                 regulator-name = "VDD_GPIO";
73                                 regulator-always-on;
74                         };
75                 };
76         };
77 };
78
79 &sdhci1 {
80         status = "okay";
81 };
82
83 &uart1 {
84         status = "okay";
85 };