arch/arm/boot/dts/vf610-zii-dev.dtsi

   1 /*
   2  * Copyright (C) 2015, 2016 Zodiac Inflight Innovations
   3  *
   4  * Based on an original 'vf610-twr.dts' which is Copyright 2015,
   5  * Freescale Semiconductor, Inc.
   6  *
   7  * This file is dual-licensed: you can use it either under the terms
   8  * of the GPL or the X11 license, at your option. Note that this dual
   9  * licensing only applies to this file, and not this project as a
  10  * whole.
  11  *
  12  *  a) This file is free software; you can redistribute it and/or
  13  *     modify it under the terms of the GNU General Public License
  14  *     version 2 as published by the Free Software Foundation.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 #include "vf610.dtsi"
  46
  47 / {
  48         chosen {
  49                 stdout-path = "serial0:115200n8";
  50         };
  51
  52         memory {
  53                 reg = <0x80000000 0x20000000>;
  54         };
  55
  56         gpio-leds {
  57                 compatible = "gpio-leds";
  58                 pinctrl-0 = <&pinctrl_leds_debug>;
  59                 pinctrl-names = "default";
  60
  61                 debug {
  62                         label = "zii:green:debug1";
  63                         gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
  64                         linux,default-trigger = "heartbeat";
  65                 };
  66         };
  67
  68         reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
  69                 compatible = "regulator-fixed";
  70                 regulator-name = "vcc_3v3_mcu";
  71                 regulator-min-microvolt = <3300000>;
  72                 regulator-max-microvolt = <3300000>;
  73         };
  74
  75         usb0_vbus: regulator-usb0-vbus {
  76                 compatible = "regulator-fixed";
  77                 pinctrl-0 = <&pinctrl_usb_vbus>;
  78                 regulator-name = "usb_vbus";
  79                 regulator-min-microvolt = <5000000>;
  80                 regulator-max-microvolt = <5000000>;
  81                 enable-active-high;
  82                 regulator-always-on;
  83                 regulator-boot-on;
  84                 gpio = <&gpio0 6 0>;
  85         };
  86 };
  87
  88 &adc0 {
  89         pinctrl-names = "default";
  90         pinctrl-0 = <&pinctrl_adc0_ad5>;
  91         vref-supply = <&reg_vcc_3v3_mcu>;
  92         status = "okay";
  93 };
  94
  95 &edma0 {
  96         status = "okay";
  97 };
  98
  99 &edma1 {
 100         status = "okay";
 101 };
 102
 103 &esdhc1 {
 104         pinctrl-names = "default";
 105         pinctrl-0 = <&pinctrl_esdhc1>;
 106         bus-width = <4>;
 107         status = "okay";
 108 };
 109
 110 &fec0 {
 111         phy-mode = "rmii";
 112         pinctrl-names = "default";
 113         pinctrl-0 = <&pinctrl_fec0>;
 114         status = "okay";
 115 };
 116
 117 &fec1 {
 118         phy-mode = "rmii";
 119         pinctrl-names = "default";
 120         pinctrl-0 = <&pinctrl_fec1>;
 121         status = "okay";
 122
 123         fixed-link {
 124                    speed = <100>;
 125                    full-duplex;
 126         };
 127
 128         mdio1: mdio {
 129                 #address-cells = <1>;
 130                 #size-cells = <0>;
 131                 status = "okay";
 132         };
 133 };
 134
 135 &i2c0 {
 136         clock-frequency = <100000>;
 137         pinctrl-names = "default", "gpio";
 138         pinctrl-0 = <&pinctrl_i2c0>;
 139         pinctrl-1 = <&pinctrl_i2c0_gpio>;
 140         scl-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
 141         sda-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
 142         status = "okay";
 143
 144         lm75@48 {
 145                 compatible = "national,lm75";
 146                 reg = <0x48>;
 147         };
 148
 149         at24c04@50 {
 150                 compatible = "atmel,24c04";
 151                 reg = <0x50>;
 152         };
 153
 154         at24c04@52 {
 155                 compatible = "atmel,24c04";
 156                 reg = <0x52>;
 157         };
 158
 159         ds1682@6b {
 160                 compatible = "dallas,ds1682";
 161                 reg = <0x6b>;
 162         };
 163 };
 164
 165 &i2c1 {
 166         clock-frequency = <100000>;
 167         pinctrl-names = "default";
 168         pinctrl-0 = <&pinctrl_i2c1>;
 169         status = "okay";
 170 };
 171
 172 &i2c2 {
 173         clock-frequency = <100000>;
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&pinctrl_i2c2>;
 176         status = "okay";
 177 };
 178
 179 &uart0 {
 180         pinctrl-names = "default";
 181         pinctrl-0 = <&pinctrl_uart0>;
 182         status = "okay";
 183 };
 184
 185 &uart1 {
 186         pinctrl-names = "default";
 187         pinctrl-0 = <&pinctrl_uart1>;
 188         status = "okay";
 189 };
 190
 191 &uart2 {
 192         pinctrl-names = "default";
 193         pinctrl-0 = <&pinctrl_uart2>;
 194         status = "okay";
 195 };
 196
 197 &usbdev0 {
 198         disable-over-current;
 199         vbus-supply = <&usb0_vbus>;
 200         dr_mode = "host";
 201         status = "okay";
 202 };
 203
 204 &usbh1 {
 205         disable-over-current;
 206         status = "okay";
 207 };
 208
 209 &usbmisc0 {
 210         status = "okay";
 211 };
 212
 213 &usbmisc1 {
 214         status = "okay";
 215 };
 216
 217 &usbphy0 {
 218         status = "okay";
 219 };
 220
 221 &usbphy1 {
 222         status = "okay";
 223 };
 224
 225 &iomuxc {
 226         pinctrl_adc0_ad5: adc0ad5grp {
 227                 fsl,pins = <
 228                         VF610_PAD_PTC30__ADC0_SE5       0x00a1
 229                 >;
 230         };
 231
 232         pinctrl_dspi0: dspi0grp {
 233                 fsl,pins = <
 234                         VF610_PAD_PTB18__DSPI0_CS1      0x1182
 235                         VF610_PAD_PTB19__DSPI0_CS0      0x1182
 236                         VF610_PAD_PTB20__DSPI0_SIN      0x1181
 237                         VF610_PAD_PTB21__DSPI0_SOUT     0x1182
 238                         VF610_PAD_PTB22__DSPI0_SCK      0x1182
 239                 >;
 240         };
 241
 242         pinctrl_dspi2: dspi2grp {
 243                 fsl,pins = <
 244                         VF610_PAD_PTD31__DSPI2_CS1      0x1182
 245                         VF610_PAD_PTD30__DSPI2_CS0      0x1182
 246                         VF610_PAD_PTD29__DSPI2_SIN      0x1181
 247                         VF610_PAD_PTD28__DSPI2_SOUT     0x1182
 248                         VF610_PAD_PTD27__DSPI2_SCK      0x1182
 249                 >;
 250         };
 251
 252         pinctrl_esdhc1: esdhc1grp {
 253                 fsl,pins = <
 254                         VF610_PAD_PTA24__ESDHC1_CLK     0x31ef
 255                         VF610_PAD_PTA25__ESDHC1_CMD     0x31ef
 256                         VF610_PAD_PTA26__ESDHC1_DAT0    0x31ef
 257                         VF610_PAD_PTA27__ESDHC1_DAT1    0x31ef
 258                         VF610_PAD_PTA28__ESDHC1_DATA2   0x31ef
 259                         VF610_PAD_PTA29__ESDHC1_DAT3    0x31ef
 260                         VF610_PAD_PTA7__GPIO_134        0x219d
 261                 >;
 262         };
 263
 264         pinctrl_fec0: fec0grp {
 265                 fsl,pins = <
 266                         VF610_PAD_PTC0__ENET_RMII0_MDC  0x30d2
 267                         VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d3
 268                         VF610_PAD_PTC2__ENET_RMII0_CRS  0x30d1
 269                         VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
 270                         VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
 271                         VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
 272                         VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
 273                         VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
 274                         VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
 275                 >;
 276         };
 277
 278         pinctrl_fec1: fec1grp {
 279                 fsl,pins = <
 280                         VF610_PAD_PTA6__RMII_CLKIN              0x30d1
 281                         VF610_PAD_PTC9__ENET_RMII1_MDC          0x30d2
 282                         VF610_PAD_PTC10__ENET_RMII1_MDIO        0x30d3
 283                         VF610_PAD_PTC11__ENET_RMII1_CRS         0x30d1
 284                         VF610_PAD_PTC12__ENET_RMII1_RXD1        0x30d1
 285                         VF610_PAD_PTC13__ENET_RMII1_RXD0        0x30d1
 286                         VF610_PAD_PTC14__ENET_RMII1_RXER        0x30d1
 287                         VF610_PAD_PTC15__ENET_RMII1_TXD1        0x30d2
 288                         VF610_PAD_PTC16__ENET_RMII1_TXD0        0x30d2
 289                         VF610_PAD_PTC17__ENET_RMII1_TXEN        0x30d2
 290                 >;
 291         };
 292
 293         pinctrl_gpio_spi0: pinctrl-gpio-spi0 {
 294                 fsl,pins = <
 295                         VF610_PAD_PTB22__GPIO_44        0x33e2
 296                         VF610_PAD_PTB21__GPIO_43        0x33e2
 297                         VF610_PAD_PTB20__GPIO_42        0x33e1
 298                         VF610_PAD_PTB19__GPIO_41        0x33e2
 299                         VF610_PAD_PTB18__GPIO_40        0x33e2
 300                 >;
 301         };
 302
 303         pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
 304                 fsl,pins = <
 305                         VF610_PAD_PTB5__GPIO_27         0x219d
 306                 >;
 307         };
 308
 309         pinctrl_gpio_switch1: pinctrl-gpio-switch1 {
 310                 fsl,pins = <
 311                         VF610_PAD_PTB4__GPIO_26         0x219d
 312                 >;
 313         };
 314
 315         pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset {
 316                 fsl,pins = <
 317                          VF610_PAD_PTE14__GPIO_119      0x31c2
 318                          >;
 319         };
 320
 321         pinctrl_i2c0: i2c0grp {
 322                 fsl,pins = <
 323                         VF610_PAD_PTB14__I2C0_SCL       0x37ff
 324                         VF610_PAD_PTB15__I2C0_SDA       0x37ff
 325                 >;
 326         };
 327
 328         pinctrl_i2c0_gpio: i2c0grp-gpio {
 329                 fsl,pins = <
 330                         VF610_PAD_PTB14__GPIO_36        0x31c2
 331                         VF610_PAD_PTB15__GPIO_37        0x31c2
 332                 >;
 333         };
 334
 335
 336         pinctrl_i2c1: i2c1grp {
 337                 fsl,pins = <
 338                         VF610_PAD_PTB16__I2C1_SCL       0x37ff
 339                         VF610_PAD_PTB17__I2C1_SDA       0x37ff
 340                 >;
 341         };
 342
 343         pinctrl_i2c2: i2c2grp {
 344                 fsl,pins = <
 345                         VF610_PAD_PTA22__I2C2_SCL       0x37ff
 346                         VF610_PAD_PTA23__I2C2_SDA       0x37ff
 347                 >;
 348         };
 349
 350         pinctrl_leds_debug: pinctrl-leds-debug {
 351                 fsl,pins = <
 352                          VF610_PAD_PTD20__GPIO_74       0x31c2
 353                          >;
 354         };
 355
 356         pinctrl_qspi0: qspi0grp {
 357                 fsl,pins = <
 358                         VF610_PAD_PTD7__QSPI0_B_QSCK    0x31c3
 359                         VF610_PAD_PTD8__QSPI0_B_CS0     0x31ff
 360                         VF610_PAD_PTD9__QSPI0_B_DATA3   0x31c3
 361                         VF610_PAD_PTD10__QSPI0_B_DATA2  0x31c3
 362                         VF610_PAD_PTD11__QSPI0_B_DATA1  0x31c3
 363                         VF610_PAD_PTD12__QSPI0_B_DATA0  0x31c3
 364                 >;
 365         };
 366
 367         pinctrl_uart0: uart0grp {
 368                 fsl,pins = <
 369                         VF610_PAD_PTB10__UART0_TX       0x21a2
 370                         VF610_PAD_PTB11__UART0_RX       0x21a1
 371                 >;
 372         };
 373
 374         pinctrl_uart1: uart1grp {
 375                 fsl,pins = <
 376                         VF610_PAD_PTB23__UART1_TX       0x21a2
 377                         VF610_PAD_PTB24__UART1_RX       0x21a1
 378                 >;
 379         };
 380
 381         pinctrl_uart2: uart2grp {
 382                 fsl,pins = <
 383                         VF610_PAD_PTD0__UART2_TX        0x21a2
 384                         VF610_PAD_PTD1__UART2_RX        0x21a1
 385                 >;
 386         };
 387
 388         pinctrl_usb_vbus: pinctrl-usb-vbus {
 389                 fsl,pins = <
 390                         VF610_PAD_PTA16__GPIO_6 0x31c2
 391                 >;
 392         };
 393
 394         pinctrl_usb0_host: usb0-host-grp {
 395                 fsl,pins = <
 396                         VF610_PAD_PTD6__GPIO_85         0x0062
 397                 >;
 398         };
 399 };