arch/arm/boot/dts/uniphier-pro4.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
   2 //
   3 // Device Tree Source for UniPhier Pro4 SoC
   4 //
   5 // Copyright (C) 2015-2016 Socionext Inc.
   6 //   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   7
   8 #include <dt-bindings/gpio/uniphier-gpio.h>
   9
  10 / {
  11         compatible = "socionext,uniphier-pro4";
  12         #address-cells = <1>;
  13         #size-cells = <1>;
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         device_type = "cpu";
  21                         compatible = "arm,cortex-a9";
  22                         reg = <0>;
  23                         enable-method = "psci";
  24                         next-level-cache = <&l2>;
  25                 };
  26
  27                 cpu@1 {
  28                         device_type = "cpu";
  29                         compatible = "arm,cortex-a9";
  30                         reg = <1>;
  31                         enable-method = "psci";
  32                         next-level-cache = <&l2>;
  33                 };
  34         };
  35
  36         psci {
  37                 compatible = "arm,psci-0.2";
  38                 method = "smc";
  39         };
  40
  41         clocks {
  42                 refclk: ref {
  43                         compatible = "fixed-clock";
  44                         #clock-cells = <0>;
  45                         clock-frequency = <25000000>;
  46                 };
  47
  48                 arm_timer_clk: arm-timer {
  49                         #clock-cells = <0>;
  50                         compatible = "fixed-clock";
  51                         clock-frequency = <50000000>;
  52                 };
  53         };
  54
  55         soc {
  56                 compatible = "simple-bus";
  57                 #address-cells = <1>;
  58                 #size-cells = <1>;
  59                 ranges;
  60                 interrupt-parent = <&intc>;
  61
  62                 l2: l2-cache@500c0000 {
  63                         compatible = "socionext,uniphier-system-cache";
  64                         reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
  65                               <0x506c0000 0x400>;
  66                         interrupts = <0 174 4>, <0 175 4>;
  67                         cache-unified;
  68                         cache-size = <(768 * 1024)>;
  69                         cache-sets = <256>;
  70                         cache-line-size = <128>;
  71                         cache-level = <2>;
  72                 };
  73
  74                 spi0: spi@54006000 {
  75                         compatible = "socionext,uniphier-scssi";
  76                         status = "disabled";
  77                         reg = <0x54006000 0x100>;
  78                         interrupts = <0 39 4>;
  79                         pinctrl-names = "default";
  80                         pinctrl-0 = <&pinctrl_spi0>;
  81                         clocks = <&peri_clk 11>;
  82                         resets = <&peri_rst 11>;
  83                 };
  84
  85                 serial0: serial@54006800 {
  86                         compatible = "socionext,uniphier-uart";
  87                         status = "disabled";
  88                         reg = <0x54006800 0x40>;
  89                         interrupts = <0 33 4>;
  90                         pinctrl-names = "default";
  91                         pinctrl-0 = <&pinctrl_uart0>;
  92                         clocks = <&peri_clk 0>;
  93                         resets = <&peri_rst 0>;
  94                 };
  95
  96                 serial1: serial@54006900 {
  97                         compatible = "socionext,uniphier-uart";
  98                         status = "disabled";
  99                         reg = <0x54006900 0x40>;
 100                         interrupts = <0 35 4>;
 101                         pinctrl-names = "default";
 102                         pinctrl-0 = <&pinctrl_uart1>;
 103                         clocks = <&peri_clk 1>;
 104                         resets = <&peri_rst 1>;
 105                 };
 106
 107                 serial2: serial@54006a00 {
 108                         compatible = "socionext,uniphier-uart";
 109                         status = "disabled";
 110                         reg = <0x54006a00 0x40>;
 111                         interrupts = <0 37 4>;
 112                         pinctrl-names = "default";
 113                         pinctrl-0 = <&pinctrl_uart2>;
 114                         clocks = <&peri_clk 2>;
 115                         resets = <&peri_rst 2>;
 116                 };
 117
 118                 serial3: serial@54006b00 {
 119                         compatible = "socionext,uniphier-uart";
 120                         status = "disabled";
 121                         reg = <0x54006b00 0x40>;
 122                         interrupts = <0 177 4>;
 123                         pinctrl-names = "default";
 124                         pinctrl-0 = <&pinctrl_uart3>;
 125                         clocks = <&peri_clk 3>;
 126                         resets = <&peri_rst 3>;
 127                 };
 128
 129                 gpio: gpio@55000000 {
 130                         compatible = "socionext,uniphier-gpio";
 131                         reg = <0x55000000 0x200>;
 132                         interrupt-parent = <&aidet>;
 133                         interrupt-controller;
 134                         #interrupt-cells = <2>;
 135                         gpio-controller;
 136                         #gpio-cells = <2>;
 137                         gpio-ranges = <&pinctrl 0 0 0>;
 138                         gpio-ranges-group-names = "gpio_range";
 139                         ngpios = <248>;
 140                         socionext,interrupt-ranges = <0 48 16>, <16 154 5>;
 141                 };
 142
 143                 i2c0: i2c@58780000 {
 144                         compatible = "socionext,uniphier-fi2c";
 145                         status = "disabled";
 146                         reg = <0x58780000 0x80>;
 147                         #address-cells = <1>;
 148                         #size-cells = <0>;
 149                         interrupts = <0 41 4>;
 150                         pinctrl-names = "default";
 151                         pinctrl-0 = <&pinctrl_i2c0>;
 152                         clocks = <&peri_clk 4>;
 153                         resets = <&peri_rst 4>;
 154                         clock-frequency = <100000>;
 155                 };
 156
 157                 i2c1: i2c@58781000 {
 158                         compatible = "socionext,uniphier-fi2c";
 159                         status = "disabled";
 160                         reg = <0x58781000 0x80>;
 161                         #address-cells = <1>;
 162                         #size-cells = <0>;
 163                         interrupts = <0 42 4>;
 164                         pinctrl-names = "default";
 165                         pinctrl-0 = <&pinctrl_i2c1>;
 166                         clocks = <&peri_clk 5>;
 167                         resets = <&peri_rst 5>;
 168                         clock-frequency = <100000>;
 169                 };
 170
 171                 i2c2: i2c@58782000 {
 172                         compatible = "socionext,uniphier-fi2c";
 173                         status = "disabled";
 174                         reg = <0x58782000 0x80>;
 175                         #address-cells = <1>;
 176                         #size-cells = <0>;
 177                         interrupts = <0 43 4>;
 178                         pinctrl-names = "default";
 179                         pinctrl-0 = <&pinctrl_i2c2>;
 180                         clocks = <&peri_clk 6>;
 181                         resets = <&peri_rst 6>;
 182                         clock-frequency = <100000>;
 183                 };
 184
 185                 i2c3: i2c@58783000 {
 186                         compatible = "socionext,uniphier-fi2c";
 187                         status = "disabled";
 188                         reg = <0x58783000 0x80>;
 189                         #address-cells = <1>;
 190                         #size-cells = <0>;
 191                         interrupts = <0 44 4>;
 192                         pinctrl-names = "default";
 193                         pinctrl-0 = <&pinctrl_i2c3>;
 194                         clocks = <&peri_clk 7>;
 195                         resets = <&peri_rst 7>;
 196                         clock-frequency = <100000>;
 197                 };
 198
 199                 /* i2c4 does not exist */
 200
 201                 /* chip-internal connection for DMD */
 202                 i2c5: i2c@58785000 {
 203                         compatible = "socionext,uniphier-fi2c";
 204                         reg = <0x58785000 0x80>;
 205                         #address-cells = <1>;
 206                         #size-cells = <0>;
 207                         interrupts = <0 25 4>;
 208                         clocks = <&peri_clk 9>;
 209                         resets = <&peri_rst 9>;
 210                         clock-frequency = <400000>;
 211                 };
 212
 213                 /* chip-internal connection for HDMI */
 214                 i2c6: i2c@58786000 {
 215                         compatible = "socionext,uniphier-fi2c";
 216                         reg = <0x58786000 0x80>;
 217                         #address-cells = <1>;
 218                         #size-cells = <0>;
 219                         interrupts = <0 26 4>;
 220                         clocks = <&peri_clk 10>;
 221                         resets = <&peri_rst 10>;
 222                         clock-frequency = <400000>;
 223                 };
 224
 225                 system_bus: system-bus@58c00000 {
 226                         compatible = "socionext,uniphier-system-bus";
 227                         status = "disabled";
 228                         reg = <0x58c00000 0x400>;
 229                         #address-cells = <2>;
 230                         #size-cells = <1>;
 231                         pinctrl-names = "default";
 232                         pinctrl-0 = <&pinctrl_system_bus>;
 233                 };
 234
 235                 smpctrl@59801000 {
 236                         compatible = "socionext,uniphier-smpctrl";
 237                         reg = <0x59801000 0x400>;
 238                 };
 239
 240                 mioctrl@59810000 {
 241                         compatible = "socionext,uniphier-pro4-mioctrl",
 242                                      "simple-mfd", "syscon";
 243                         reg = <0x59810000 0x800>;
 244
 245                         mio_clk: clock {
 246                                 compatible = "socionext,uniphier-pro4-mio-clock";
 247                                 #clock-cells = <1>;
 248                         };
 249
 250                         mio_rst: reset {
 251                                 compatible = "socionext,uniphier-pro4-mio-reset";
 252                                 #reset-cells = <1>;
 253                         };
 254                 };
 255
 256                 perictrl@59820000 {
 257                         compatible = "socionext,uniphier-pro4-perictrl",
 258                                      "simple-mfd", "syscon";
 259                         reg = <0x59820000 0x200>;
 260
 261                         peri_clk: clock {
 262                                 compatible = "socionext,uniphier-pro4-peri-clock";
 263                                 #clock-cells = <1>;
 264                         };
 265
 266                         peri_rst: reset {
 267                                 compatible = "socionext,uniphier-pro4-peri-reset";
 268                                 #reset-cells = <1>;
 269                         };
 270                 };
 271
 272                 sd: sdhc@5a400000 {
 273                         compatible = "socionext,uniphier-sd-v2.91";
 274                         status = "disabled";
 275                         reg = <0x5a400000 0x200>;
 276                         interrupts = <0 76 4>;
 277                         pinctrl-names = "default", "uhs";
 278                         pinctrl-0 = <&pinctrl_sd>;
 279                         pinctrl-1 = <&pinctrl_sd_uhs>;
 280                         clocks = <&mio_clk 0>;
 281                         reset-names = "host", "bridge";
 282                         resets = <&mio_rst 0>, <&mio_rst 3>;
 283                         bus-width = <4>;
 284                         cap-sd-highspeed;
 285                         sd-uhs-sdr12;
 286                         sd-uhs-sdr25;
 287                         sd-uhs-sdr50;
 288                 };
 289
 290                 emmc: sdhc@5a500000 {
 291                         compatible = "socionext,uniphier-sd-v2.91";
 292                         status = "disabled";
 293                         reg = <0x5a500000 0x200>;
 294                         interrupts = <0 78 4>;
 295                         pinctrl-names = "default";
 296                         pinctrl-0 = <&pinctrl_emmc>;
 297                         clocks = <&mio_clk 1>;
 298                         reset-names = "host", "bridge", "hw";
 299                         resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
 300                         bus-width = <8>;
 301                         cap-mmc-highspeed;
 302                         cap-mmc-hw-reset;
 303                         non-removable;
 304                 };
 305
 306                 sd1: sdhc@5a600000 {
 307                         compatible = "socionext,uniphier-sd-v2.91";
 308                         status = "disabled";
 309                         reg = <0x5a600000 0x200>;
 310                         interrupts = <0 85 4>;
 311                         pinctrl-names = "default";
 312                         pinctrl-0 = <&pinctrl_sd1>;
 313                         clocks = <&mio_clk 2>;
 314                         reset-names = "host", "bridge";
 315                         resets = <&mio_rst 2>, <&mio_rst 5>;
 316                         bus-width = <4>;
 317                         cap-sd-highspeed;
 318                 };
 319
 320                 usb2: usb@5a800100 {
 321                         compatible = "socionext,uniphier-ehci", "generic-ehci";
 322                         status = "disabled";
 323                         reg = <0x5a800100 0x100>;
 324                         interrupts = <0 80 4>;
 325                         pinctrl-names = "default";
 326                         pinctrl-0 = <&pinctrl_usb2>;
 327                         clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
 328                                  <&mio_clk 12>;
 329                         resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
 330                                  <&mio_rst 12>;
 331                         phy-names = "usb";
 332                         phys = <&usb_phy0>;
 333                         has-transaction-translator;
 334                 };
 335
 336                 usb3: usb@5a810100 {
 337                         compatible = "socionext,uniphier-ehci", "generic-ehci";
 338                         status = "disabled";
 339                         reg = <0x5a810100 0x100>;
 340                         interrupts = <0 81 4>;
 341                         pinctrl-names = "default";
 342                         pinctrl-0 = <&pinctrl_usb3>;
 343                         clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
 344                                  <&mio_clk 13>;
 345                         resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
 346                                  <&mio_rst 13>;
 347                         phy-names = "usb";
 348                         phys = <&usb_phy1>;
 349                         has-transaction-translator;
 350                 };
 351
 352                 soc_glue: soc-glue@5f800000 {
 353                         compatible = "socionext,uniphier-pro4-soc-glue",
 354                                      "simple-mfd", "syscon";
 355                         reg = <0x5f800000 0x2000>;
 356
 357                         pinctrl: pinctrl {
 358                                 compatible = "socionext,uniphier-pro4-pinctrl";
 359                         };
 360
 361                         usb-phy {
 362                                 compatible = "socionext,uniphier-pro4-usb2-phy";
 363                                 #address-cells = <1>;
 364                                 #size-cells = <0>;
 365
 366                                 usb_phy0: phy@0 {
 367                                         reg = <0>;
 368                                         #phy-cells = <0>;
 369                                 };
 370
 371                                 usb_phy1: phy@1 {
 372                                         reg = <1>;
 373                                         #phy-cells = <0>;
 374                                 };
 375
 376                                 usb_phy2: phy@2 {
 377                                         reg = <2>;
 378                                         #phy-cells = <0>;
 379                                         vbus-supply = <&usb0_vbus>;
 380                                 };
 381
 382                                 usb_phy3: phy@3 {
 383                                         reg = <3>;
 384                                         #phy-cells = <0>;
 385                                         vbus-supply = <&usb1_vbus>;
 386                                 };
 387                         };
 388                 };
 389
 390                 soc-glue@5f900000 {
 391                         compatible = "socionext,uniphier-pro4-soc-glue-debug",
 392                                      "simple-mfd";
 393                         #address-cells = <1>;
 394                         #size-cells = <1>;
 395                         ranges = <0 0x5f900000 0x2000>;
 396
 397                         efuse@100 {
 398                                 compatible = "socionext,uniphier-efuse";
 399                                 reg = <0x100 0x28>;
 400                         };
 401
 402                         efuse@130 {
 403                                 compatible = "socionext,uniphier-efuse";
 404                                 reg = <0x130 0x8>;
 405                         };
 406
 407                         efuse@200 {
 408                                 compatible = "socionext,uniphier-efuse";
 409                                 reg = <0x200 0x14>;
 410                         };
 411                 };
 412
 413                 aidet: aidet@5fc20000 {
 414                         compatible = "socionext,uniphier-pro4-aidet";
 415                         reg = <0x5fc20000 0x200>;
 416                         interrupt-controller;
 417                         #interrupt-cells = <2>;
 418                 };
 419
 420                 timer@60000200 {
 421                         compatible = "arm,cortex-a9-global-timer";
 422                         reg = <0x60000200 0x20>;
 423                         interrupts = <1 11 0x304>;
 424                         clocks = <&arm_timer_clk>;
 425                 };
 426
 427                 timer@60000600 {
 428                         compatible = "arm,cortex-a9-twd-timer";
 429                         reg = <0x60000600 0x20>;
 430                         interrupts = <1 13 0x304>;
 431                         clocks = <&arm_timer_clk>;
 432                 };
 433
 434                 intc: interrupt-controller@60001000 {
 435                         compatible = "arm,cortex-a9-gic";
 436                         reg = <0x60001000 0x1000>,
 437                               <0x60000100 0x100>;
 438                         #interrupt-cells = <3>;
 439                         interrupt-controller;
 440                 };
 441
 442                 sysctrl@61840000 {
 443                         compatible = "socionext,uniphier-pro4-sysctrl",
 444                                      "simple-mfd", "syscon";
 445                         reg = <0x61840000 0x10000>;
 446
 447                         sys_clk: clock {
 448                                 compatible = "socionext,uniphier-pro4-clock";
 449                                 #clock-cells = <1>;
 450                         };
 451
 452                         sys_rst: reset {
 453                                 compatible = "socionext,uniphier-pro4-reset";
 454                                 #reset-cells = <1>;
 455                         };
 456                 };
 457
 458                 eth: ethernet@65000000 {
 459                         compatible = "socionext,uniphier-pro4-ave4";
 460                         status = "disabled";
 461                         reg = <0x65000000 0x8500>;
 462                         interrupts = <0 66 4>;
 463                         pinctrl-names = "default";
 464                         pinctrl-0 = <&pinctrl_ether_rgmii>;
 465                         clock-names = "gio", "ether", "ether-gb", "ether-phy";
 466                         clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>,
 467                                  <&sys_clk 10>;
 468                         reset-names = "gio", "ether";
 469                         resets = <&sys_rst 12>, <&sys_rst 6>;
 470                         phy-mode = "rgmii";
 471                         local-mac-address = [00 00 00 00 00 00];
 472                         socionext,syscon-phy-mode = <&soc_glue 0>;
 473
 474                         mdio: mdio {
 475                                 #address-cells = <1>;
 476                                 #size-cells = <0>;
 477                         };
 478                 };
 479
 480                 usb0: usb@65a00000 {
 481                         compatible = "socionext,uniphier-dwc3", "snps,dwc3";
 482                         status = "disabled";
 483                         reg = <0x65a00000 0xcd00>;
 484                         interrupt-names = "host", "peripheral";
 485                         interrupts = <0 134 4>, <0 135 4>;
 486                         pinctrl-names = "default";
 487                         pinctrl-0 = <&pinctrl_usb0>;
 488                         clock-names = "ref", "bus_early", "suspend";
 489                         clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
 490                         resets = <&usb0_rst 4>;
 491                         phys = <&usb_phy2>, <&usb0_ssphy>;
 492                         dr_mode = "host";
 493                 };
 494
 495                 usb-glue@65b00000 {
 496                         compatible = "socionext,uniphier-pro4-dwc3-glue",
 497                                      "simple-mfd";
 498                         #address-cells = <1>;
 499                         #size-cells = <1>;
 500                         ranges = <0 0x65b00000 0x100>;
 501
 502                         usb0_vbus: regulator@0 {
 503                                 compatible = "socionext,uniphier-pro4-usb3-regulator";
 504                                 reg = <0 0x10>;
 505                                 clock-names = "gio", "link";
 506                                 clocks = <&sys_clk 12>, <&sys_clk 14>;
 507                                 reset-names = "gio", "link";
 508                                 resets = <&sys_rst 12>, <&sys_rst 14>;
 509                         };
 510
 511                         usb0_ssphy: ss-phy@10 {
 512                                 compatible = "socionext,uniphier-pro4-usb3-ssphy";
 513                                 reg = <0x10 0x10>;
 514                                 #phy-cells = <0>;
 515                                 clock-names = "gio", "link";
 516                                 clocks = <&sys_clk 12>, <&sys_clk 14>;
 517                                 reset-names = "gio", "link";
 518                                 resets = <&sys_rst 12>, <&sys_rst 14>;
 519                                 vbus-supply = <&usb0_vbus>;
 520                         };
 521
 522                         usb0_rst: reset@40 {
 523                                 compatible = "socionext,uniphier-pro4-usb3-reset";
 524                                 reg = <0x40 0x4>;
 525                                 #reset-cells = <1>;
 526                                 clock-names = "gio", "link";
 527                                 clocks = <&sys_clk 12>, <&sys_clk 14>;
 528                                 reset-names = "gio", "link";
 529                                 resets = <&sys_rst 12>, <&sys_rst 14>;
 530                         };
 531                 };
 532
 533                 usb1: usb@65c00000 {
 534                         compatible = "socionext,uniphier-dwc3", "snps,dwc3";
 535                         status = "disabled";
 536                         reg = <0x65c00000 0xcd00>;
 537                         interrupt-names = "host", "peripheral";
 538                         interrupts = <0 137 4>, <0 138 4>;
 539                         pinctrl-names = "default";
 540                         pinctrl-0 = <&pinctrl_usb1>;
 541                         clock-names = "ref", "bus_early", "suspend";
 542                         clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
 543                         resets = <&usb1_rst 4>;
 544                         phys = <&usb_phy3>;
 545                         dr_mode = "host";
 546                 };
 547
 548                 usb-glue@65d00000 {
 549                         compatible = "socionext,uniphier-pro4-dwc3-glue",
 550                                      "simple-mfd";
 551                         #address-cells = <1>;
 552                         #size-cells = <1>;
 553                         ranges = <0 0x65d00000 0x100>;
 554
 555                         usb1_vbus: regulator@0 {
 556                                 compatible = "socionext,uniphier-pro4-usb3-regulator";
 557                                 reg = <0 0x10>;
 558                                 clock-names = "gio", "link";
 559                                 clocks = <&sys_clk 12>, <&sys_clk 15>;
 560                                 reset-names = "gio", "link";
 561                                 resets = <&sys_rst 12>, <&sys_rst 15>;
 562                         };
 563
 564                         usb1_rst: reset@40 {
 565                                 compatible = "socionext,uniphier-pro4-usb3-reset";
 566                                 reg = <0x40 0x4>;
 567                                 #reset-cells = <1>;
 568                                 clock-names = "gio", "link";
 569                                 clocks = <&sys_clk 12>, <&sys_clk 15>;
 570                                 reset-names = "gio", "link";
 571                                 resets = <&sys_rst 12>, <&sys_rst 15>;
 572                         };
 573                 };
 574
 575                 nand: nand@68000000 {
 576                         compatible = "socionext,uniphier-denali-nand-v5a";
 577                         status = "disabled";
 578                         reg-names = "nand_data", "denali_reg";
 579                         reg = <0x68000000 0x20>, <0x68100000 0x1000>;
 580                         interrupts = <0 65 4>;
 581                         pinctrl-names = "default";
 582                         pinctrl-0 = <&pinctrl_nand>;
 583                         clock-names = "nand", "nand_x", "ecc";
 584                         clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
 585                         resets = <&sys_rst 2>;
 586                 };
 587         };
 588 };
 589
 590 #include "uniphier-pinctrl.dtsi"