arch/arm/boot/dts/tegra20-harmony.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra20.dtsi"
   5
   6 / {
   7         model = "NVIDIA Tegra20 Harmony evaluation board";
   8         compatible = "nvidia,harmony", "nvidia,tegra20";
   9
  10         aliases {
  11                 rtc0 = "/i2c@7000d000/tps6586x@34";
  12                 rtc1 = "/rtc@7000e000";
  13                 serial0 = &uartd;
  14         };
  15
  16         chosen {
  17                 stdout-path = "serial0:115200n8";
  18         };
  19
  20         memory {
  21                 reg = <0x00000000 0x40000000>;
  22         };
  23
  24         host1x@50000000 {
  25                 dc@54200000 {
  26                         rgb {
  27                                 status = "okay";
  28
  29                                 nvidia,panel = <&panel>;
  30                         };
  31                 };
  32
  33                 hdmi@54280000 {
  34                         status = "okay";
  35
  36                         hdmi-supply = <&vdd_5v0_hdmi>;
  37                         vdd-supply = <&hdmi_vdd_reg>;
  38                         pll-supply = <&hdmi_pll_reg>;
  39
  40                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  41                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  42                                 GPIO_ACTIVE_HIGH>;
  43                 };
  44         };
  45
  46         pinmux@70000014 {
  47                 pinctrl-names = "default";
  48                 pinctrl-0 = <&state_default>;
  49
  50                 state_default: pinmux {
  51                         ata {
  52                                 nvidia,pins = "ata";
  53                                 nvidia,function = "ide";
  54                         };
  55                         atb {
  56                                 nvidia,pins = "atb", "gma", "gme";
  57                                 nvidia,function = "sdio4";
  58                         };
  59                         atc {
  60                                 nvidia,pins = "atc";
  61                                 nvidia,function = "nand";
  62                         };
  63                         atd {
  64                                 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
  65                                         "spia", "spib", "spic";
  66                                 nvidia,function = "gmi";
  67                         };
  68                         cdev1 {
  69                                 nvidia,pins = "cdev1";
  70                                 nvidia,function = "plla_out";
  71                         };
  72                         cdev2 {
  73                                 nvidia,pins = "cdev2";
  74                                 nvidia,function = "pllp_out4";
  75                         };
  76                         crtp {
  77                                 nvidia,pins = "crtp";
  78                                 nvidia,function = "crt";
  79                         };
  80                         csus {
  81                                 nvidia,pins = "csus";
  82                                 nvidia,function = "vi_sensor_clk";
  83                         };
  84                         dap1 {
  85                                 nvidia,pins = "dap1";
  86                                 nvidia,function = "dap1";
  87                         };
  88                         dap2 {
  89                                 nvidia,pins = "dap2";
  90                                 nvidia,function = "dap2";
  91                         };
  92                         dap3 {
  93                                 nvidia,pins = "dap3";
  94                                 nvidia,function = "dap3";
  95                         };
  96                         dap4 {
  97                                 nvidia,pins = "dap4";
  98                                 nvidia,function = "dap4";
  99                         };
 100                         ddc {
 101                                 nvidia,pins = "ddc";
 102                                 nvidia,function = "i2c2";
 103                         };
 104                         dta {
 105                                 nvidia,pins = "dta", "dtd";
 106                                 nvidia,function = "sdio2";
 107                         };
 108                         dtb {
 109                                 nvidia,pins = "dtb", "dtc", "dte";
 110                                 nvidia,function = "rsvd1";
 111                         };
 112                         dtf {
 113                                 nvidia,pins = "dtf";
 114                                 nvidia,function = "i2c3";
 115                         };
 116                         gmc {
 117                                 nvidia,pins = "gmc";
 118                                 nvidia,function = "uartd";
 119                         };
 120                         gpu7 {
 121                                 nvidia,pins = "gpu7";
 122                                 nvidia,function = "rtck";
 123                         };
 124                         gpv {
 125                                 nvidia,pins = "gpv", "slxa", "slxk";
 126                                 nvidia,function = "pcie";
 127                         };
 128                         hdint {
 129                                 nvidia,pins = "hdint", "pta";
 130                                 nvidia,function = "hdmi";
 131                         };
 132                         i2cp {
 133                                 nvidia,pins = "i2cp";
 134                                 nvidia,function = "i2cp";
 135                         };
 136                         irrx {
 137                                 nvidia,pins = "irrx", "irtx";
 138                                 nvidia,function = "uarta";
 139                         };
 140                         kbca {
 141                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 142                                         "kbce", "kbcf";
 143                                 nvidia,function = "kbc";
 144                         };
 145                         lcsn {
 146                                 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
 147                                         "ld3", "ld4", "ld5", "ld6", "ld7",
 148                                         "ld8", "ld9", "ld10", "ld11", "ld12",
 149                                         "ld13", "ld14", "ld15", "ld16", "ld17",
 150                                         "ldc", "ldi", "lhp0", "lhp1", "lhp2",
 151                                         "lhs", "lm0", "lm1", "lpp", "lpw0",
 152                                         "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
 153                                         "lsda", "lsdi", "lspi", "lvp0", "lvp1",
 154                                         "lvs";
 155                                 nvidia,function = "displaya";
 156                         };
 157                         owc {
 158                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
 159                                 nvidia,function = "rsvd2";
 160                         };
 161                         pmc {
 162                                 nvidia,pins = "pmc";
 163                                 nvidia,function = "pwr_on";
 164                         };
 165                         rm {
 166                                 nvidia,pins = "rm";
 167                                 nvidia,function = "i2c1";
 168                         };
 169                         sdb {
 170                                 nvidia,pins = "sdb", "sdc", "sdd";
 171                                 nvidia,function = "pwm";
 172                         };
 173                         sdio1 {
 174                                 nvidia,pins = "sdio1";
 175                                 nvidia,function = "sdio1";
 176                         };
 177                         slxc {
 178                                 nvidia,pins = "slxc", "slxd";
 179                                 nvidia,function = "spdif";
 180                         };
 181                         spid {
 182                                 nvidia,pins = "spid", "spie", "spif";
 183                                 nvidia,function = "spi1";
 184                         };
 185                         spig {
 186                                 nvidia,pins = "spig", "spih";
 187                                 nvidia,function = "spi2_alt";
 188                         };
 189                         uaa {
 190                                 nvidia,pins = "uaa", "uab", "uda";
 191                                 nvidia,function = "ulpi";
 192                         };
 193                         uad {
 194                                 nvidia,pins = "uad";
 195                                 nvidia,function = "irda";
 196                         };
 197                         uca {
 198                                 nvidia,pins = "uca", "ucb";
 199                                 nvidia,function = "uartc";
 200                         };
 201                         conf_ata {
 202                                 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
 203                                         "cdev1", "cdev2", "dap1", "dtb", "gma",
 204                                         "gmb", "gmc", "gmd", "gme", "gpu7",
 205                                         "gpv", "i2cp", "pta", "rm", "slxa",
 206                                         "slxk", "spia", "spib", "uac";
 207                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 208                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 209                         };
 210                         conf_ck32 {
 211                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 212                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 213                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 214                         };
 215                         conf_csus {
 216                                 nvidia,pins = "csus", "spid", "spif";
 217                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 218                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 219                         };
 220                         conf_crtp {
 221                                 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
 222                                         "dtc", "dte", "dtf", "gpu", "sdio1",
 223                                         "slxc", "slxd", "spdi", "spdo", "spig",
 224                                         "uda";
 225                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 226                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 227                         };
 228                         conf_ddc {
 229                                 nvidia,pins = "ddc", "dta", "dtd", "kbca",
 230                                         "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
 231                                         "sdc";
 232                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 233                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 234                         };
 235                         conf_hdint {
 236                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 237                                         "lpw1", "lsc1", "lsck", "lsda", "lsdi",
 238                                         "lvp0", "owc", "sdb";
 239                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 240                         };
 241                         conf_irrx {
 242                                 nvidia,pins = "irrx", "irtx", "sdd", "spic",
 243                                         "spie", "spih", "uaa", "uab", "uad",
 244                                         "uca", "ucb";
 245                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 246                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 247                         };
 248                         conf_lc {
 249                                 nvidia,pins = "lc", "ls";
 250                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 251                         };
 252                         conf_ld0 {
 253                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 254                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 255                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 256                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 257                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 258                                         "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
 259                                         "lvs", "pmc";
 260                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 261                         };
 262                         conf_ld17_0 {
 263                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 264                                         "ld23_22";
 265                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 266                         };
 267                 };
 268         };
 269
 270         i2s@70002800 {
 271                 status = "okay";
 272         };
 273
 274         serial@70006300 {
 275                 status = "okay";
 276         };
 277
 278         pwm: pwm@7000a000 {
 279                 status = "okay";
 280         };
 281
 282         i2c@7000c000 {
 283                 status = "okay";
 284                 clock-frequency = <400000>;
 285
 286                 wm8903: wm8903@1a {
 287                         compatible = "wlf,wm8903";
 288                         reg = <0x1a>;
 289                         interrupt-parent = <&gpio>;
 290                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
 291
 292                         gpio-controller;
 293                         #gpio-cells = <2>;
 294
 295                         micdet-cfg = <0>;
 296                         micdet-delay = <100>;
 297                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 298                 };
 299         };
 300
 301         hdmi_ddc: i2c@7000c400 {
 302                 status = "okay";
 303                 clock-frequency = <100000>;
 304         };
 305
 306         i2c@7000c500 {
 307                 status = "okay";
 308                 clock-frequency = <400000>;
 309         };
 310
 311         i2c@7000d000 {
 312                 status = "okay";
 313                 clock-frequency = <400000>;
 314
 315                 pmic: tps6586x@34 {
 316                         compatible = "ti,tps6586x";
 317                         reg = <0x34>;
 318                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 319
 320                         ti,system-power-controller;
 321
 322                         #gpio-cells = <2>;
 323                         gpio-controller;
 324
 325                         sys-supply = <&vdd_5v0_reg>;
 326                         vin-sm0-supply = <&sys_reg>;
 327                         vin-sm1-supply = <&sys_reg>;
 328                         vin-sm2-supply = <&sys_reg>;
 329                         vinldo01-supply = <&sm2_reg>;
 330                         vinldo23-supply = <&sm2_reg>;
 331                         vinldo4-supply = <&sm2_reg>;
 332                         vinldo678-supply = <&sm2_reg>;
 333                         vinldo9-supply = <&sm2_reg>;
 334
 335                         regulators {
 336                                 sys_reg: sys {
 337                                         regulator-name = "vdd_sys";
 338                                         regulator-always-on;
 339                                 };
 340
 341                                 sm0 {
 342                                         regulator-name = "vdd_sm0,vdd_core";
 343                                         regulator-min-microvolt = <1200000>;
 344                                         regulator-max-microvolt = <1200000>;
 345                                         regulator-always-on;
 346                                 };
 347
 348                                 sm1 {
 349                                         regulator-name = "vdd_sm1,vdd_cpu";
 350                                         regulator-min-microvolt = <1000000>;
 351                                         regulator-max-microvolt = <1000000>;
 352                                         regulator-always-on;
 353                                 };
 354
 355                                 sm2_reg: sm2 {
 356                                         regulator-name = "vdd_sm2,vin_ldo*";
 357                                         regulator-min-microvolt = <3700000>;
 358                                         regulator-max-microvolt = <3700000>;
 359                                         regulator-always-on;
 360                                 };
 361
 362                                 pci_clk_reg: ldo0 {
 363                                         regulator-name = "vdd_ldo0,vddio_pex_clk";
 364                                         regulator-min-microvolt = <3300000>;
 365                                         regulator-max-microvolt = <3300000>;
 366                                 };
 367
 368                                 ldo1 {
 369                                         regulator-name = "vdd_ldo1,avdd_pll*";
 370                                         regulator-min-microvolt = <1100000>;
 371                                         regulator-max-microvolt = <1100000>;
 372                                         regulator-always-on;
 373                                 };
 374
 375                                 ldo2 {
 376                                         regulator-name = "vdd_ldo2,vdd_rtc";
 377                                         regulator-min-microvolt = <1200000>;
 378                                         regulator-max-microvolt = <1200000>;
 379                                 };
 380
 381                                 ldo3 {
 382                                         regulator-name = "vdd_ldo3,avdd_usb*";
 383                                         regulator-min-microvolt = <3300000>;
 384                                         regulator-max-microvolt = <3300000>;
 385                                         regulator-always-on;
 386                                 };
 387
 388                                 ldo4 {
 389                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 390                                         regulator-min-microvolt = <1800000>;
 391                                         regulator-max-microvolt = <1800000>;
 392                                         regulator-always-on;
 393                                 };
 394
 395                                 ldo5 {
 396                                         regulator-name = "vdd_ldo5,vcore_mmc";
 397                                         regulator-min-microvolt = <2850000>;
 398                                         regulator-max-microvolt = <2850000>;
 399                                         regulator-always-on;
 400                                 };
 401
 402                                 ldo6 {
 403                                         regulator-name = "vdd_ldo6,avdd_vdac";
 404                                         regulator-min-microvolt = <1800000>;
 405                                         regulator-max-microvolt = <1800000>;
 406                                 };
 407
 408                                 hdmi_vdd_reg: ldo7 {
 409                                         regulator-name = "vdd_ldo7,avdd_hdmi";
 410                                         regulator-min-microvolt = <3300000>;
 411                                         regulator-max-microvolt = <3300000>;
 412                                 };
 413
 414                                 hdmi_pll_reg: ldo8 {
 415                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 416                                         regulator-min-microvolt = <1800000>;
 417                                         regulator-max-microvolt = <1800000>;
 418                                 };
 419
 420                                 ldo9 {
 421                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 422                                         regulator-min-microvolt = <2850000>;
 423                                         regulator-max-microvolt = <2850000>;
 424                                         regulator-always-on;
 425                                 };
 426
 427                                 ldo_rtc {
 428                                         regulator-name = "vdd_rtc_out,vdd_cell";
 429                                         regulator-min-microvolt = <3300000>;
 430                                         regulator-max-microvolt = <3300000>;
 431                                         regulator-always-on;
 432                                 };
 433                         };
 434                 };
 435
 436                 temperature-sensor@4c {
 437                         compatible = "adi,adt7461";
 438                         reg = <0x4c>;
 439                 };
 440         };
 441
 442         kbc@7000e200 {
 443                 status = "okay";
 444                 nvidia,debounce-delay-ms = <2>;
 445                 nvidia,repeat-delay-ms = <160>;
 446                 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
 447                 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
 448                 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
 449                                 MATRIX_KEY(0x00, 0x03, KEY_S)
 450                                 MATRIX_KEY(0x00, 0x04, KEY_A)
 451                                 MATRIX_KEY(0x00, 0x05, KEY_Z)
 452                                 MATRIX_KEY(0x00, 0x07, KEY_FN)
 453                                 MATRIX_KEY(0x01, 0x07, KEY_MENU)
 454                                 MATRIX_KEY(0x02, 0x06, KEY_LEFTALT)
 455                                 MATRIX_KEY(0x02, 0x07, KEY_RIGHTALT)
 456                                 MATRIX_KEY(0x03, 0x00, KEY_5)
 457                                 MATRIX_KEY(0x03, 0x01, KEY_4)
 458                                 MATRIX_KEY(0x03, 0x02, KEY_R)
 459                                 MATRIX_KEY(0x03, 0x03, KEY_E)
 460                                 MATRIX_KEY(0x03, 0x04, KEY_F)
 461                                 MATRIX_KEY(0x03, 0x05, KEY_D)
 462                                 MATRIX_KEY(0x03, 0x06, KEY_X)
 463                                 MATRIX_KEY(0x04, 0x00, KEY_7)
 464                                 MATRIX_KEY(0x04, 0x01, KEY_6)
 465                                 MATRIX_KEY(0x04, 0x02, KEY_T)
 466                                 MATRIX_KEY(0x04, 0x03, KEY_H)
 467                                 MATRIX_KEY(0x04, 0x04, KEY_G)
 468                                 MATRIX_KEY(0x04, 0x05, KEY_V)
 469                                 MATRIX_KEY(0x04, 0x06, KEY_C)
 470                                 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
 471                                 MATRIX_KEY(0x05, 0x00, KEY_9)
 472                                 MATRIX_KEY(0x05, 0x01, KEY_8)
 473                                 MATRIX_KEY(0x05, 0x02, KEY_U)
 474                                 MATRIX_KEY(0x05, 0x03, KEY_Y)
 475                                 MATRIX_KEY(0x05, 0x04, KEY_J)
 476                                 MATRIX_KEY(0x05, 0x05, KEY_N)
 477                                 MATRIX_KEY(0x05, 0x06, KEY_B)
 478                                 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
 479                                 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
 480                                 MATRIX_KEY(0x06, 0x01, KEY_0)
 481                                 MATRIX_KEY(0x06, 0x02, KEY_O)
 482                                 MATRIX_KEY(0x06, 0x03, KEY_I)
 483                                 MATRIX_KEY(0x06, 0x04, KEY_L)
 484                                 MATRIX_KEY(0x06, 0x05, KEY_K)
 485                                 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
 486                                 MATRIX_KEY(0x06, 0x07, KEY_M)
 487                                 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
 488                                 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
 489                                 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
 490                                 MATRIX_KEY(0x07, 0x07, KEY_MENU)
 491                                 MATRIX_KEY(0x08, 0x04, KEY_LEFTSHIFT)
 492                                 MATRIX_KEY(0x08, 0x05, KEY_RIGHTSHIFT)
 493                                 MATRIX_KEY(0x09, 0x05, KEY_LEFTCTRL)
 494                                 MATRIX_KEY(0x09, 0x07, KEY_RIGHTCTRL)
 495                                 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
 496                                 MATRIX_KEY(0x0B, 0x01, KEY_P)
 497                                 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
 498                                 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
 499                                 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
 500                                 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
 501                                 MATRIX_KEY(0x0C, 0x00, KEY_F10)
 502                                 MATRIX_KEY(0x0C, 0x01, KEY_F9)
 503                                 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
 504                                 MATRIX_KEY(0x0C, 0x03, KEY_3)
 505                                 MATRIX_KEY(0x0C, 0x04, KEY_2)
 506                                 MATRIX_KEY(0x0C, 0x05, KEY_UP)
 507                                 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
 508                                 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
 509                                 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
 510                                 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
 511                                 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
 512                                 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
 513                                 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
 514                                 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
 515                                 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
 516                                 MATRIX_KEY(0x0E, 0x00, KEY_F11)
 517                                 MATRIX_KEY(0x0E, 0x01, KEY_F12)
 518                                 MATRIX_KEY(0x0E, 0x02, KEY_F8)
 519                                 MATRIX_KEY(0x0E, 0x03, KEY_Q)
 520                                 MATRIX_KEY(0x0E, 0x04, KEY_F4)
 521                                 MATRIX_KEY(0x0E, 0x05, KEY_F3)
 522                                 MATRIX_KEY(0x0E, 0x06, KEY_1)
 523                                 MATRIX_KEY(0x0E, 0x07, KEY_F7)
 524                                 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
 525                                 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
 526                                 MATRIX_KEY(0x0F, 0x02, KEY_F5)
 527                                 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
 528                                 MATRIX_KEY(0x0F, 0x04, KEY_F1)
 529                                 MATRIX_KEY(0x0F, 0x05, KEY_F2)
 530                                 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
 531                                 MATRIX_KEY(0x0F, 0x07, KEY_F6)
 532                                 MATRIX_KEY(0x14, 0x00, KEY_KP7)
 533                                 MATRIX_KEY(0x15, 0x00, KEY_KP9)
 534                                 MATRIX_KEY(0x15, 0x01, KEY_KP8)
 535                                 MATRIX_KEY(0x15, 0x02, KEY_KP4)
 536                                 MATRIX_KEY(0x15, 0x04, KEY_KP1)
 537                                 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
 538                                 MATRIX_KEY(0x16, 0x02, KEY_KP6)
 539                                 MATRIX_KEY(0x16, 0x03, KEY_KP5)
 540                                 MATRIX_KEY(0x16, 0x04, KEY_KP3)
 541                                 MATRIX_KEY(0x16, 0x05, KEY_KP2)
 542                                 MATRIX_KEY(0x16, 0x07, KEY_KP0)
 543                                 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
 544                                 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
 545                                 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
 546                                 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
 547                                 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
 548                                 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
 549                                 MATRIX_KEY(0x1D, 0x04, KEY_END)
 550                                 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSUP)
 551                                 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
 552                                 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSDOWN)
 553                                 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
 554                                 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
 555                                 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
 556                                 MATRIX_KEY(0x1F, 0x04, KEY_QUESTION)>;
 557         };
 558
 559         pmc@7000e400 {
 560                 nvidia,invert-interrupt;
 561                 nvidia,suspend-mode = <1>;
 562                 nvidia,cpu-pwr-good-time = <5000>;
 563                 nvidia,cpu-pwr-off-time = <5000>;
 564                 nvidia,core-pwr-good-time = <3845 3845>;
 565                 nvidia,core-pwr-off-time = <3875>;
 566                 nvidia,sys-clock-req-active-high;
 567         };
 568
 569         pcie@80003000 {
 570                 status = "okay";
 571
 572                 avdd-pex-supply = <&pci_vdd_reg>;
 573                 vdd-pex-supply = <&pci_vdd_reg>;
 574                 avdd-pex-pll-supply = <&pci_vdd_reg>;
 575                 avdd-plle-supply = <&pci_vdd_reg>;
 576                 vddio-pex-clk-supply = <&pci_clk_reg>;
 577
 578                 pci@1,0 {
 579                         status = "okay";
 580                 };
 581
 582                 pci@2,0 {
 583                         status = "okay";
 584                 };
 585         };
 586
 587         usb@c5000000 {
 588                 status = "okay";
 589         };
 590
 591         usb-phy@c5000000 {
 592                 status = "okay";
 593         };
 594
 595         usb@c5004000 {
 596                 status = "okay";
 597                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 598                         GPIO_ACTIVE_LOW>;
 599         };
 600
 601         usb-phy@c5004000 {
 602                 status = "okay";
 603                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 604                         GPIO_ACTIVE_LOW>;
 605         };
 606
 607         usb@c5008000 {
 608                 status = "okay";
 609         };
 610
 611         usb-phy@c5008000 {
 612                 status = "okay";
 613         };
 614
 615         sdhci@c8000200 {
 616                 status = "okay";
 617                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 618                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 619                 power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
 620                 bus-width = <4>;
 621         };
 622
 623         sdhci@c8000600 {
 624                 status = "okay";
 625                 cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
 626                 wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
 627                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 628                 bus-width = <8>;
 629         };
 630
 631         backlight: backlight {
 632                 compatible = "pwm-backlight";
 633
 634                 enable-gpios = <&gpio TEGRA_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
 635                 power-supply = <&vdd_bl_reg>;
 636                 pwms = <&pwm 0 5000000>;
 637
 638                 brightness-levels = <0 4 8 16 32 64 128 255>;
 639                 default-brightness-level = <6>;
 640         };
 641
 642         clocks {
 643                 compatible = "simple-bus";
 644                 #address-cells = <1>;
 645                 #size-cells = <0>;
 646
 647                 clk32k_in: clock@0 {
 648                         compatible = "fixed-clock";
 649                         reg = <0>;
 650                         #clock-cells = <0>;
 651                         clock-frequency = <32768>;
 652                 };
 653         };
 654
 655         gpio-keys {
 656                 compatible = "gpio-keys";
 657
 658                 power {
 659                         label = "Power";
 660                         gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 661                         linux,code = <KEY_POWER>;
 662                         wakeup-source;
 663                 };
 664         };
 665
 666         panel: panel {
 667                 compatible = "auo,b101aw03", "simple-panel";
 668
 669                 power-supply = <&vdd_pnl_reg>;
 670                 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
 671
 672                 backlight = <&backlight>;
 673         };
 674
 675         regulators {
 676                 compatible = "simple-bus";
 677                 #address-cells = <1>;
 678                 #size-cells = <0>;
 679
 680                 vdd_5v0_reg: regulator@0 {
 681                         compatible = "regulator-fixed";
 682                         reg = <0>;
 683                         regulator-name = "vdd_5v0";
 684                         regulator-min-microvolt = <5000000>;
 685                         regulator-max-microvolt = <5000000>;
 686                         regulator-always-on;
 687                 };
 688
 689                 regulator@1 {
 690                         compatible = "regulator-fixed";
 691                         reg = <1>;
 692                         regulator-name = "vdd_1v5";
 693                         regulator-min-microvolt = <1500000>;
 694                         regulator-max-microvolt = <1500000>;
 695                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 696                 };
 697
 698                 regulator@2 {
 699                         compatible = "regulator-fixed";
 700                         reg = <2>;
 701                         regulator-name = "vdd_1v2";
 702                         regulator-min-microvolt = <1200000>;
 703                         regulator-max-microvolt = <1200000>;
 704                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
 705                         enable-active-high;
 706                 };
 707
 708                 pci_vdd_reg: regulator@3 {
 709                         compatible = "regulator-fixed";
 710                         reg = <3>;
 711                         regulator-name = "vdd_1v05";
 712                         regulator-min-microvolt = <1050000>;
 713                         regulator-max-microvolt = <1050000>;
 714                         gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
 715                         enable-active-high;
 716                 };
 717
 718                 vdd_pnl_reg: regulator@4 {
 719                         compatible = "regulator-fixed";
 720                         reg = <4>;
 721                         regulator-name = "vdd_pnl";
 722                         regulator-min-microvolt = <2800000>;
 723                         regulator-max-microvolt = <2800000>;
 724                         gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
 725                         enable-active-high;
 726                 };
 727
 728                 vdd_bl_reg: regulator@5 {
 729                         compatible = "regulator-fixed";
 730                         reg = <5>;
 731                         regulator-name = "vdd_bl";
 732                         regulator-min-microvolt = <2800000>;
 733                         regulator-max-microvolt = <2800000>;
 734                         gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
 735                         enable-active-high;
 736                 };
 737
 738                 vdd_5v0_hdmi: regulator@6 {
 739                         compatible = "regulator-fixed";
 740                         reg = <6>;
 741                         regulator-name = "VDDIO_HDMI";
 742                         regulator-min-microvolt = <5000000>;
 743                         regulator-max-microvolt = <5000000>;
 744                         gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>;
 745                         enable-active-high;
 746                         vin-supply = <&vdd_5v0_reg>;
 747                 };
 748         };
 749
 750         sound {
 751                 compatible = "nvidia,tegra-audio-wm8903-harmony",
 752                              "nvidia,tegra-audio-wm8903";
 753                 nvidia,model = "NVIDIA Tegra Harmony";
 754
 755                 nvidia,audio-routing =
 756                         "Headphone Jack", "HPOUTR",
 757                         "Headphone Jack", "HPOUTL",
 758                         "Int Spk", "ROP",
 759                         "Int Spk", "RON",
 760                         "Int Spk", "LOP",
 761                         "Int Spk", "LON",
 762                         "Mic Jack", "MICBIAS",
 763                         "IN1L", "Mic Jack";
 764
 765                 nvidia,i2s-controller = <&tegra_i2s1>;
 766                 nvidia,audio-codec = <&wm8903>;
 767
 768                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 769                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
 770                         GPIO_ACTIVE_HIGH>;
 771                 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
 772                         GPIO_ACTIVE_HIGH>;
 773                 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
 774                         GPIO_ACTIVE_HIGH>;
 775
 776                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 777                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 778                          <&tegra_car TEGRA20_CLK_CDEV1>;
 779                 clock-names = "pll_a", "pll_a_out0", "mclk";
 780         };
 781 };