Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / tegra124-venice2.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include "tegra124.dtsi"
5
6 / {
7         model = "NVIDIA Tegra124 Venice2";
8         compatible = "nvidia,venice2", "nvidia,tegra124";
9
10         aliases {
11                 rtc0 = "/i2c@0,7000d000/pmic@40";
12                 rtc1 = "/rtc@0,7000e000";
13                 serial0 = &uarta;
14         };
15
16         chosen {
17                 stdout-path = "serial0:115200n8";
18         };
19
20         memory {
21                 reg = <0x0 0x80000000 0x0 0x80000000>;
22         };
23
24         host1x@0,50000000 {
25                 hdmi@0,54280000 {
26                         status = "okay";
27
28                         vdd-supply = <&vdd_3v3_hdmi>;
29                         pll-supply = <&vdd_hdmi_pll>;
30                         hdmi-supply = <&vdd_5v0_hdmi>;
31
32                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
33                         nvidia,hpd-gpio =
34                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
35                 };
36
37                 sor@0,54540000 {
38                         status = "okay";
39
40                         nvidia,dpaux = <&dpaux>;
41                         nvidia,panel = <&panel>;
42                 };
43
44                 dpaux@0,545c0000 {
45                         vdd-supply = <&vdd_3v3_panel>;
46                         status = "okay";
47                 };
48         };
49
50         gpu@0,57000000 {
51                 /*
52                  * Node left disabled on purpose - the bootloader will enable
53                  * it after having set the VPR up
54                  */
55                 vdd-supply = <&vdd_gpu>;
56         };
57
58         pinmux: pinmux@0,70000868 {
59                 pinctrl-names = "boot";
60                 pinctrl-0 = <&pinmux_boot>;
61
62                 pinmux_boot: common {
63                         dap_mclk1_pw4 {
64                                 nvidia,pins = "dap_mclk1_pw4";
65                                 nvidia,function = "extperiph1";
66                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
67                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
68                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
69                         };
70                         dap1_din_pn1 {
71                                 nvidia,pins = "dap1_din_pn1";
72                                 nvidia,function = "i2s0";
73                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
74                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
75                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
76                         };
77                         dap1_dout_pn2 {
78                                 nvidia,pins = "dap1_dout_pn2",
79                                               "dap1_fs_pn0",
80                                               "dap1_sclk_pn3";
81                                 nvidia,function = "i2s0";
82                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
83                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
84                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
85                         };
86                         dap2_din_pa4 {
87                                 nvidia,pins = "dap2_din_pa4";
88                                 nvidia,function = "i2s1";
89                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
90                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
91                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
92                         };
93                         dap2_dout_pa5 {
94                                 nvidia,pins = "dap2_dout_pa5",
95                                               "dap2_fs_pa2",
96                                               "dap2_sclk_pa3";
97                                 nvidia,function = "i2s1";
98                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
99                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
100                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
101                         };
102                         dvfs_pwm_px0 {
103                                 nvidia,pins = "dvfs_pwm_px0",
104                                               "dvfs_clk_px2";
105                                 nvidia,function = "cldvfs";
106                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
107                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
108                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
109                         };
110                         ulpi_clk_py0 {
111                                 nvidia,pins = "ulpi_clk_py0",
112                                               "ulpi_nxt_py2",
113                                               "ulpi_stp_py3";
114                                 nvidia,function = "spi1";
115                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
116                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
117                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
118                         };
119                         ulpi_dir_py1 {
120                                 nvidia,pins = "ulpi_dir_py1";
121                                 nvidia,function = "spi1";
122                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
123                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
124                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
125                         };
126                         cam_i2c_scl_pbb1 {
127                                 nvidia,pins = "cam_i2c_scl_pbb1",
128                                               "cam_i2c_sda_pbb2";
129                                 nvidia,function = "i2c3";
130                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
131                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
132                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
133                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
134                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
135                         };
136                         gen2_i2c_scl_pt5 {
137                                 nvidia,pins = "gen2_i2c_scl_pt5",
138                                               "gen2_i2c_sda_pt6";
139                                 nvidia,function = "i2c2";
140                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
141                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
142                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
143                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
144                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
145                         };
146                         pg4 {
147                                 nvidia,pins = "pg4",
148                                               "pg5",
149                                               "pg6",
150                                               "pi3";
151                                 nvidia,function = "spi4";
152                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
153                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
154                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
155                         };
156                         pg7 {
157                                 nvidia,pins = "pg7";
158                                 nvidia,function = "spi4";
159                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
160                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
161                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
162                         };
163                         ph1 {
164                                 nvidia,pins = "ph1";
165                                 nvidia,function = "pwm1";
166                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
167                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
168                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
169                         };
170                         pk0 {
171                                 nvidia,pins = "pk0",
172                                               "kb_row15_ps7",
173                                               "clk_32k_out_pa0";
174                                 nvidia,function = "soc";
175                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
176                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
177                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
178                         };
179                         sdmmc1_clk_pz0 {
180                                 nvidia,pins = "sdmmc1_clk_pz0";
181                                 nvidia,function = "sdmmc1";
182                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
183                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
184                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
185                         };
186                         sdmmc1_cmd_pz1 {
187                                 nvidia,pins = "sdmmc1_cmd_pz1",
188                                               "sdmmc1_dat0_py7",
189                                               "sdmmc1_dat1_py6",
190                                               "sdmmc1_dat2_py5",
191                                               "sdmmc1_dat3_py4";
192                                 nvidia,function = "sdmmc1";
193                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
194                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
195                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
196                         };
197                         sdmmc3_clk_pa6 {
198                                 nvidia,pins = "sdmmc3_clk_pa6";
199                                 nvidia,function = "sdmmc3";
200                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
201                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
202                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
203                         };
204                         sdmmc3_cmd_pa7 {
205                                 nvidia,pins = "sdmmc3_cmd_pa7",
206                                               "sdmmc3_dat0_pb7",
207                                               "sdmmc3_dat1_pb6",
208                                               "sdmmc3_dat2_pb5",
209                                               "sdmmc3_dat3_pb4",
210                                               "sdmmc3_clk_lb_out_pee4",
211                                               "sdmmc3_clk_lb_in_pee5";
212                                 nvidia,function = "sdmmc3";
213                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
214                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
215                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
216                         };
217                         sdmmc4_clk_pcc4 {
218                                 nvidia,pins = "sdmmc4_clk_pcc4";
219                                 nvidia,function = "sdmmc4";
220                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
221                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
222                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
223                         };
224                         sdmmc4_cmd_pt7 {
225                                 nvidia,pins = "sdmmc4_cmd_pt7",
226                                               "sdmmc4_dat0_paa0",
227                                               "sdmmc4_dat1_paa1",
228                                               "sdmmc4_dat2_paa2",
229                                               "sdmmc4_dat3_paa3",
230                                               "sdmmc4_dat4_paa4",
231                                               "sdmmc4_dat5_paa5",
232                                               "sdmmc4_dat6_paa6",
233                                               "sdmmc4_dat7_paa7";
234                                 nvidia,function = "sdmmc4";
235                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
236                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
237                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
238                         };
239                         pwr_i2c_scl_pz6 {
240                                 nvidia,pins = "pwr_i2c_scl_pz6",
241                                               "pwr_i2c_sda_pz7";
242                                 nvidia,function = "i2cpwr";
243                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
244                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
245                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
246                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
247                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
248                         };
249                         jtag_rtck {
250                                 nvidia,pins = "jtag_rtck";
251                                 nvidia,function = "rtck";
252                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
253                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
254                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
255                         };
256                         clk_32k_in {
257                                 nvidia,pins = "clk_32k_in";
258                                 nvidia,function = "clk";
259                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
260                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
261                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
262                         };
263                         core_pwr_req {
264                                 nvidia,pins = "core_pwr_req";
265                                 nvidia,function = "pwron";
266                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
267                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
268                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
269                         };
270                         cpu_pwr_req {
271                                 nvidia,pins = "cpu_pwr_req";
272                                 nvidia,function = "cpu";
273                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
274                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
275                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
276                         };
277                         pwr_int_n {
278                                 nvidia,pins = "pwr_int_n";
279                                 nvidia,function = "pmi";
280                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
281                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
282                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
283                         };
284                         reset_out_n {
285                                 nvidia,pins = "reset_out_n";
286                                 nvidia,function = "reset_out_n";
287                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
288                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
289                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
290                         };
291                         clk3_out_pee0 {
292                                 nvidia,pins = "clk3_out_pee0";
293                                 nvidia,function = "extperiph3";
294                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
295                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
296                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
297                         };
298                         dap4_din_pp5 {
299                                 nvidia,pins = "dap4_din_pp5";
300                                 nvidia,function = "i2s3";
301                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
302                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
303                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
304                         };
305                         dap4_dout_pp6 {
306                                 nvidia,pins = "dap4_dout_pp6",
307                                               "dap4_fs_pp4",
308                                               "dap4_sclk_pp7";
309                                 nvidia,function = "i2s3";
310                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
311                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
312                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
313                         };
314                         gen1_i2c_sda_pc5 {
315                                 nvidia,pins = "gen1_i2c_sda_pc5",
316                                               "gen1_i2c_scl_pc4";
317                                 nvidia,function = "i2c1";
318                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
319                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
320                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
321                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
322                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
323                         };
324                         uart2_cts_n_pj5 {
325                                 nvidia,pins = "uart2_cts_n_pj5";
326                                 nvidia,function = "uartb";
327                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
328                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
329                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
330                         };
331                         uart2_rts_n_pj6 {
332                                 nvidia,pins = "uart2_rts_n_pj6";
333                                 nvidia,function = "uartb";
334                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
335                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
336                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
337                         };
338                         uart2_rxd_pc3 {
339                                 nvidia,pins = "uart2_rxd_pc3";
340                                 nvidia,function = "irda";
341                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
342                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
343                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
344                         };
345                         uart2_txd_pc2 {
346                                 nvidia,pins = "uart2_txd_pc2";
347                                 nvidia,function = "irda";
348                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
349                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
350                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
351                         };
352                         uart3_cts_n_pa1 {
353                                 nvidia,pins = "uart3_cts_n_pa1",
354                                               "uart3_rxd_pw7";
355                                 nvidia,function = "uartc";
356                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
357                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
358                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
359                         };
360                         uart3_rts_n_pc0 {
361                                 nvidia,pins = "uart3_rts_n_pc0",
362                                               "uart3_txd_pw6";
363                                 nvidia,function = "uartc";
364                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
365                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
366                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
367                         };
368                         hdmi_cec_pee3 {
369                                 nvidia,pins = "hdmi_cec_pee3";
370                                 nvidia,function = "cec";
371                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
372                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
373                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
374                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
375                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
376                         };
377                         hdmi_int_pn7 {
378                                 nvidia,pins = "hdmi_int_pn7";
379                                 nvidia,function = "rsvd1";
380                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
381                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
382                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
383                         };
384                         ddc_scl_pv4 {
385                                 nvidia,pins = "ddc_scl_pv4",
386                                               "ddc_sda_pv5";
387                                 nvidia,function = "i2c4";
388                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
389                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
390                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
391                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
392                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
393                         };
394                         pj7 {
395                                 nvidia,pins = "pj7",
396                                               "pk7";
397                                 nvidia,function = "uartd";
398                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
399                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
400                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
401                         };
402                         pb0 {
403                                 nvidia,pins = "pb0",
404                                               "pb1";
405                                 nvidia,function = "uartd";
406                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
407                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
408                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
409                         };
410                         ph0 {
411                                 nvidia,pins = "ph0";
412                                 nvidia,function = "pwm0";
413                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
415                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
416                         };
417                         kb_row10_ps2 {
418                                 nvidia,pins = "kb_row10_ps2";
419                                 nvidia,function = "uarta";
420                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
421                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
422                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
423                         };
424                         kb_row9_ps1 {
425                                 nvidia,pins = "kb_row9_ps1";
426                                 nvidia,function = "uarta";
427                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
428                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
429                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
430                         };
431                         kb_row6_pr6 {
432                                 nvidia,pins = "kb_row6_pr6";
433                                 nvidia,function = "displaya_alt";
434                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
435                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
436                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
437                         };
438                         usb_vbus_en0_pn4 {
439                                 nvidia,pins = "usb_vbus_en0_pn4",
440                                               "usb_vbus_en1_pn5";
441                                 nvidia,function = "usb";
442                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
443                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
444                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
445                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
446                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
447                         };
448                         drive_sdio1 {
449                                 nvidia,pins = "drive_sdio1";
450                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
451                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
452                                 nvidia,pull-down-strength = <32>;
453                                 nvidia,pull-up-strength = <42>;
454                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
455                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
456                         };
457                         drive_sdio3 {
458                                 nvidia,pins = "drive_sdio3";
459                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
460                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
461                                 nvidia,pull-down-strength = <20>;
462                                 nvidia,pull-up-strength = <36>;
463                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
464                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
465                         };
466                         drive_gma {
467                                 nvidia,pins = "drive_gma";
468                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
469                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
470                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
471                                 nvidia,pull-down-strength = <1>;
472                                 nvidia,pull-up-strength = <2>;
473                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
474                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
475                                 nvidia,drive-type = <1>;
476                         };
477                         als_irq_l {
478                                 nvidia,pins = "gpio_x3_aud_px3";
479                                 nvidia,function = "gmi";
480                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
481                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
482                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
483                         };
484                         codec_irq_l {
485                                 nvidia,pins = "ph4";
486                                 nvidia,function = "gmi";
487                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
488                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
489                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
490                         };
491                         lcd_bl_en {
492                                 nvidia,pins = "ph2";
493                                 nvidia,function = "gmi";
494                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
495                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
496                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
497                         };
498                         touch_irq_l {
499                                 nvidia,pins = "gpio_w3_aud_pw3";
500                                 nvidia,function = "spi6";
501                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
502                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
503                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
504                         };
505                         tpm_davint_l {
506                                 nvidia,pins = "ph6";
507                                 nvidia,function = "gmi";
508                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
509                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
510                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
511                         };
512                         ts_irq_l {
513                                 nvidia,pins = "pk2";
514                                 nvidia,function = "gmi";
515                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
516                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
517                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
518                         };
519                         ts_reset_l {
520                                 nvidia,pins = "pk4";
521                                 nvidia,function = "gmi";
522                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
523                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
524                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
525                         };
526                         ts_shdn_l {
527                                 nvidia,pins = "pk1";
528                                 nvidia,function = "gmi";
529                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
530                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
531                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
532                         };
533                         ph7 {
534                                 nvidia,pins = "ph7";
535                                 nvidia,function = "gmi";
536                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
537                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
538                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
539                         };
540                         kb_col0_ap {
541                                 nvidia,pins = "kb_col0_pq0";
542                                 nvidia,function = "rsvd4";
543                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
544                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
545                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
546                         };
547                         lid_open {
548                                 nvidia,pins = "kb_row4_pr4";
549                                 nvidia,function = "rsvd3";
550                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
551                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
552                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
553                         };
554                         en_vdd_sd {
555                                 nvidia,pins = "kb_row0_pr0";
556                                 nvidia,function = "rsvd4";
557                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
558                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
559                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
560                         };
561                         ac_ok {
562                                 nvidia,pins = "pj0";
563                                 nvidia,function = "gmi";
564                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
565                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
566                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
567                         };
568                         sensor_irq_l {
569                                 nvidia,pins = "pi6";
570                                 nvidia,function = "gmi";
571                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
572                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
573                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
574                         };
575                         wifi_en {
576                                 nvidia,pins = "gpio_x7_aud_px7";
577                                 nvidia,function = "rsvd4";
578                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
579                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
580                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
581                         };
582                         wifi_rst_l {
583                                 nvidia,pins = "clk2_req_pcc5";
584                                 nvidia,function = "dap";
585                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
586                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
587                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
588                         };
589                         hp_det_l {
590                                 nvidia,pins = "ulpi_data1_po2";
591                                 nvidia,function = "spi3";
592                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
593                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
594                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
595                         };
596                 };
597         };
598
599         serial@0,70006000 {
600                 status = "okay";
601         };
602
603         pwm@0,7000a000 {
604                 status = "okay";
605         };
606
607         i2c@0,7000c000 {
608                 status = "okay";
609                 clock-frequency = <100000>;
610
611                 acodec: audio-codec@10 {
612                         compatible = "maxim,max98090";
613                         reg = <0x10>;
614                         interrupt-parent = <&gpio>;
615                         interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
616                 };
617         };
618
619         i2c@0,7000c400 {
620                 status = "okay";
621                 clock-frequency = <100000>;
622
623                 trackpad@4b {
624                         compatible = "atmel,maxtouch";
625                         reg = <0x4b>;
626                         interrupt-parent = <&gpio>;
627                         interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_LOW>;
628                         linux,gpio-keymap = <0 0 0 BTN_LEFT>;
629                 };
630         };
631
632         i2c@0,7000c500 {
633                 status = "okay";
634                 clock-frequency = <100000>;
635         };
636
637         hdmi_ddc: i2c@0,7000c700 {
638                 status = "okay";
639                 clock-frequency = <100000>;
640         };
641
642         i2c@0,7000d000 {
643                 status = "okay";
644                 clock-frequency = <400000>;
645
646                 pmic: pmic@40 {
647                         compatible = "ams,as3722";
648                         reg = <0x40>;
649                         interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
650
651                         ams,system-power-controller;
652
653                         #interrupt-cells = <2>;
654                         interrupt-controller;
655
656                         gpio-controller;
657                         #gpio-cells = <2>;
658
659                         pinctrl-names = "default";
660                         pinctrl-0 = <&as3722_default>;
661
662                         as3722_default: pinmux {
663                                 gpio0 {
664                                         pins = "gpio0";
665                                         function = "gpio";
666                                         bias-pull-down;
667                                 };
668
669                                 gpio1_2_4_7 {
670                                         pins = "gpio1", "gpio2", "gpio4", "gpio7";
671                                         function = "gpio";
672                                         bias-pull-up;
673                                 };
674
675                                 gpio3_6 {
676                                         pins = "gpio3", "gpio6";
677                                         bias-high-impedance;
678                                 };
679
680                                 gpio5 {
681                                         pins = "gpio5";
682                                         function = "clk32k-out";
683                                 };
684                         };
685
686                         regulators {
687                                 vsup-sd2-supply = <&vdd_5v0_sys>;
688                                 vsup-sd3-supply = <&vdd_5v0_sys>;
689                                 vsup-sd4-supply = <&vdd_5v0_sys>;
690                                 vsup-sd5-supply = <&vdd_5v0_sys>;
691                                 vin-ldo0-supply = <&vdd_1v35_lp0>;
692                                 vin-ldo1-6-supply = <&vdd_3v3_run>;
693                                 vin-ldo2-5-7-supply = <&vddio_1v8>;
694                                 vin-ldo3-4-supply = <&vdd_3v3_sys>;
695                                 vin-ldo9-10-supply = <&vdd_5v0_sys>;
696                                 vin-ldo11-supply = <&vdd_3v3_run>;
697
698                                 sd0 {
699                                         regulator-name = "+VDD_CPU_AP";
700                                         regulator-min-microvolt = <700000>;
701                                         regulator-max-microvolt = <1400000>;
702                                         regulator-min-microamp = <3500000>;
703                                         regulator-max-microamp = <3500000>;
704                                         regulator-always-on;
705                                         regulator-boot-on;
706                                         ams,ext-control = <2>;
707                                 };
708
709                                 sd1 {
710                                         regulator-name = "+VDD_CORE";
711                                         regulator-min-microvolt = <700000>;
712                                         regulator-max-microvolt = <1350000>;
713                                         regulator-min-microamp = <2500000>;
714                                         regulator-max-microamp = <2500000>;
715                                         regulator-always-on;
716                                         regulator-boot-on;
717                                         ams,ext-control = <1>;
718                                 };
719
720                                 vdd_1v35_lp0: sd2 {
721                                         regulator-name = "+1.35V_LP0(sd2)";
722                                         regulator-min-microvolt = <1350000>;
723                                         regulator-max-microvolt = <1350000>;
724                                         regulator-always-on;
725                                         regulator-boot-on;
726                                 };
727
728                                 sd3 {
729                                         regulator-name = "+1.35V_LP0(sd3)";
730                                         regulator-min-microvolt = <1350000>;
731                                         regulator-max-microvolt = <1350000>;
732                                         regulator-always-on;
733                                         regulator-boot-on;
734                                 };
735
736                                 vdd_1v05_run: sd4 {
737                                         regulator-name = "+1.05V_RUN";
738                                         regulator-min-microvolt = <1050000>;
739                                         regulator-max-microvolt = <1050000>;
740                                 };
741
742                                 vddio_1v8: sd5 {
743                                         regulator-name = "+1.8V_VDDIO";
744                                         regulator-min-microvolt = <1800000>;
745                                         regulator-max-microvolt = <1800000>;
746                                         regulator-boot-on;
747                                         regulator-always-on;
748                                 };
749
750                                 vdd_gpu: sd6 {
751                                         regulator-name = "+VDD_GPU_AP";
752                                         regulator-min-microvolt = <650000>;
753                                         regulator-max-microvolt = <1200000>;
754                                         regulator-min-microamp = <3500000>;
755                                         regulator-max-microamp = <3500000>;
756                                         regulator-boot-on;
757                                         regulator-always-on;
758                                 };
759
760                                 avdd_1v05_run: ldo0 {
761                                         regulator-name = "+1.05V_RUN_AVDD";
762                                         regulator-min-microvolt = <1050000>;
763                                         regulator-max-microvolt = <1050000>;
764                                         regulator-boot-on;
765                                         regulator-always-on;
766                                         ams,ext-control = <1>;
767                                 };
768
769                                 ldo1 {
770                                         regulator-name = "+1.8V_RUN_CAM";
771                                         regulator-min-microvolt = <1800000>;
772                                         regulator-max-microvolt = <1800000>;
773                                 };
774
775                                 ldo2 {
776                                         regulator-name = "+1.2V_GEN_AVDD";
777                                         regulator-min-microvolt = <1200000>;
778                                         regulator-max-microvolt = <1200000>;
779                                         regulator-boot-on;
780                                         regulator-always-on;
781                                 };
782
783                                 ldo3 {
784                                         regulator-name = "+1.00V_LP0_VDD_RTC";
785                                         regulator-min-microvolt = <1000000>;
786                                         regulator-max-microvolt = <1000000>;
787                                         regulator-boot-on;
788                                         regulator-always-on;
789                                         ams,enable-tracking;
790                                 };
791
792                                 vdd_run_cam: ldo4 {
793                                         regulator-name = "+3.3V_RUN_CAM";
794                                         regulator-min-microvolt = <2800000>;
795                                         regulator-max-microvolt = <2800000>;
796                                 };
797
798                                 ldo5 {
799                                         regulator-name = "+1.2V_RUN_CAM_FRONT";
800                                         regulator-min-microvolt = <1200000>;
801                                         regulator-max-microvolt = <1200000>;
802                                 };
803
804                                 vddio_sdmmc3: ldo6 {
805                                         regulator-name = "+VDDIO_SDMMC3";
806                                         regulator-min-microvolt = <1800000>;
807                                         regulator-max-microvolt = <3300000>;
808                                 };
809
810                                 ldo7 {
811                                         regulator-name = "+1.05V_RUN_CAM_REAR";
812                                         regulator-min-microvolt = <1050000>;
813                                         regulator-max-microvolt = <1050000>;
814                                 };
815
816                                 ldo9 {
817                                         regulator-name = "+2.8V_RUN_TOUCH";
818                                         regulator-min-microvolt = <2800000>;
819                                         regulator-max-microvolt = <2800000>;
820                                 };
821
822                                 ldo10 {
823                                         regulator-name = "+2.8V_RUN_CAM_AF";
824                                         regulator-min-microvolt = <2800000>;
825                                         regulator-max-microvolt = <2800000>;
826                                 };
827
828                                 ldo11 {
829                                         regulator-name = "+1.8V_RUN_VPP_FUSE";
830                                         regulator-min-microvolt = <1800000>;
831                                         regulator-max-microvolt = <1800000>;
832                                 };
833                         };
834                 };
835         };
836
837         spi@0,7000d400 {
838                 status = "okay";
839
840                 cros_ec: cros-ec@0 {
841                         compatible = "google,cros-ec-spi";
842                         spi-max-frequency = <4000000>;
843                         interrupt-parent = <&gpio>;
844                         interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
845                         reg = <0>;
846
847                         google,cros-ec-spi-msg-delay = <2000>;
848
849                         i2c-tunnel {
850                                 compatible = "google,cros-ec-i2c-tunnel";
851                                 #address-cells = <1>;
852                                 #size-cells = <0>;
853
854                                 google,remote-bus = <0>;
855
856                                 charger: bq24735@9 {
857                                         compatible = "ti,bq24735";
858                                         reg = <0x9>;
859                                         interrupt-parent = <&gpio>;
860                                         interrupts = <TEGRA_GPIO(J, 0)
861                                                         GPIO_ACTIVE_HIGH>;
862                                         ti,ac-detect-gpios = <&gpio
863                                                         TEGRA_GPIO(J, 0)
864                                                         GPIO_ACTIVE_HIGH>;
865                                 };
866
867                                 battery: sbs-battery@b {
868                                         compatible = "sbs,sbs-battery";
869                                         reg = <0xb>;
870                                         sbs,i2c-retry-count = <2>;
871                                         sbs,poll-retry-count = <1>;
872                                 };
873                         };
874                 };
875         };
876
877         spi@0,7000da00 {
878                 status = "okay";
879                 spi-max-frequency = <25000000>;
880                 spi-flash@0 {
881                         compatible = "winbond,w25q32dw";
882                         reg = <0>;
883                         spi-max-frequency = <20000000>;
884                 };
885         };
886
887         pmc@0,7000e400 {
888                 nvidia,invert-interrupt;
889                 nvidia,suspend-mode = <1>;
890                 nvidia,cpu-pwr-good-time = <500>;
891                 nvidia,cpu-pwr-off-time = <300>;
892                 nvidia,core-pwr-good-time = <641 3845>;
893                 nvidia,core-pwr-off-time = <61036>;
894                 nvidia,core-power-req-active-high;
895                 nvidia,sys-clock-req-active-high;
896         };
897
898         hda@0,70030000 {
899                 status = "okay";
900         };
901
902         usb@0,70090000 {
903                 phys = <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
904                        <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
905                        <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
906                        <&{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
907                        <&{/padctl@0,7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
908                 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
909
910                 avddio-pex-supply = <&vdd_1v05_run>;
911                 dvddio-pex-supply = <&vdd_1v05_run>;
912                 avdd-usb-supply = <&vdd_3v3_lp0>;
913                 avdd-pll-utmip-supply = <&vddio_1v8>;
914                 avdd-pll-erefe-supply = <&avdd_1v05_run>;
915                 avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
916                 hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
917                 hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
918
919                 status = "okay";
920         };
921
922         padctl@0,7009f000 {
923                 pads {
924                         usb2 {
925                                 status = "okay";
926
927                                 lanes {
928                                         usb2-0 {
929                                                 nvidia,function = "xusb";
930                                                 status = "okay";
931                                         };
932
933                                         usb2-1 {
934                                                 nvidia,function = "xusb";
935                                                 status = "okay";
936                                         };
937
938                                         usb2-2 {
939                                                 nvidia,function = "xusb";
940                                                 status = "okay";
941                                         };
942                                 };
943                         };
944
945                         pcie {
946                                 status = "okay";
947
948                                 lanes {
949                                         pcie-0 {
950                                                 nvidia,function = "usb3-ss";
951                                                 status = "okay";
952                                         };
953
954                                         pcie-1 {
955                                                 nvidia,function = "usb3-ss";
956                                                 status = "okay";
957                                         };
958
959                                         pcie-1 {
960                                                 nvidia,function = "usb3-ss";
961                                                 status = "okay";
962                                         };
963                                 };
964                         };
965                 };
966
967                 ports {
968                         usb2-0 {
969                                 status = "okay";
970                                 mode = "otg";
971
972                                 vbus-supply = <&vdd_usb1_vbus>;
973                         };
974
975                         usb2-1 {
976                                 status = "okay";
977                                 mode = "host";
978
979                                 vbus-supply = <&vdd_run_cam>;
980                         };
981
982                         usb2-2 {
983                                 status = "okay";
984                                 mode = "host";
985
986                                 vbus-supply = <&vdd_usb3_vbus>;
987                         };
988
989                         usb3-0 {
990                                 nvidia,usb2-companion = <0>;
991                                 status = "okay";
992                         };
993
994                         usb3-1 {
995                                 nvidia,usb2-companion = <2>;
996                                 status = "okay";
997                         };
998                 };
999         };
1000
1001         sdhci@0,700b0400 {
1002                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
1003                 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1004                 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1005                 status = "okay";
1006                 bus-width = <4>;
1007                 vqmmc-supply = <&vddio_sdmmc3>;
1008         };
1009
1010         sdhci@0,700b0600 {
1011                 status = "okay";
1012                 bus-width = <8>;
1013                 non-removable;
1014         };
1015
1016         ahub@0,70300000 {
1017                 i2s@0,70301100 {
1018                         status = "okay";
1019                 };
1020         };
1021
1022         usb@0,7d000000 {
1023                 status = "okay";
1024         };
1025
1026         usb-phy@0,7d000000 {
1027                 status = "okay";
1028                 vbus-supply = <&vdd_usb1_vbus>;
1029         };
1030
1031         usb@0,7d004000 {
1032                 status = "okay";
1033         };
1034
1035         usb-phy@0,7d004000 {
1036                 status = "okay";
1037                 vbus-supply = <&vdd_run_cam>;
1038         };
1039
1040         usb@0,7d008000 {
1041                 status = "okay";
1042         };
1043
1044         usb-phy@0,7d008000 {
1045                 status = "okay";
1046                 vbus-supply = <&vdd_usb3_vbus>;
1047         };
1048
1049         backlight: backlight {
1050                 compatible = "pwm-backlight";
1051
1052                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1053                 power-supply = <&vdd_led>;
1054                 pwms = <&pwm 1 1000000>;
1055
1056                 brightness-levels = <0 4 8 16 32 64 128 255>;
1057                 default-brightness-level = <6>;
1058         };
1059
1060         clocks {
1061                 compatible = "simple-bus";
1062                 #address-cells = <1>;
1063                 #size-cells = <0>;
1064
1065                 clk32k_in: clock@0 {
1066                         compatible = "fixed-clock";
1067                         reg = <0>;
1068                         #clock-cells = <0>;
1069                         clock-frequency = <32768>;
1070                 };
1071         };
1072
1073         gpio-keys {
1074                 compatible = "gpio-keys";
1075
1076                 power {
1077                         label = "Power";
1078                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1079                         linux,code = <KEY_POWER>;
1080                         debounce-interval = <10>;
1081                         wakeup-source;
1082                 };
1083         };
1084
1085         panel: panel {
1086                 compatible = "lg,lp129qe", "simple-panel";
1087
1088                 backlight = <&backlight>;
1089                 ddc-i2c-bus = <&dpaux>;
1090         };
1091
1092         regulators {
1093                 compatible = "simple-bus";
1094                 #address-cells = <1>;
1095                 #size-cells = <0>;
1096
1097                 vdd_mux: regulator@0 {
1098                         compatible = "regulator-fixed";
1099                         reg = <0>;
1100                         regulator-name = "+VDD_MUX";
1101                         regulator-min-microvolt = <12000000>;
1102                         regulator-max-microvolt = <12000000>;
1103                         regulator-always-on;
1104                         regulator-boot-on;
1105                 };
1106
1107                 vdd_5v0_sys: regulator@1 {
1108                         compatible = "regulator-fixed";
1109                         reg = <1>;
1110                         regulator-name = "+5V_SYS";
1111                         regulator-min-microvolt = <5000000>;
1112                         regulator-max-microvolt = <5000000>;
1113                         regulator-always-on;
1114                         regulator-boot-on;
1115                         vin-supply = <&vdd_mux>;
1116                 };
1117
1118                 vdd_3v3_sys: regulator@2 {
1119                         compatible = "regulator-fixed";
1120                         reg = <2>;
1121                         regulator-name = "+3.3V_SYS";
1122                         regulator-min-microvolt = <3300000>;
1123                         regulator-max-microvolt = <3300000>;
1124                         regulator-always-on;
1125                         regulator-boot-on;
1126                         vin-supply = <&vdd_mux>;
1127                 };
1128
1129                 vdd_3v3_run: regulator@3 {
1130                         compatible = "regulator-fixed";
1131                         reg = <3>;
1132                         regulator-name = "+3.3V_RUN";
1133                         regulator-min-microvolt = <3300000>;
1134                         regulator-max-microvolt = <3300000>;
1135                         regulator-always-on;
1136                         regulator-boot-on;
1137                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1138                         enable-active-high;
1139                         vin-supply = <&vdd_3v3_sys>;
1140                 };
1141
1142                 vdd_3v3_hdmi: regulator@4 {
1143                         compatible = "regulator-fixed";
1144                         reg = <4>;
1145                         regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1146                         regulator-min-microvolt = <3300000>;
1147                         regulator-max-microvolt = <3300000>;
1148                         vin-supply = <&vdd_3v3_run>;
1149                 };
1150
1151                 vdd_led: regulator@5 {
1152                         compatible = "regulator-fixed";
1153                         reg = <5>;
1154                         regulator-name = "+VDD_LED";
1155                         regulator-min-microvolt = <3300000>;
1156                         regulator-max-microvolt = <3300000>;
1157                         gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1158                         enable-active-high;
1159                         vin-supply = <&vdd_mux>;
1160                 };
1161
1162                 vdd_5v0_ts: regulator@6 {
1163                         compatible = "regulator-fixed";
1164                         reg = <6>;
1165                         regulator-name = "+5V_VDD_TS_SW";
1166                         regulator-min-microvolt = <5000000>;
1167                         regulator-max-microvolt = <5000000>;
1168                         regulator-boot-on;
1169                         gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1170                         enable-active-high;
1171                         vin-supply = <&vdd_5v0_sys>;
1172                 };
1173
1174                 vdd_usb1_vbus: regulator@7 {
1175                         compatible = "regulator-fixed";
1176                         reg = <7>;
1177                         regulator-name = "+5V_USB_HS";
1178                         regulator-min-microvolt = <5000000>;
1179                         regulator-max-microvolt = <5000000>;
1180                         gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1181                         enable-active-high;
1182                         gpio-open-drain;
1183                         vin-supply = <&vdd_5v0_sys>;
1184                 };
1185
1186                 vdd_usb3_vbus: regulator@8 {
1187                         compatible = "regulator-fixed";
1188                         reg = <8>;
1189                         regulator-name = "+5V_USB_SS";
1190                         regulator-min-microvolt = <5000000>;
1191                         regulator-max-microvolt = <5000000>;
1192                         gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1193                         enable-active-high;
1194                         gpio-open-drain;
1195                         vin-supply = <&vdd_5v0_sys>;
1196                 };
1197
1198                 vdd_3v3_panel: regulator@9 {
1199                         compatible = "regulator-fixed";
1200                         reg = <9>;
1201                         regulator-name = "+3.3V_PANEL";
1202                         regulator-min-microvolt = <3300000>;
1203                         regulator-max-microvolt = <3300000>;
1204                         gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
1205                         enable-active-high;
1206                         vin-supply = <&vdd_3v3_run>;
1207                 };
1208
1209                 vdd_3v3_lp0: regulator@10 {
1210                         compatible = "regulator-fixed";
1211                         reg = <10>;
1212                         regulator-name = "+3.3V_LP0";
1213                         regulator-min-microvolt = <3300000>;
1214                         regulator-max-microvolt = <3300000>;
1215                         /*
1216                          * TODO: find a way to wire this up with the USB EHCI
1217                          * controllers so that it can be enabled on demand.
1218                          */
1219                         regulator-always-on;
1220                         gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1221                         enable-active-high;
1222                         vin-supply = <&vdd_3v3_sys>;
1223                 };
1224
1225                 vdd_hdmi_pll: regulator@11 {
1226                         compatible = "regulator-fixed";
1227                         reg = <11>;
1228                         regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1229                         regulator-min-microvolt = <1050000>;
1230                         regulator-max-microvolt = <1050000>;
1231                         gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1232                         vin-supply = <&vdd_1v05_run>;
1233                 };
1234
1235                 vdd_5v0_hdmi: regulator@12 {
1236                         compatible = "regulator-fixed";
1237                         reg = <12>;
1238                         regulator-name = "+5V_HDMI_CON";
1239                         regulator-min-microvolt = <5000000>;
1240                         regulator-max-microvolt = <5000000>;
1241                         gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1242                         enable-active-high;
1243                         vin-supply = <&vdd_5v0_sys>;
1244                 };
1245         };
1246
1247         sound {
1248                 compatible = "nvidia,tegra-audio-max98090-venice2",
1249                              "nvidia,tegra-audio-max98090";
1250                 nvidia,model = "NVIDIA Tegra Venice2";
1251
1252                 nvidia,audio-routing =
1253                         "Headphones", "HPR",
1254                         "Headphones", "HPL",
1255                         "Speakers", "SPKR",
1256                         "Speakers", "SPKL",
1257                         "Mic Jack", "MICBIAS",
1258                         "IN34", "Mic Jack";
1259
1260                 nvidia,i2s-controller = <&tegra_i2s1>;
1261                 nvidia,audio-codec = <&acodec>;
1262
1263                 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1264                          <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1265                          <&tegra_car TEGRA124_CLK_EXTERN1>;
1266                 clock-names = "pll_a", "pll_a_out0", "mclk";
1267         };
1268 };
1269
1270 #include "cros-ec-keyboard.dtsi"