arch/arm/boot/dts/tegra124-nyan-big.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra124.dtsi"
   5
   6 / {
   7         model = "Acer Chromebook 13 CB5-311";
   8         compatible = "google,nyan-big", "nvidia,tegra124";
   9
  10         aliases {
  11                 rtc0 = "/i2c@0,7000d000/pmic@40";
  12                 rtc1 = "/rtc@0,7000e000";
  13                 serial0 = &uarta;
  14         };
  15
  16         memory {
  17                 reg = <0x0 0x80000000 0x0 0x80000000>;
  18         };
  19
  20         host1x@0,50000000 {
  21                 hdmi@0,54280000 {
  22                         status = "okay";
  23
  24                         vdd-supply = <&vdd_3v3_hdmi>;
  25                         pll-supply = <&vdd_hdmi_pll>;
  26                         hdmi-supply = <&vdd_5v0_hdmi>;
  27
  28                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  29                         nvidia,hpd-gpio =
  30                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  31                 };
  32
  33                 sor@0,54540000 {
  34                         status = "okay";
  35
  36                         nvidia,dpaux = <&dpaux>;
  37                         nvidia,panel = <&panel>;
  38                 };
  39
  40                 dpaux@0,545c0000 {
  41                         vdd-supply = <&vdd_3v3_panel>;
  42                         status = "okay";
  43                 };
  44         };
  45
  46         pinmux@0,70000868 {
  47                 pinctrl-names = "default";
  48                 pinctrl-0 = <&pinmux_default>;
  49
  50                 pinmux_default: common {
  51                         dap_mclk1_pw4 {
  52                                 nvidia,pins = "dap_mclk1_pw4";
  53                                 nvidia,function = "extperiph1";
  54                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  55                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  56                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  57                         };
  58                         dap2_din_pa4 {
  59                                 nvidia,pins = "dap2_din_pa4";
  60                                 nvidia,function = "i2s1";
  61                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  62                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  63                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  64                         };
  65                         dap2_dout_pa5 {
  66                                 nvidia,pins = "dap2_dout_pa5",
  67                                               "dap2_fs_pa2",
  68                                               "dap2_sclk_pa3";
  69                                 nvidia,function = "i2s1";
  70                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  71                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  72                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  73                         };
  74                         dvfs_pwm_px0 {
  75                                 nvidia,pins = "dvfs_pwm_px0",
  76                                               "dvfs_clk_px2";
  77                                 nvidia,function = "cldvfs";
  78                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  79                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  80                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  81                         };
  82                         ulpi_clk_py0 {
  83                                 nvidia,pins = "ulpi_clk_py0",
  84                                               "ulpi_nxt_py2",
  85                                               "ulpi_stp_py3";
  86                                 nvidia,function = "spi1";
  87                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  88                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  89                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  90                         };
  91                         ulpi_dir_py1 {
  92                                 nvidia,pins = "ulpi_dir_py1";
  93                                 nvidia,function = "spi1";
  94                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  95                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  96                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  97                         };
  98                         cam_i2c_scl_pbb1 {
  99                                 nvidia,pins = "cam_i2c_scl_pbb1",
 100                                               "cam_i2c_sda_pbb2";
 101                                 nvidia,function = "i2c3";
 102                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 103                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 104                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 105                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 106                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 107                         };
 108                         gen2_i2c_scl_pt5 {
 109                                 nvidia,pins = "gen2_i2c_scl_pt5",
 110                                               "gen2_i2c_sda_pt6";
 111                                 nvidia,function = "i2c2";
 112                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 113                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 114                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 115                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 116                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 117                         };
 118                         pg4 {
 119                                 nvidia,pins = "pg4",
 120                                               "pg5",
 121                                               "pg6",
 122                                               "pi3";
 123                                 nvidia,function = "spi4";
 124                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 125                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 126                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 127                         };
 128                         pg7 {
 129                                 nvidia,pins = "pg7";
 130                                 nvidia,function = "spi4";
 131                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 132                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 133                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 134                         };
 135                         ph1 {
 136                                 nvidia,pins = "ph1";
 137                                 nvidia,function = "pwm1";
 138                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 139                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 140                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 141                         };
 142                         pk0 {
 143                                 nvidia,pins = "pk0",
 144                                               "kb_row15_ps7",
 145                                               "clk_32k_out_pa0";
 146                                 nvidia,function = "soc";
 147                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 148                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 149                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 150                         };
 151                         sdmmc1_clk_pz0 {
 152                                 nvidia,pins = "sdmmc1_clk_pz0";
 153                                 nvidia,function = "sdmmc1";
 154                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 155                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 156                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 157                         };
 158                         sdmmc1_cmd_pz1 {
 159                                 nvidia,pins = "sdmmc1_cmd_pz1",
 160                                               "sdmmc1_dat0_py7",
 161                                               "sdmmc1_dat1_py6",
 162                                               "sdmmc1_dat2_py5",
 163                                               "sdmmc1_dat3_py4";
 164                                 nvidia,function = "sdmmc1";
 165                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 166                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 167                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 168                         };
 169                         sdmmc3_clk_pa6 {
 170                                 nvidia,pins = "sdmmc3_clk_pa6";
 171                                 nvidia,function = "sdmmc3";
 172                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 173                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 174                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 175                         };
 176                         sdmmc3_cmd_pa7 {
 177                                 nvidia,pins = "sdmmc3_cmd_pa7",
 178                                               "sdmmc3_dat0_pb7",
 179                                               "sdmmc3_dat1_pb6",
 180                                               "sdmmc3_dat2_pb5",
 181                                               "sdmmc3_dat3_pb4",
 182                                               "kb_col4_pq4",
 183                                               "sdmmc3_clk_lb_out_pee4",
 184                                               "sdmmc3_clk_lb_in_pee5",
 185                                               "sdmmc3_cd_n_pv2";
 186                                 nvidia,function = "sdmmc3";
 187                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 188                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 189                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 190                         };
 191                         sdmmc4_clk_pcc4 {
 192                                 nvidia,pins = "sdmmc4_clk_pcc4";
 193                                 nvidia,function = "sdmmc4";
 194                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 195                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 196                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 197                         };
 198                         sdmmc4_cmd_pt7 {
 199                                 nvidia,pins = "sdmmc4_cmd_pt7",
 200                                               "sdmmc4_dat0_paa0",
 201                                               "sdmmc4_dat1_paa1",
 202                                               "sdmmc4_dat2_paa2",
 203                                               "sdmmc4_dat3_paa3",
 204                                               "sdmmc4_dat4_paa4",
 205                                               "sdmmc4_dat5_paa5",
 206                                               "sdmmc4_dat6_paa6",
 207                                               "sdmmc4_dat7_paa7";
 208                                 nvidia,function = "sdmmc4";
 209                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 210                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 211                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 212                         };
 213                         pwr_i2c_scl_pz6 {
 214                                 nvidia,pins = "pwr_i2c_scl_pz6",
 215                                               "pwr_i2c_sda_pz7";
 216                                 nvidia,function = "i2cpwr";
 217                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 218                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 219                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 220                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 221                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 222                         };
 223                         jtag_rtck {
 224                                 nvidia,pins = "jtag_rtck";
 225                                 nvidia,function = "rtck";
 226                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 227                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 228                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 229                         };
 230                         clk_32k_in {
 231                                 nvidia,pins = "clk_32k_in";
 232                                 nvidia,function = "clk";
 233                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 234                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 235                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 236                         };
 237                         core_pwr_req {
 238                                 nvidia,pins = "core_pwr_req";
 239                                 nvidia,function = "pwron";
 240                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 241                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 242                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 243                         };
 244                         cpu_pwr_req {
 245                                 nvidia,pins = "cpu_pwr_req";
 246                                 nvidia,function = "cpu";
 247                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 248                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 249                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 250                         };
 251                         pwr_int_n {
 252                                 nvidia,pins = "pwr_int_n";
 253                                 nvidia,function = "pmi";
 254                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 255                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 256                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 257                         };
 258                         reset_out_n {
 259                                 nvidia,pins = "reset_out_n";
 260                                 nvidia,function = "reset_out_n";
 261                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 262                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 263                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 264                         };
 265                         clk3_out_pee0 {
 266                                 nvidia,pins = "clk3_out_pee0";
 267                                 nvidia,function = "extperiph3";
 268                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 269                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 270                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 271                         };
 272                         gen1_i2c_sda_pc5 {
 273                                 nvidia,pins = "gen1_i2c_sda_pc5",
 274                                               "gen1_i2c_scl_pc4";
 275                                 nvidia,function = "i2c1";
 276                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 277                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 278                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 279                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 280                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 281                         };
 282                         hdmi_cec_pee3 {
 283                                 nvidia,pins = "hdmi_cec_pee3";
 284                                 nvidia,function = "cec";
 285                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 286                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 287                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 288                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 289                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 290                         };
 291                         hdmi_int_pn7 {
 292                                 nvidia,pins = "hdmi_int_pn7";
 293                                 nvidia,function = "rsvd1";
 294                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 295                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 296                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 297                         };
 298                         ddc_scl_pv4 {
 299                                 nvidia,pins = "ddc_scl_pv4",
 300                                               "ddc_sda_pv5";
 301                                 nvidia,function = "i2c4";
 302                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 303                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 304                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 305                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 306                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
 307                         };
 308                         kb_row10_ps2 {
 309                                 nvidia,pins = "kb_row10_ps2";
 310                                 nvidia,function = "uarta";
 311                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 312                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 313                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 314                         };
 315                         kb_row9_ps1 {
 316                                 nvidia,pins = "kb_row9_ps1";
 317                                 nvidia,function = "uarta";
 318                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 319                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 320                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 321                         };
 322                         usb_vbus_en0_pn4 {
 323                                 nvidia,pins = "usb_vbus_en0_pn4",
 324                                               "usb_vbus_en1_pn5";
 325                                 nvidia,function = "usb";
 326                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 327                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 328                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 329                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 330                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 331                         };
 332                         drive_sdio1 {
 333                                 nvidia,pins = "drive_sdio1";
 334                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 335                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 336                                 nvidia,pull-down-strength = <36>;
 337                                 nvidia,pull-up-strength = <20>;
 338                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
 339                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
 340                         };
 341                         drive_sdio3 {
 342                                 nvidia,pins = "drive_sdio3";
 343                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 344                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 345                                 nvidia,pull-down-strength = <22>;
 346                                 nvidia,pull-up-strength = <36>;
 347                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 348                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 349                         };
 350                         drive_gma {
 351                                 nvidia,pins = "drive_gma";
 352                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 353                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 354                                 nvidia,pull-down-strength = <2>;
 355                                 nvidia,pull-up-strength = <1>;
 356                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 357                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 358                                 nvidia,drive-type = <1>;
 359                         };
 360                         codec_irq_l {
 361                                 nvidia,pins = "ph4";
 362                                 nvidia,function = "gmi";
 363                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 364                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 365                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 366                         };
 367                         lcd_bl_en {
 368                                 nvidia,pins = "ph2";
 369                                 nvidia,function = "gmi";
 370                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 371                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 372                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 373                         };
 374                         touch_irq_l {
 375                                 nvidia,pins = "gpio_w3_aud_pw3";
 376                                 nvidia,function = "spi6";
 377                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 378                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 379                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 380                         };
 381                         tpm_davint_l {
 382                                 nvidia,pins = "ph6";
 383                                 nvidia,function = "gmi";
 384                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 385                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 386                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 387                         };
 388                         ts_irq_l {
 389                                 nvidia,pins = "pk2";
 390                                 nvidia,function = "gmi";
 391                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 392                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 393                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 394                         };
 395                         ts_reset_l {
 396                                 nvidia,pins = "pk4";
 397                                 nvidia,function = "gmi";
 398                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 399                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 400                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 401                         };
 402                         ts_shdn_l {
 403                                 nvidia,pins = "pk1";
 404                                 nvidia,function = "gmi";
 405                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 406                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 407                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 408                         };
 409                         ph7 {
 410                                 nvidia,pins = "ph7";
 411                                 nvidia,function = "gmi";
 412                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 413                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 414                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 415                         };
 416                         kb_col0_ap {
 417                                 nvidia,pins = "kb_col0_pq0";
 418                                 nvidia,function = "rsvd4";
 419                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 420                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 421                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 422                         };
 423                         lid_open {
 424                                 nvidia,pins = "kb_row4_pr4";
 425                                 nvidia,function = "rsvd3";
 426                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 427                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 428                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 429                         };
 430                         en_vdd_sd {
 431                                 nvidia,pins = "kb_row0_pr0";
 432                                 nvidia,function = "rsvd4";
 433                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 434                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 435                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 436                         };
 437                         ac_ok {
 438                                 nvidia,pins = "pj0";
 439                                 nvidia,function = "gmi";
 440                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 441                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 442                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 443                         };
 444                         sensor_irq_l {
 445                                 nvidia,pins = "pi6";
 446                                 nvidia,function = "gmi";
 447                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 448                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 449                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 450                         };
 451                         wifi_en {
 452                                 nvidia,pins = "gpio_x7_aud_px7";
 453                                 nvidia,function = "rsvd4";
 454                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 455                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 456                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 457                         };
 458                         en_vdd_bl {
 459                                 nvidia,pins = "dap3_dout_pp2";
 460                                 nvidia,function = "i2s2";
 461                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 462                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 463                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 464                         };
 465                         en_vdd_hdmi {
 466                                 nvidia,pins = "spdif_in_pk6";
 467                                 nvidia,function = "spdif";
 468                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 469                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 470                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 471                         };
 472                         soc_warm_reset_l {
 473                                 nvidia,pins = "pi5";
 474                                 nvidia,function = "gmi";
 475                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 476                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 477                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 478                         };
 479                         hp_det_l {
 480                                 nvidia,pins = "pi7";
 481                                 nvidia,function = "rsvd1";
 482                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 483                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 484                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 485                         };
 486                         mic_det_l {
 487                                 nvidia,pins = "kb_row7_pr7";
 488                                 nvidia,function = "rsvd2";
 489                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 490                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 491                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 492                         };
 493                 };
 494         };
 495
 496         serial@0,70006000 {
 497                 /* Debug connector on the bottom of the board near SD card. */
 498                 status = "okay";
 499         };
 500
 501         pwm@0,7000a000 {
 502                 status = "okay";
 503         };
 504
 505         i2c@0,7000c000 {
 506                 status = "okay";
 507                 clock-frequency = <100000>;
 508
 509                 acodec: audio-codec@10 {
 510                         compatible = "maxim,max98090";
 511                         reg = <0x10>;
 512                         interrupt-parent = <&gpio>;
 513                         interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
 514                 };
 515
 516                 temperature-sensor@4c {
 517                         compatible = "ti,tmp451";
 518                         reg = <0x4c>;
 519                         interrupt-parent = <&gpio>;
 520                         interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
 521
 522                         #thermal-sensor-cells = <1>;
 523                 };
 524         };
 525
 526         i2c@0,7000c400 {
 527                 status = "okay";
 528                 clock-frequency = <100000>;
 529         };
 530
 531         i2c@0,7000c500 {
 532                 status = "okay";
 533                 clock-frequency = <400000>;
 534
 535                 tpm@20 {
 536                         compatible = "infineon,slb9645tt";
 537                         reg = <0x20>;
 538                 };
 539         };
 540
 541         hdmi_ddc: i2c@0,7000c700 {
 542                 status = "okay";
 543                 clock-frequency = <100000>;
 544         };
 545
 546         i2c@0,7000d000 {
 547                 status = "okay";
 548                 clock-frequency = <400000>;
 549
 550                 pmic: pmic@40 {
 551                         compatible = "ams,as3722";
 552                         reg = <0x40>;
 553                         interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
 554
 555                         ams,system-power-controller;
 556
 557                         #interrupt-cells = <2>;
 558                         interrupt-controller;
 559
 560                         gpio-controller;
 561                         #gpio-cells = <2>;
 562
 563                         pinctrl-names = "default";
 564                         pinctrl-0 = <&as3722_default>;
 565
 566                         as3722_default: pinmux {
 567                                 gpio0 {
 568                                         pins = "gpio0";
 569                                         function = "gpio";
 570                                         bias-pull-down;
 571                                 };
 572
 573                                 gpio1 {
 574                                         pins = "gpio1";
 575                                         function = "gpio";
 576                                         bias-pull-up;
 577                                 };
 578
 579                                 gpio2_4_7 {
 580                                         pins = "gpio2", "gpio4", "gpio7";
 581                                         function = "gpio";
 582                                         bias-pull-up;
 583                                 };
 584
 585                                 gpio3_6 {
 586                                         pins = "gpio3", "gpio6";
 587                                         bias-high-impedance;
 588                                 };
 589
 590                                 gpio5 {
 591                                         pins = "gpio5";
 592                                         function = "clk32k-out";
 593                                         bias-pull-down;
 594                                 };
 595                         };
 596
 597                         regulators {
 598                                 vsup-sd2-supply = <&vdd_5v0_sys>;
 599                                 vsup-sd3-supply = <&vdd_5v0_sys>;
 600                                 vsup-sd4-supply = <&vdd_5v0_sys>;
 601                                 vsup-sd5-supply = <&vdd_5v0_sys>;
 602                                 vin-ldo0-supply = <&vdd_1v35_lp0>;
 603                                 vin-ldo1-6-supply = <&vdd_3v3_run>;
 604                                 vin-ldo2-5-7-supply = <&vddio_1v8>;
 605                                 vin-ldo3-4-supply = <&vdd_3v3_sys>;
 606                                 vin-ldo9-10-supply = <&vdd_5v0_sys>;
 607                                 vin-ldo11-supply = <&vdd_3v3_run>;
 608
 609                                 sd0 {
 610                                         regulator-name = "+VDD_CPU_AP";
 611                                         regulator-min-microvolt = <700000>;
 612                                         regulator-max-microvolt = <1350000>;
 613                                         regulator-min-microamp = <3500000>;
 614                                         regulator-max-microamp = <3500000>;
 615                                         regulator-always-on;
 616                                         regulator-boot-on;
 617                                         ams,ext-control = <2>;
 618                                 };
 619
 620                                 sd1 {
 621                                         regulator-name = "+VDD_CORE";
 622                                         regulator-min-microvolt = <700000>;
 623                                         regulator-max-microvolt = <1350000>;
 624                                         regulator-min-microamp = <2500000>;
 625                                         regulator-max-microamp = <4000000>;
 626                                         regulator-always-on;
 627                                         regulator-boot-on;
 628                                         ams,ext-control = <1>;
 629                                 };
 630
 631                                 vdd_1v35_lp0: sd2 {
 632                                         regulator-name = "+1.35V_LP0(sd2)";
 633                                         regulator-min-microvolt = <1350000>;
 634                                         regulator-max-microvolt = <1350000>;
 635                                         regulator-always-on;
 636                                         regulator-boot-on;
 637                                 };
 638
 639                                 sd3 {
 640                                         regulator-name = "+1.35V_LP0(sd3)";
 641                                         regulator-min-microvolt = <1350000>;
 642                                         regulator-max-microvolt = <1350000>;
 643                                         regulator-always-on;
 644                                         regulator-boot-on;
 645                                 };
 646
 647                                 vdd_1v05_run: sd4 {
 648                                         regulator-name = "+1.05V_RUN";
 649                                         regulator-min-microvolt = <1050000>;
 650                                         regulator-max-microvolt = <1050000>;
 651                                 };
 652
 653                                 vddio_1v8: sd5 {
 654                                         regulator-name = "+1.8V_VDDIO";
 655                                         regulator-min-microvolt = <1800000>;
 656                                         regulator-max-microvolt = <1800000>;
 657                                         regulator-boot-on;
 658                                         regulator-always-on;
 659                                 };
 660
 661                                 sd6 {
 662                                         regulator-name = "+VDD_GPU_AP";
 663                                         regulator-min-microvolt = <650000>;
 664                                         regulator-max-microvolt = <1200000>;
 665                                         regulator-min-microamp = <3500000>;
 666                                         regulator-max-microamp = <3500000>;
 667                                         regulator-boot-on;
 668                                         regulator-always-on;
 669                                 };
 670
 671                                 ldo0 {
 672                                         regulator-name = "+1.05V_RUN_AVDD";
 673                                         regulator-min-microvolt = <1050000>;
 674                                         regulator-max-microvolt = <1050000>;
 675                                         regulator-boot-on;
 676                                         regulator-always-on;
 677                                         ams,ext-control = <1>;
 678                                 };
 679
 680                                 ldo1 {
 681                                         regulator-name = "+1.8V_RUN_CAM";
 682                                         regulator-min-microvolt = <1800000>;
 683                                         regulator-max-microvolt = <1800000>;
 684                                 };
 685
 686                                 ldo2 {
 687                                         regulator-name = "+1.2V_GEN_AVDD";
 688                                         regulator-min-microvolt = <1200000>;
 689                                         regulator-max-microvolt = <1200000>;
 690                                         regulator-boot-on;
 691                                         regulator-always-on;
 692                                 };
 693
 694                                 ldo3 {
 695                                         regulator-name = "+1.00V_LP0_VDD_RTC";
 696                                         regulator-min-microvolt = <1000000>;
 697                                         regulator-max-microvolt = <1000000>;
 698                                         regulator-boot-on;
 699                                         regulator-always-on;
 700                                         ams,enable-tracking;
 701                                 };
 702
 703                                 vdd_run_cam: ldo4 {
 704                                         regulator-name = "+3.3V_RUN_CAM";
 705                                         regulator-min-microvolt = <2800000>;
 706                                         regulator-max-microvolt = <2800000>;
 707                                 };
 708
 709                                 ldo5 {
 710                                         regulator-name = "+1.2V_RUN_CAM_FRONT";
 711                                         regulator-min-microvolt = <1200000>;
 712                                         regulator-max-microvolt = <1200000>;
 713                                 };
 714
 715                                 vddio_sdmmc3: ldo6 {
 716                                         regulator-name = "+VDDIO_SDMMC3";
 717                                         regulator-min-microvolt = <1800000>;
 718                                         regulator-max-microvolt = <3300000>;
 719                                 };
 720
 721                                 ldo7 {
 722                                         regulator-name = "+1.05V_RUN_CAM_REAR";
 723                                         regulator-min-microvolt = <1050000>;
 724                                         regulator-max-microvolt = <1050000>;
 725                                 };
 726
 727                                 ldo9 {
 728                                         regulator-name = "+2.8V_RUN_TOUCH";
 729                                         regulator-min-microvolt = <2800000>;
 730                                         regulator-max-microvolt = <2800000>;
 731                                 };
 732
 733                                 ldo10 {
 734                                         regulator-name = "+2.8V_RUN_CAM_AF";
 735                                         regulator-min-microvolt = <2800000>;
 736                                         regulator-max-microvolt = <2800000>;
 737                                 };
 738
 739                                 ldo11 {
 740                                         regulator-name = "+1.8V_RUN_VPP_FUSE";
 741                                         regulator-min-microvolt = <1800000>;
 742                                         regulator-max-microvolt = <1800000>;
 743                                 };
 744                         };
 745                 };
 746         };
 747
 748         spi@0,7000d400 {
 749                 status = "okay";
 750
 751                 cros_ec: cros-ec@0 {
 752                         compatible = "google,cros-ec-spi";
 753                         spi-max-frequency = <3000000>;
 754                         interrupt-parent = <&gpio>;
 755                         interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
 756                         reg = <0>;
 757
 758                         google,cros-ec-spi-msg-delay = <2000>;
 759
 760                         i2c-tunnel {
 761                                 compatible = "google,cros-ec-i2c-tunnel";
 762                                 #address-cells = <1>;
 763                                 #size-cells = <0>;
 764
 765                                 google,remote-bus = <0>;
 766
 767                                 charger: bq24735@9 {
 768                                         compatible = "ti,bq24735";
 769                                         reg = <0x9>;
 770                                         interrupt-parent = <&gpio>;
 771                                         interrupts = <TEGRA_GPIO(J, 0)
 772                                                         GPIO_ACTIVE_HIGH>;
 773                                         ti,ac-detect-gpios = <&gpio
 774                                                         TEGRA_GPIO(J, 0)
 775                                                         GPIO_ACTIVE_HIGH>;
 776                                 };
 777
 778                                 battery: sbs-battery@b {
 779                                         compatible = "sbs,sbs-battery";
 780                                         reg = <0xb>;
 781                                         sbs,i2c-retry-count = <2>;
 782                                         sbs,poll-retry-count = <10>;
 783                                         power-supplies = <&charger>;
 784                                 };
 785                         };
 786                 };
 787         };
 788
 789         spi@0,7000da00 {
 790                 status = "okay";
 791                 spi-max-frequency = <25000000>;
 792
 793                 flash@0 {
 794                         compatible = "winbond,w25q32dw";
 795                         reg = <0>;
 796                 };
 797         };
 798
 799         pmc@0,7000e400 {
 800                 nvidia,invert-interrupt;
 801                 nvidia,suspend-mode = <0>;
 802                 nvidia,cpu-pwr-good-time = <500>;
 803                 nvidia,cpu-pwr-off-time = <300>;
 804                 nvidia,core-pwr-good-time = <641 3845>;
 805                 nvidia,core-pwr-off-time = <61036>;
 806                 nvidia,core-power-req-active-high;
 807                 nvidia,sys-clock-req-active-high;
 808         };
 809
 810         hda@0,70030000 {
 811                 status = "okay";
 812         };
 813
 814         sdhci@0,700b0000 { /* WiFi/BT on this bus */
 815                 status = "okay";
 816                 power-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
 817                 bus-width = <4>;
 818                 no-1-8-v;
 819                 non-removable;
 820         };
 821
 822         sdhci@0,700b0400 { /* SD Card on this bus */
 823                 status = "okay";
 824                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 825                 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
 826                 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
 827                 bus-width = <4>;
 828                 no-1-8-v;
 829                 vqmmc-supply = <&vddio_sdmmc3>;
 830         };
 831
 832         sdhci@0,700b0600 { /* eMMC on this bus */
 833                 status = "okay";
 834                 bus-width = <8>;
 835                 no-1-8-v;
 836                 non-removable;
 837         };
 838
 839         ahub@0,70300000 {
 840                 i2s@0,70301100 {
 841                         status = "okay";
 842                 };
 843         };
 844
 845         usb@0,7d000000 { /* Rear external USB port. */
 846                 status = "okay";
 847         };
 848
 849         usb-phy@0,7d000000 {
 850                 status = "okay";
 851                 vbus-supply = <&vdd_usb1_vbus>;
 852         };
 853
 854         usb@0,7d004000 { /* Internal webcam. */
 855                 status = "okay";
 856         };
 857
 858         usb-phy@0,7d004000 {
 859                 status = "okay";
 860                 vbus-supply = <&vdd_run_cam>;
 861         };
 862
 863         usb@0,7d008000 { /* Left external USB port. */
 864                 status = "okay";
 865         };
 866
 867         usb-phy@0,7d008000 {
 868                 status = "okay";
 869                 vbus-supply = <&vdd_usb3_vbus>;
 870         };
 871
 872         backlight: backlight {
 873                 compatible = "pwm-backlight";
 874
 875                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
 876                 power-supply = <&vdd_led>;
 877                 pwms = <&pwm 1 1000000>;
 878
 879                 default-brightness-level = <224>;
 880                 brightness-levels =
 881                         <  0   1   2   3   4   5   6   7
 882                            8   9  10  11  12  13  14  15
 883                           16  17  18  19  20  21  22  23
 884                           24  25  26  27  28  29  30  31
 885                           32  33  34  35  36  37  38  39
 886                           40  41  42  43  44  45  46  47
 887                           48  49  50  51  52  53  54  55
 888                           56  57  58  59  60  61  62  63
 889                           64  65  66  67  68  69  70  71
 890                           72  73  74  75  76  77  78  79
 891                           80  81  82  83  84  85  86  87
 892                           88  89  90  91  92  93  94  95
 893                           96  97  98  99 100 101 102 103
 894                          104 105 106 107 108 109 110 111
 895                          112 113 114 115 116 117 118 119
 896                          120 121 122 123 124 125 126 127
 897                          128 129 130 131 132 133 134 135
 898                          136 137 138 139 140 141 142 143
 899                          144 145 146 147 148 149 150 151
 900                          152 153 154 155 156 157 158 159
 901                          160 161 162 163 164 165 166 167
 902                          168 169 170 171 172 173 174 175
 903                          176 177 178 179 180 181 182 183
 904                          184 185 186 187 188 189 190 191
 905                          192 193 194 195 196 197 198 199
 906                          200 201 202 203 204 205 206 207
 907                          208 209 210 211 212 213 214 215
 908                          216 217 218 219 220 221 222 223
 909                          224 225 226 227 228 229 230 231
 910                          232 233 234 235 236 237 238 239
 911                          240 241 242 243 244 245 246 247
 912                          248 249 250 251 252 253 254 255
 913                          256>;
 914         };
 915
 916         clocks {
 917                 compatible = "simple-bus";
 918                 #address-cells = <1>;
 919                 #size-cells = <0>;
 920
 921                 clk32k_in: clock@0 {
 922                         compatible = "fixed-clock";
 923                         reg = <0>;
 924                         #clock-cells = <0>;
 925                         clock-frequency = <32768>;
 926                 };
 927         };
 928
 929         gpio-keys {
 930                 compatible = "gpio-keys";
 931
 932                 lid {
 933                         label = "Lid";
 934                         gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
 935                         linux,input-type = <5>;
 936                         linux,code = <KEY_RESERVED>;
 937                         debounce-interval = <1>;
 938                         gpio-key,wakeup;
 939                 };
 940
 941                 power {
 942                         label = "Power";
 943                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
 944                         linux,code = <KEY_POWER>;
 945                         debounce-interval = <30>;
 946                         gpio-key,wakeup;
 947                 };
 948         };
 949
 950         panel: panel {
 951                 compatible = "auo,b133xtn01";
 952
 953                 backlight = <&backlight>;
 954                 ddc-i2c-bus = <&dpaux>;
 955         };
 956
 957         regulators {
 958                 compatible = "simple-bus";
 959                 #address-cells = <1>;
 960                 #size-cells = <0>;
 961
 962                 vdd_mux: regulator@0 {
 963                         compatible = "regulator-fixed";
 964                         reg = <0>;
 965                         regulator-name = "+VDD_MUX";
 966                         regulator-min-microvolt = <12000000>;
 967                         regulator-max-microvolt = <12000000>;
 968                         regulator-always-on;
 969                         regulator-boot-on;
 970                 };
 971
 972                 vdd_5v0_sys: regulator@1 {
 973                         compatible = "regulator-fixed";
 974                         reg = <1>;
 975                         regulator-name = "+5V_SYS";
 976                         regulator-min-microvolt = <5000000>;
 977                         regulator-max-microvolt = <5000000>;
 978                         regulator-always-on;
 979                         regulator-boot-on;
 980                         vin-supply = <&vdd_mux>;
 981                 };
 982
 983                 vdd_3v3_sys: regulator@2 {
 984                         compatible = "regulator-fixed";
 985                         reg = <2>;
 986                         regulator-name = "+3.3V_SYS";
 987                         regulator-min-microvolt = <3300000>;
 988                         regulator-max-microvolt = <3300000>;
 989                         regulator-always-on;
 990                         regulator-boot-on;
 991                         vin-supply = <&vdd_mux>;
 992                 };
 993
 994                 vdd_3v3_run: regulator@3 {
 995                         compatible = "regulator-fixed";
 996                         reg = <3>;
 997                         regulator-name = "+3.3V_RUN";
 998                         regulator-min-microvolt = <3300000>;
 999                         regulator-max-microvolt = <3300000>;
1000                         regulator-always-on;
1001                         regulator-boot-on;
1002                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1003                         enable-active-high;
1004                         vin-supply = <&vdd_3v3_sys>;
1005                 };
1006
1007                 vdd_3v3_hdmi: regulator@4 {
1008                         compatible = "regulator-fixed";
1009                         reg = <4>;
1010                         regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1011                         regulator-min-microvolt = <3300000>;
1012                         regulator-max-microvolt = <3300000>;
1013                         vin-supply = <&vdd_3v3_run>;
1014                 };
1015
1016                 vdd_led: regulator@5 {
1017                         compatible = "regulator-fixed";
1018                         reg = <5>;
1019                         regulator-name = "+VDD_LED";
1020                         gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1021                         enable-active-high;
1022                         vin-supply = <&vdd_mux>;
1023                 };
1024
1025                 vdd_5v0_ts: regulator@6 {
1026                         compatible = "regulator-fixed";
1027                         reg = <6>;
1028                         regulator-name = "+5V_VDD_TS_SW";
1029                         regulator-min-microvolt = <5000000>;
1030                         regulator-max-microvolt = <5000000>;
1031                         regulator-boot-on;
1032                         gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1033                         enable-active-high;
1034                         vin-supply = <&vdd_5v0_sys>;
1035                 };
1036
1037                 vdd_usb1_vbus: regulator@7 {
1038                         compatible = "regulator-fixed";
1039                         reg = <7>;
1040                         regulator-name = "+5V_USB_HS";
1041                         regulator-min-microvolt = <5000000>;
1042                         regulator-max-microvolt = <5000000>;
1043                         gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1044                         enable-active-high;
1045                         gpio-open-drain;
1046                         vin-supply = <&vdd_5v0_sys>;
1047                 };
1048
1049                 vdd_usb3_vbus: regulator@8 {
1050                         compatible = "regulator-fixed";
1051                         reg = <8>;
1052                         regulator-name = "+5V_USB_SS";
1053                         regulator-min-microvolt = <5000000>;
1054                         regulator-max-microvolt = <5000000>;
1055                         gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1056                         enable-active-high;
1057                         gpio-open-drain;
1058                         vin-supply = <&vdd_5v0_sys>;
1059                 };
1060
1061                 vdd_3v3_panel: regulator@9 {
1062                         compatible = "regulator-fixed";
1063                         reg = <9>;
1064                         regulator-name = "+3.3V_PANEL";
1065                         regulator-min-microvolt = <3300000>;
1066                         regulator-max-microvolt = <3300000>;
1067                         gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
1068                         enable-active-high;
1069                         vin-supply = <&vdd_3v3_run>;
1070                 };
1071
1072                 vdd_3v3_lp0: regulator@10 {
1073                         compatible = "regulator-fixed";
1074                         reg = <10>;
1075                         regulator-name = "+3.3V_LP0";
1076                         regulator-min-microvolt = <3300000>;
1077                         regulator-max-microvolt = <3300000>;
1078                         /*
1079                          * TODO: find a way to wire this up with the USB EHCI
1080                          * controllers so that it can be enabled on demand.
1081                          */
1082                         regulator-always-on;
1083                         gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1084                         enable-active-high;
1085                         vin-supply = <&vdd_3v3_sys>;
1086                 };
1087
1088                 vdd_hdmi_pll: regulator@11 {
1089                         compatible = "regulator-fixed";
1090                         reg = <11>;
1091                         regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1092                         regulator-min-microvolt = <1050000>;
1093                         regulator-max-microvolt = <1050000>;
1094                         gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1095                         vin-supply = <&vdd_1v05_run>;
1096                 };
1097
1098                 vdd_5v0_hdmi: regulator@12 {
1099                         compatible = "regulator-fixed";
1100                         reg = <12>;
1101                         regulator-name = "+5V_HDMI_CON";
1102                         regulator-min-microvolt = <5000000>;
1103                         regulator-max-microvolt = <5000000>;
1104                         gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1105                         enable-active-high;
1106                         vin-supply = <&vdd_5v0_sys>;
1107                 };
1108         };
1109
1110         sound {
1111                 compatible = "nvidia,tegra-audio-max98090-nyan-big",
1112                              "nvidia,tegra-audio-max98090";
1113                 nvidia,model = "Acer Chromebook 13";
1114
1115                 nvidia,audio-routing =
1116                         "Headphones", "HPR",
1117                         "Headphones", "HPL",
1118                         "Speakers", "SPKR",
1119                         "Speakers", "SPKL",
1120                         "Mic Jack", "MICBIAS",
1121                         "DMICL", "Int Mic",
1122                         "DMICR", "Int Mic",
1123                         "IN34", "Mic Jack";
1124
1125                 nvidia,i2s-controller = <&tegra_i2s1>;
1126                 nvidia,audio-codec = <&acodec>;
1127
1128                 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1129                          <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1130                          <&tegra_car TEGRA124_CLK_EXTERN1>;
1131                 clock-names = "pll_a", "pll_a_out0", "mclk";
1132
1133                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>;
1134         };
1135 };
1136
1137 #include "cros-ec-keyboard.dtsi"