arch/arm/boot/dts/tegra124-jetson-tk1.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra124.dtsi"
   5
   6 / {
   7         model = "NVIDIA Tegra124 Jetson TK1";
   8         compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
   9
  10         aliases {
  11                 rtc0 = "/i2c@0,7000d000/pmic@40";
  12                 rtc1 = "/rtc@0,7000e000";
  13         };
  14
  15         memory {
  16                 reg = <0x0 0x80000000 0x0 0x80000000>;
  17         };
  18
  19         pcie-controller@0,01003000 {
  20                 status = "okay";
  21
  22                 avddio-pex-supply = <&vdd_1v05_run>;
  23                 dvddio-pex-supply = <&vdd_1v05_run>;
  24                 avdd-pex-pll-supply = <&vdd_1v05_run>;
  25                 hvdd-pex-supply = <&vdd_3v3_lp0>;
  26                 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
  27                 vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
  28                 avdd-pll-erefe-supply = <&avdd_1v05_run>;
  29
  30                 pci@1,0 {
  31                         status = "okay";
  32                 };
  33
  34                 pci@2,0 {
  35                         status = "okay";
  36                 };
  37         };
  38
  39         host1x@0,50000000 {
  40                 hdmi@0,54280000 {
  41                         status = "okay";
  42
  43                         hdmi-supply = <&vdd_5v0_hdmi>;
  44                         pll-supply = <&vdd_hdmi_pll>;
  45                         vdd-supply = <&vdd_3v3_hdmi>;
  46
  47                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  48                         nvidia,hpd-gpio =
  49                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  50                 };
  51         };
  52
  53         pinmux: pinmux@0,70000868 {
  54                 pinctrl-names = "boot";
  55                 pinctrl-0 = <&state_boot>;
  56
  57                 state_boot: pinmux {
  58                         clk_32k_out_pa0 {
  59                                 nvidia,pins = "clk_32k_out_pa0";
  60                                 nvidia,function = "soc";
  61                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
  62                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  63                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  64                         };
  65                         uart3_cts_n_pa1 {
  66                                 nvidia,pins = "uart3_cts_n_pa1";
  67                                 nvidia,function = "uartc";
  68                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
  69                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  70                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  71                         };
  72                         dap2_fs_pa2 {
  73                                 nvidia,pins = "dap2_fs_pa2";
  74                                 nvidia,function = "i2s1";
  75                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  76                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  77                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  78                         };
  79                         dap2_sclk_pa3 {
  80                                 nvidia,pins = "dap2_sclk_pa3";
  81                                 nvidia,function = "i2s1";
  82                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  83                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  84                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  85                         };
  86                         dap2_din_pa4 {
  87                                 nvidia,pins = "dap2_din_pa4";
  88                                 nvidia,function = "i2s1";
  89                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  90                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  91                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  92                         };
  93                         dap2_dout_pa5 {
  94                                 nvidia,pins = "dap2_dout_pa5";
  95                                 nvidia,function = "i2s1";
  96                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  97                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  98                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  99                         };
 100                         sdmmc3_clk_pa6 {
 101                                 nvidia,pins = "sdmmc3_clk_pa6";
 102                                 nvidia,function = "sdmmc3";
 103                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 104                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 105                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 106                         };
 107                         sdmmc3_cmd_pa7 {
 108                                 nvidia,pins = "sdmmc3_cmd_pa7";
 109                                 nvidia,function = "sdmmc3";
 110                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 111                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 112                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 113                         };
 114                         pb0 {
 115                                 nvidia,pins = "pb0";
 116                                 nvidia,function = "uartd";
 117                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 118                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 119                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 120                         };
 121                         pb1 {
 122                                 nvidia,pins = "pb1";
 123                                 nvidia,function = "uartd";
 124                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 125                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 126                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 127                         };
 128                         sdmmc3_dat3_pb4 {
 129                                 nvidia,pins = "sdmmc3_dat3_pb4";
 130                                 nvidia,function = "sdmmc3";
 131                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 132                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 133                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 134                         };
 135                         sdmmc3_dat2_pb5 {
 136                                 nvidia,pins = "sdmmc3_dat2_pb5";
 137                                 nvidia,function = "sdmmc3";
 138                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 139                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 140                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 141                         };
 142                         sdmmc3_dat1_pb6 {
 143                                 nvidia,pins = "sdmmc3_dat1_pb6";
 144                                 nvidia,function = "sdmmc3";
 145                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 146                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 147                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 148                         };
 149                         sdmmc3_dat0_pb7 {
 150                                 nvidia,pins = "sdmmc3_dat0_pb7";
 151                                 nvidia,function = "sdmmc3";
 152                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 153                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 154                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 155                         };
 156                         uart3_rts_n_pc0 {
 157                                 nvidia,pins = "uart3_rts_n_pc0";
 158                                 nvidia,function = "uartc";
 159                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 160                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 161                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 162                         };
 163                         uart2_txd_pc2 {
 164                                 nvidia,pins = "uart2_txd_pc2";
 165                                 nvidia,function = "irda";
 166                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 167                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 168                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 169                         };
 170                         uart2_rxd_pc3 {
 171                                 nvidia,pins = "uart2_rxd_pc3";
 172                                 nvidia,function = "irda";
 173                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 174                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 175                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 176                         };
 177                         gen1_i2c_scl_pc4 {
 178                                 nvidia,pins = "gen1_i2c_scl_pc4";
 179                                 nvidia,function = "i2c1";
 180                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 181                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 182                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 183                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 184                         };
 185                         gen1_i2c_sda_pc5 {
 186                                 nvidia,pins = "gen1_i2c_sda_pc5";
 187                                 nvidia,function = "i2c1";
 188                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 189                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 190                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 191                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 192                         };
 193                         pc7 {
 194                                 nvidia,pins = "pc7";
 195                                 nvidia,function = "rsvd1";
 196                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 197                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 198                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 199                         };
 200                         pg0 {
 201                                 nvidia,pins = "pg0";
 202                                 nvidia,function = "rsvd1";
 203                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 204                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 205                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 206                         };
 207                         pg1 {
 208                                 nvidia,pins = "pg1";
 209                                 nvidia,function = "rsvd1";
 210                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 211                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 212                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 213                         };
 214                         pg2 {
 215                                 nvidia,pins = "pg2";
 216                                 nvidia,function = "rsvd1";
 217                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 218                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 219                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 220                         };
 221                         pg3 {
 222                                 nvidia,pins = "pg3";
 223                                 nvidia,function = "rsvd1";
 224                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 225                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 226                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 227                         };
 228                         pg4 {
 229                                 nvidia,pins = "pg4";
 230                                 nvidia,function = "spi4";
 231                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 232                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 233                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 234                         };
 235                         pg5 {
 236                                 nvidia,pins = "pg5";
 237                                 nvidia,function = "spi4";
 238                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 239                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 240                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 241                         };
 242                         pg6 {
 243                                 nvidia,pins = "pg6";
 244                                 nvidia,function = "spi4";
 245                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 246                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 247                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 248                         };
 249                         pg7 {
 250                                 nvidia,pins = "pg7";
 251                                 nvidia,function = "spi4";
 252                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 253                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 254                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 255                         };
 256                         ph0 {
 257                                 nvidia,pins = "ph0";
 258                                 nvidia,function = "gmi";
 259                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 260                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 261                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 262                         };
 263                         ph1 {
 264                                 nvidia,pins = "ph1";
 265                                 nvidia,function = "pwm1";
 266                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 267                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 268                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 269                         };
 270                         ph2 {
 271                                 nvidia,pins = "ph2";
 272                                 nvidia,function = "gmi";
 273                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 274                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 275                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 276                         };
 277                         ph3 {
 278                                 nvidia,pins = "ph3";
 279                                 nvidia,function = "gmi";
 280                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 281                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 282                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 283                         };
 284                         ph4 {
 285                                 nvidia,pins = "ph4";
 286                                 nvidia,function = "rsvd2";
 287                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 288                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 289                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 290                         };
 291                         ph5 {
 292                                 nvidia,pins = "ph5";
 293                                 nvidia,function = "rsvd2";
 294                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 295                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 296                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 297                         };
 298                         ph6 {
 299                                 nvidia,pins = "ph6";
 300                                 nvidia,function = "gmi";
 301                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 302                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 303                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 304                         };
 305                         ph7 {
 306                                 nvidia,pins = "ph7";
 307                                 nvidia,function = "gmi";
 308                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 309                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 310                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 311                         };
 312                         pi0 {
 313                                 nvidia,pins = "pi0";
 314                                 nvidia,function = "rsvd1";
 315                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 316                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 317                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 318                         };
 319                         pi1 {
 320                                 nvidia,pins = "pi1";
 321                                 nvidia,function = "rsvd1";
 322                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 323                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 324                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 325                         };
 326                         pi2 {
 327                                 nvidia,pins = "pi2";
 328                                 nvidia,function = "rsvd4";
 329                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 330                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 331                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 332                         };
 333                         pi3 {
 334                                 nvidia,pins = "pi3";
 335                                 nvidia,function = "spi4";
 336                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 337                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 338                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 339                         };
 340                         pi4 {
 341                                 nvidia,pins = "pi4";
 342                                 nvidia,function = "gmi";
 343                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 344                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 345                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 346                         };
 347                         pi5 {
 348                                 nvidia,pins = "pi5";
 349                                 nvidia,function = "rsvd2";
 350                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 351                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 352                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 353                         };
 354                         pi6 {
 355                                 nvidia,pins = "pi6";
 356                                 nvidia,function = "rsvd1";
 357                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 358                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 359                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 360                         };
 361                         pi7 {
 362                                 nvidia,pins = "pi7";
 363                                 nvidia,function = "rsvd1";
 364                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 365                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 366                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 367                         };
 368                         pj0 {
 369                                 nvidia,pins = "pj0";
 370                                 nvidia,function = "rsvd1";
 371                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 372                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 373                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 374                         };
 375                         pj2 {
 376                                 nvidia,pins = "pj2";
 377                                 nvidia,function = "rsvd1";
 378                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 379                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 380                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 381                         };
 382                         uart2_cts_n_pj5 {
 383                                 nvidia,pins = "uart2_cts_n_pj5";
 384                                 nvidia,function = "uartb";
 385                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 386                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 387                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 388                         };
 389                         uart2_rts_n_pj6 {
 390                                 nvidia,pins = "uart2_rts_n_pj6";
 391                                 nvidia,function = "uartb";
 392                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 393                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 394                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 395                         };
 396                         pj7 {
 397                                 nvidia,pins = "pj7";
 398                                 nvidia,function = "uartd";
 399                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 400                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 401                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 402                         };
 403                         pk0 {
 404                                 nvidia,pins = "pk0";
 405                                 nvidia,function = "soc";
 406                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 407                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 408                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 409                         };
 410                         pk1 {
 411                                 nvidia,pins = "pk1";
 412                                 nvidia,function = "rsvd4";
 413                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 414                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 415                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 416                         };
 417                         pk2 {
 418                                 nvidia,pins = "pk2";
 419                                 nvidia,function = "rsvd1";
 420                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 421                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 422                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 423                         };
 424                         pk3 {
 425                                 nvidia,pins = "pk3";
 426                                 nvidia,function = "gmi";
 427                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 428                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 429                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 430                         };
 431                         pk4 {
 432                                 nvidia,pins = "pk4";
 433                                 nvidia,function = "rsvd2";
 434                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 435                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 436                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 437                         };
 438                         spdif_out_pk5 {
 439                                 nvidia,pins = "spdif_out_pk5";
 440                                 nvidia,function = "rsvd2";
 441                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 442                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 443                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 444                         };
 445                         spdif_in_pk6 {
 446                                 nvidia,pins = "spdif_in_pk6";
 447                                 nvidia,function = "rsvd2";
 448                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 449                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 450                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 451                         };
 452                         pk7 {
 453                                 nvidia,pins = "pk7";
 454                                 nvidia,function = "uartd";
 455                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 456                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 457                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 458                         };
 459                         dap1_fs_pn0 {
 460                                 nvidia,pins = "dap1_fs_pn0";
 461                                 nvidia,function = "i2s0";
 462                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 463                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 464                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 465                         };
 466                         dap1_din_pn1 {
 467                                 nvidia,pins = "dap1_din_pn1";
 468                                 nvidia,function = "i2s0";
 469                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 470                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 471                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 472                         };
 473                         dap1_dout_pn2 {
 474                                 nvidia,pins = "dap1_dout_pn2";
 475                                 nvidia,function = "sata";
 476                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 477                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 478                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 479                         };
 480                         dap1_sclk_pn3 {
 481                                 nvidia,pins = "dap1_sclk_pn3";
 482                                 nvidia,function = "i2s0";
 483                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 484                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 485                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 486                         };
 487                         usb_vbus_en0_pn4 {
 488                                 nvidia,pins = "usb_vbus_en0_pn4";
 489                                 nvidia,function = "usb";
 490                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 491                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 492                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 493                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 494                         };
 495                         usb_vbus_en1_pn5 {
 496                                 nvidia,pins = "usb_vbus_en1_pn5";
 497                                 nvidia,function = "usb";
 498                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 499                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 500                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 501                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 502                         };
 503                         hdmi_int_pn7 {
 504                                 nvidia,pins = "hdmi_int_pn7";
 505                                 nvidia,function = "rsvd1";
 506                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 507                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 508                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 509                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
 510                         };
 511                         ulpi_data7_po0 {
 512                                 nvidia,pins = "ulpi_data7_po0";
 513                                 nvidia,function = "ulpi";
 514                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 515                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 516                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 517                         };
 518                         ulpi_data0_po1 {
 519                                 nvidia,pins = "ulpi_data0_po1";
 520                                 nvidia,function = "ulpi";
 521                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 522                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 523                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 524                         };
 525                         ulpi_data1_po2 {
 526                                 nvidia,pins = "ulpi_data1_po2";
 527                                 nvidia,function = "ulpi";
 528                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 529                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 530                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 531                         };
 532                         ulpi_data2_po3 {
 533                                 nvidia,pins = "ulpi_data2_po3";
 534                                 nvidia,function = "ulpi";
 535                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 536                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 537                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 538                         };
 539                         ulpi_data3_po4 {
 540                                 nvidia,pins = "ulpi_data3_po4";
 541                                 nvidia,function = "ulpi";
 542                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 543                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 544                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 545                         };
 546                         ulpi_data4_po5 {
 547                                 nvidia,pins = "ulpi_data4_po5";
 548                                 nvidia,function = "ulpi";
 549                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 550                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 551                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 552                         };
 553                         ulpi_data5_po6 {
 554                                 nvidia,pins = "ulpi_data5_po6";
 555                                 nvidia,function = "ulpi";
 556                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 557                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 558                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 559                         };
 560                         ulpi_data6_po7 {
 561                                 nvidia,pins = "ulpi_data6_po7";
 562                                 nvidia,function = "ulpi";
 563                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 564                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 565                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 566                         };
 567                         dap3_fs_pp0 {
 568                                 nvidia,pins = "dap3_fs_pp0";
 569                                 nvidia,function = "i2s2";
 570                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 571                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 572                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 573                         };
 574                         dap3_din_pp1 {
 575                                 nvidia,pins = "dap3_din_pp1";
 576                                 nvidia,function = "i2s2";
 577                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 578                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 579                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 580                         };
 581                         dap3_dout_pp2 {
 582                                 nvidia,pins = "dap3_dout_pp2";
 583                                 nvidia,function = "rsvd4";
 584                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 585                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 586                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 587                         };
 588                         dap3_sclk_pp3 {
 589                                 nvidia,pins = "dap3_sclk_pp3";
 590                                 nvidia,function = "rsvd3";
 591                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 592                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 593                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 594                         };
 595                         dap4_fs_pp4 {
 596                                 nvidia,pins = "dap4_fs_pp4";
 597                                 nvidia,function = "i2s3";
 598                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 599                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 600                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 601                         };
 602                         dap4_din_pp5 {
 603                                 nvidia,pins = "dap4_din_pp5";
 604                                 nvidia,function = "i2s3";
 605                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 606                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 607                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 608                         };
 609                         dap4_dout_pp6 {
 610                                 nvidia,pins = "dap4_dout_pp6";
 611                                 nvidia,function = "i2s3";
 612                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 613                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 614                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 615                         };
 616                         dap4_sclk_pp7 {
 617                                 nvidia,pins = "dap4_sclk_pp7";
 618                                 nvidia,function = "i2s3";
 619                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 620                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 621                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 622                         };
 623                         kb_col0_pq0 {
 624                                 nvidia,pins = "kb_col0_pq0";
 625                                 nvidia,function = "rsvd2";
 626                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 627                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 628                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 629                         };
 630                         kb_col1_pq1 {
 631                                 nvidia,pins = "kb_col1_pq1";
 632                                 nvidia,function = "rsvd2";
 633                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 634                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 635                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 636                         };
 637                         kb_col2_pq2 {
 638                                 nvidia,pins = "kb_col2_pq2";
 639                                 nvidia,function = "rsvd2";
 640                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 641                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 642                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 643                         };
 644                         kb_col3_pq3 {
 645                                 nvidia,pins = "kb_col3_pq3";
 646                                 nvidia,function = "kbc";
 647                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 648                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 649                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 650                         };
 651                         kb_col4_pq4 {
 652                                 nvidia,pins = "kb_col4_pq4";
 653                                 nvidia,function = "sdmmc3";
 654                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 655                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 656                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 657                         };
 658                         kb_col5_pq5 {
 659                                 nvidia,pins = "kb_col5_pq5";
 660                                 nvidia,function = "rsvd2";
 661                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 662                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 663                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 664                         };
 665                         kb_col6_pq6 {
 666                                 nvidia,pins = "kb_col6_pq6";
 667                                 nvidia,function = "rsvd2";
 668                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 669                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 670                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 671                         };
 672                         kb_col7_pq7 {
 673                                 nvidia,pins = "kb_col7_pq7";
 674                                 nvidia,function = "rsvd2";
 675                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 676                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 677                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 678                         };
 679                         kb_row0_pr0 {
 680                                 nvidia,pins = "kb_row0_pr0";
 681                                 nvidia,function = "rsvd2";
 682                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 683                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 684                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 685                         };
 686                         kb_row1_pr1 {
 687                                 nvidia,pins = "kb_row1_pr1";
 688                                 nvidia,function = "rsvd2";
 689                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 690                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 691                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 692                         };
 693                         kb_row2_pr2 {
 694                                 nvidia,pins = "kb_row2_pr2";
 695                                 nvidia,function = "rsvd2";
 696                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 697                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 698                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 699                         };
 700                         kb_row3_pr3 {
 701                                 nvidia,pins = "kb_row3_pr3";
 702                                 nvidia,function = "sys";
 703                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 704                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 705                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 706                         };
 707                         kb_row4_pr4 {
 708                                 nvidia,pins = "kb_row4_pr4";
 709                                 nvidia,function = "rsvd3";
 710                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 711                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 712                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 713                         };
 714                         kb_row5_pr5 {
 715                                 nvidia,pins = "kb_row5_pr5";
 716                                 nvidia,function = "rsvd3";
 717                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 718                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 719                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 720                         };
 721                         kb_row6_pr6 {
 722                                 nvidia,pins = "kb_row6_pr6";
 723                                 nvidia,function = "displaya_alt";
 724                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 725                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 726                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 727                         };
 728                         kb_row7_pr7 {
 729                                 nvidia,pins = "kb_row7_pr7";
 730                                 nvidia,function = "rsvd2";
 731                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 732                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 733                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 734                         };
 735                         kb_row8_ps0 {
 736                                 nvidia,pins = "kb_row8_ps0";
 737                                 nvidia,function = "rsvd2";
 738                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 739                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 740                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 741                         };
 742                         kb_row9_ps1 {
 743                                 nvidia,pins = "kb_row9_ps1";
 744                                 nvidia,function = "rsvd2";
 745                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 746                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 747                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 748                         };
 749                         kb_row10_ps2 {
 750                                 nvidia,pins = "kb_row10_ps2";
 751                                 nvidia,function = "rsvd2";
 752                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 753                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 754                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 755                         };
 756                         kb_row11_ps3 {
 757                                 nvidia,pins = "kb_row11_ps3";
 758                                 nvidia,function = "rsvd2";
 759                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 760                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 761                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 762                         };
 763                         kb_row12_ps4 {
 764                                 nvidia,pins = "kb_row12_ps4";
 765                                 nvidia,function = "rsvd2";
 766                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 767                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 768                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 769                         };
 770                         kb_row13_ps5 {
 771                                 nvidia,pins = "kb_row13_ps5";
 772                                 nvidia,function = "rsvd2";
 773                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 774                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 775                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 776                         };
 777                         kb_row14_ps6 {
 778                                 nvidia,pins = "kb_row14_ps6";
 779                                 nvidia,function = "rsvd2";
 780                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 781                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 782                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 783                         };
 784                         kb_row15_ps7 {
 785                                 nvidia,pins = "kb_row15_ps7";
 786                                 nvidia,function = "soc";
 787                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 788                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 789                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 790                         };
 791                         kb_row16_pt0 {
 792                                 nvidia,pins = "kb_row16_pt0";
 793                                 nvidia,function = "rsvd2";
 794                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 795                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 796                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 797                         };
 798                         kb_row17_pt1 {
 799                                 nvidia,pins = "kb_row17_pt1";
 800                                 nvidia,function = "rsvd2";
 801                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 802                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 803                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 804                         };
 805                         gen2_i2c_scl_pt5 {
 806                                 nvidia,pins = "gen2_i2c_scl_pt5";
 807                                 nvidia,function = "i2c2";
 808                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 809                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 810                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 811                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 812                         };
 813                         gen2_i2c_sda_pt6 {
 814                                 nvidia,pins = "gen2_i2c_sda_pt6";
 815                                 nvidia,function = "i2c2";
 816                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 817                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 818                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 819                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 820                         };
 821                         sdmmc4_cmd_pt7 {
 822                                 nvidia,pins = "sdmmc4_cmd_pt7";
 823                                 nvidia,function = "sdmmc4";
 824                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 825                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 826                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 827                         };
 828                         pu0 {
 829                                 nvidia,pins = "pu0";
 830                                 nvidia,function = "rsvd4";
 831                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 832                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 833                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 834                         };
 835                         pu1 {
 836                                 nvidia,pins = "pu1";
 837                                 nvidia,function = "rsvd1";
 838                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 839                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 840                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 841                         };
 842                         pu2 {
 843                                 nvidia,pins = "pu2";
 844                                 nvidia,function = "rsvd1";
 845                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 846                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 847                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 848                         };
 849                         pu3 {
 850                                 nvidia,pins = "pu3";
 851                                 nvidia,function = "gmi";
 852                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 853                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 854                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 855                         };
 856                         pu4 {
 857                                 nvidia,pins = "pu4";
 858                                 nvidia,function = "gmi";
 859                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 860                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 861                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 862                         };
 863                         pu5 {
 864                                 nvidia,pins = "pu5";
 865                                 nvidia,function = "gmi";
 866                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 867                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 868                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 869                         };
 870                         pu6 {
 871                                 nvidia,pins = "pu6";
 872                                 nvidia,function = "rsvd3";
 873                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 874                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 875                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 876                         };
 877                         pv0 {
 878                                 nvidia,pins = "pv0";
 879                                 nvidia,function = "rsvd1";
 880                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 881                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 882                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 883                         };
 884                         pv1 {
 885                                 nvidia,pins = "pv1";
 886                                 nvidia,function = "rsvd1";
 887                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 888                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 889                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 890                         };
 891                         sdmmc3_cd_n_pv2 {
 892                                 nvidia,pins = "sdmmc3_cd_n_pv2";
 893                                 nvidia,function = "sdmmc3";
 894                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 895                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 896                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 897                         };
 898                         sdmmc1_wp_n_pv3 {
 899                                 nvidia,pins = "sdmmc1_wp_n_pv3";
 900                                 nvidia,function = "sdmmc1";
 901                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 902                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 903                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 904                         };
 905                         ddc_scl_pv4 {
 906                                 nvidia,pins = "ddc_scl_pv4";
 907                                 nvidia,function = "i2c4";
 908                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 909                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 910                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 911                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
 912                         };
 913                         ddc_sda_pv5 {
 914                                 nvidia,pins = "ddc_sda_pv5";
 915                                 nvidia,function = "i2c4";
 916                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 917                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 918                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 919                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
 920                         };
 921                         gpio_w2_aud_pw2 {
 922                                 nvidia,pins = "gpio_w2_aud_pw2";
 923                                 nvidia,function = "rsvd2";
 924                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 925                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 926                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 927                         };
 928                         gpio_w3_aud_pw3 {
 929                                 nvidia,pins = "gpio_w3_aud_pw3";
 930                                 nvidia,function = "spi6";
 931                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 932                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 933                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 934                         };
 935                         dap_mclk1_pw4 {
 936                                 nvidia,pins = "dap_mclk1_pw4";
 937                                 nvidia,function = "extperiph1";
 938                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 939                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 940                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 941                         };
 942                         clk2_out_pw5 {
 943                                 nvidia,pins = "clk2_out_pw5";
 944                                 nvidia,function = "extperiph2";
 945                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 946                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 947                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 948                         };
 949                         uart3_txd_pw6 {
 950                                 nvidia,pins = "uart3_txd_pw6";
 951                                 nvidia,function = "uartc";
 952                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 953                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 954                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 955                         };
 956                         uart3_rxd_pw7 {
 957                                 nvidia,pins = "uart3_rxd_pw7";
 958                                 nvidia,function = "uartc";
 959                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 960                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 961                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 962                         };
 963                         dvfs_pwm_px0 {
 964                                 nvidia,pins = "dvfs_pwm_px0";
 965                                 nvidia,function = "cldvfs";
 966                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 967                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 968                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 969                         };
 970                         gpio_x1_aud_px1 {
 971                                 nvidia,pins = "gpio_x1_aud_px1";
 972                                 nvidia,function = "rsvd2";
 973                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 974                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 975                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 976                         };
 977                         dvfs_clk_px2 {
 978                                 nvidia,pins = "dvfs_clk_px2";
 979                                 nvidia,function = "cldvfs";
 980                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 981                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 982                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 983                         };
 984                         gpio_x3_aud_px3 {
 985                                 nvidia,pins = "gpio_x3_aud_px3";
 986                                 nvidia,function = "rsvd4";
 987                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 988                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 989                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 990                         };
 991                         gpio_x4_aud_px4 {
 992                                 nvidia,pins = "gpio_x4_aud_px4";
 993                                 nvidia,function = "gmi";
 994                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 995                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 996                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 997                         };
 998                         gpio_x5_aud_px5 {
 999                                 nvidia,pins = "gpio_x5_aud_px5";
1000                                 nvidia,function = "rsvd4";
1001                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1002                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1003                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1004                         };
1005                         gpio_x6_aud_px6 {
1006                                 nvidia,pins = "gpio_x6_aud_px6";
1007                                 nvidia,function = "gmi";
1008                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1009                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1010                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1011                         };
1012                         gpio_x7_aud_px7 {
1013                                 nvidia,pins = "gpio_x7_aud_px7";
1014                                 nvidia,function = "rsvd1";
1015                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1016                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1017                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1018                         };
1019                         ulpi_clk_py0 {
1020                                 nvidia,pins = "ulpi_clk_py0";
1021                                 nvidia,function = "spi1";
1022                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1023                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1024                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1025                         };
1026                         ulpi_dir_py1 {
1027                                 nvidia,pins = "ulpi_dir_py1";
1028                                 nvidia,function = "spi1";
1029                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1030                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1031                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1032                         };
1033                         ulpi_nxt_py2 {
1034                                 nvidia,pins = "ulpi_nxt_py2";
1035                                 nvidia,function = "spi1";
1036                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1037                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1038                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1039                         };
1040                         ulpi_stp_py3 {
1041                                 nvidia,pins = "ulpi_stp_py3";
1042                                 nvidia,function = "spi1";
1043                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1044                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1045                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1046                         };
1047                         sdmmc1_dat3_py4 {
1048                                 nvidia,pins = "sdmmc1_dat3_py4";
1049                                 nvidia,function = "sdmmc1";
1050                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1051                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1052                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1053                         };
1054                         sdmmc1_dat2_py5 {
1055                                 nvidia,pins = "sdmmc1_dat2_py5";
1056                                 nvidia,function = "sdmmc1";
1057                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1058                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1059                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1060                         };
1061                         sdmmc1_dat1_py6 {
1062                                 nvidia,pins = "sdmmc1_dat1_py6";
1063                                 nvidia,function = "sdmmc1";
1064                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1065                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1066                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1067                         };
1068                         sdmmc1_dat0_py7 {
1069                                 nvidia,pins = "sdmmc1_dat0_py7";
1070                                 nvidia,function = "sdmmc1";
1071                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1072                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1073                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1074                         };
1075                         sdmmc1_clk_pz0 {
1076                                 nvidia,pins = "sdmmc1_clk_pz0";
1077                                 nvidia,function = "sdmmc1";
1078                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1079                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1080                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1081                         };
1082                         sdmmc1_cmd_pz1 {
1083                                 nvidia,pins = "sdmmc1_cmd_pz1";
1084                                 nvidia,function = "sdmmc1";
1085                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1086                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1087                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1088                         };
1089                         pwr_i2c_scl_pz6 {
1090                                 nvidia,pins = "pwr_i2c_scl_pz6";
1091                                 nvidia,function = "i2cpwr";
1092                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1093                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1094                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1095                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1096                         };
1097                         pwr_i2c_sda_pz7 {
1098                                 nvidia,pins = "pwr_i2c_sda_pz7";
1099                                 nvidia,function = "i2cpwr";
1100                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1101                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1102                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1103                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1104                         };
1105                         sdmmc4_dat0_paa0 {
1106                                 nvidia,pins = "sdmmc4_dat0_paa0";
1107                                 nvidia,function = "sdmmc4";
1108                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1109                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1110                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1111                         };
1112                         sdmmc4_dat1_paa1 {
1113                                 nvidia,pins = "sdmmc4_dat1_paa1";
1114                                 nvidia,function = "sdmmc4";
1115                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1116                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1117                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1118                         };
1119                         sdmmc4_dat2_paa2 {
1120                                 nvidia,pins = "sdmmc4_dat2_paa2";
1121                                 nvidia,function = "sdmmc4";
1122                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1123                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1124                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1125                         };
1126                         sdmmc4_dat3_paa3 {
1127                                 nvidia,pins = "sdmmc4_dat3_paa3";
1128                                 nvidia,function = "sdmmc4";
1129                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1130                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1131                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1132                         };
1133                         sdmmc4_dat4_paa4 {
1134                                 nvidia,pins = "sdmmc4_dat4_paa4";
1135                                 nvidia,function = "sdmmc4";
1136                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1137                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1138                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1139                         };
1140                         sdmmc4_dat5_paa5 {
1141                                 nvidia,pins = "sdmmc4_dat5_paa5";
1142                                 nvidia,function = "sdmmc4";
1143                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1144                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1145                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1146                         };
1147                         sdmmc4_dat6_paa6 {
1148                                 nvidia,pins = "sdmmc4_dat6_paa6";
1149                                 nvidia,function = "sdmmc4";
1150                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1151                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1152                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1153                         };
1154                         sdmmc4_dat7_paa7 {
1155                                 nvidia,pins = "sdmmc4_dat7_paa7";
1156                                 nvidia,function = "sdmmc4";
1157                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1158                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1159                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1160                         };
1161                         pbb0 {
1162                                 nvidia,pins = "pbb0";
1163                                 nvidia,function = "vimclk2_alt";
1164                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1165                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1166                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1167                         };
1168                         cam_i2c_scl_pbb1 {
1169                                 nvidia,pins = "cam_i2c_scl_pbb1";
1170                                 nvidia,function = "i2c3";
1171                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1172                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1173                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1174                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1175                         };
1176                         cam_i2c_sda_pbb2 {
1177                                 nvidia,pins = "cam_i2c_sda_pbb2";
1178                                 nvidia,function = "i2c3";
1179                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1180                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1181                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1182                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1183                         };
1184                         pbb3 {
1185                                 nvidia,pins = "pbb3";
1186                                 nvidia,function = "vgp3";
1187                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1188                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1189                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1190                         };
1191                         pbb4 {
1192                                 nvidia,pins = "pbb4";
1193                                 nvidia,function = "vgp4";
1194                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1195                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1196                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1197                         };
1198                         pbb5 {
1199                                 nvidia,pins = "pbb5";
1200                                 nvidia,function = "rsvd3";
1201                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1202                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1203                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1204                         };
1205                         pbb6 {
1206                                 nvidia,pins = "pbb6";
1207                                 nvidia,function = "rsvd2";
1208                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1209                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1210                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1211                         };
1212                         pbb7 {
1213                                 nvidia,pins = "pbb7";
1214                                 nvidia,function = "rsvd2";
1215                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1216                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1217                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1218                         };
1219                         cam_mclk_pcc0 {
1220                                 nvidia,pins = "cam_mclk_pcc0";
1221                                 nvidia,function = "vi_alt3";
1222                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1223                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1224                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1225                         };
1226                         pcc1 {
1227                                 nvidia,pins = "pcc1";
1228                                 nvidia,function = "rsvd2";
1229                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1230                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1231                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1232                         };
1233                         pcc2 {
1234                                 nvidia,pins = "pcc2";
1235                                 nvidia,function = "rsvd2";
1236                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1237                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1238                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1239                         };
1240                         sdmmc4_clk_pcc4 {
1241                                 nvidia,pins = "sdmmc4_clk_pcc4";
1242                                 nvidia,function = "sdmmc4";
1243                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1244                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1245                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1246                         };
1247                         clk2_req_pcc5 {
1248                                 nvidia,pins = "clk2_req_pcc5";
1249                                 nvidia,function = "rsvd2";
1250                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1251                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1252                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1253                         };
1254                         pex_l0_rst_n_pdd1 {
1255                                 nvidia,pins = "pex_l0_rst_n_pdd1";
1256                                 nvidia,function = "pe0";
1257                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1258                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1259                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1260                         };
1261                         pex_l0_clkreq_n_pdd2 {
1262                                 nvidia,pins = "pex_l0_clkreq_n_pdd2";
1263                                 nvidia,function = "pe0";
1264                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1265                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1266                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1267                         };
1268                         pex_wake_n_pdd3 {
1269                                 nvidia,pins = "pex_wake_n_pdd3";
1270                                 nvidia,function = "pe";
1271                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1272                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1273                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1274                         };
1275                         pex_l1_rst_n_pdd5 {
1276                                 nvidia,pins = "pex_l1_rst_n_pdd5";
1277                                 nvidia,function = "pe1";
1278                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1279                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1280                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1281                         };
1282                         pex_l1_clkreq_n_pdd6 {
1283                                 nvidia,pins = "pex_l1_clkreq_n_pdd6";
1284                                 nvidia,function = "pe1";
1285                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1286                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1287                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1288                         };
1289                         clk3_out_pee0 {
1290                                 nvidia,pins = "clk3_out_pee0";
1291                                 nvidia,function = "extperiph3";
1292                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1293                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1294                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1295                         };
1296                         clk3_req_pee1 {
1297                                 nvidia,pins = "clk3_req_pee1";
1298                                 nvidia,function = "rsvd2";
1299                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1300                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1301                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1302                         };
1303                         dap_mclk1_req_pee2 {
1304                                 nvidia,pins = "dap_mclk1_req_pee2";
1305                                 nvidia,function = "sata";
1306                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1307                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1308                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1309                         };
1310                         hdmi_cec_pee3 {
1311                                 nvidia,pins = "hdmi_cec_pee3";
1312                                 nvidia,function = "cec";
1313                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1314                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1315                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1316                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1317                         };
1318                         sdmmc3_clk_lb_out_pee4 {
1319                                 nvidia,pins = "sdmmc3_clk_lb_out_pee4";
1320                                 nvidia,function = "sdmmc3";
1321                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1322                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1323                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1324                         };
1325                         sdmmc3_clk_lb_in_pee5 {
1326                                 nvidia,pins = "sdmmc3_clk_lb_in_pee5";
1327                                 nvidia,function = "sdmmc3";
1328                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1329                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1330                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1331                         };
1332                         dp_hpd_pff0 {
1333                                 nvidia,pins = "dp_hpd_pff0";
1334                                 nvidia,function = "dp";
1335                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1336                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1337                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1338                         };
1339                         usb_vbus_en2_pff1 {
1340                                 nvidia,pins = "usb_vbus_en2_pff1";
1341                                 nvidia,function = "rsvd2";
1342                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1343                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1344                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1345                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1346                         };
1347                         pff2 {
1348                                 nvidia,pins = "pff2";
1349                                 nvidia,function = "rsvd2";
1350                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1351                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1352                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1353                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1354                         };
1355                         core_pwr_req {
1356                                 nvidia,pins = "core_pwr_req";
1357                                 nvidia,function = "pwron";
1358                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1359                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1360                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1361                         };
1362                         cpu_pwr_req {
1363                                 nvidia,pins = "cpu_pwr_req";
1364                                 nvidia,function = "rsvd2";
1365                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1366                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1367                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1368                         };
1369                         pwr_int_n {
1370                                 nvidia,pins = "pwr_int_n";
1371                                 nvidia,function = "pmi";
1372                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1373                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1374                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1375                         };
1376                         reset_out_n {
1377                                 nvidia,pins = "reset_out_n";
1378                                 nvidia,function = "reset_out_n";
1379                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1380                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1381                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1382                         };
1383                         owr {
1384                                 nvidia,pins = "owr";
1385                                 nvidia,function = "rsvd2";
1386                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1387                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1388                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1389                                 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
1390                         };
1391                         clk_32k_in {
1392                                 nvidia,pins = "clk_32k_in";
1393                                 nvidia,function = "rsvd2";
1394                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1395                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1396                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1397                         };
1398                         jtag_rtck {
1399                                 nvidia,pins = "jtag_rtck";
1400                                 nvidia,function = "rtck";
1401                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1402                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1403                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1404                         };
1405                 };
1406         };
1407
1408         /* DB9 serial port */
1409         serial@0,70006300 {
1410                 status = "okay";
1411         };
1412
1413         /* Expansion GEN1_I2C_*, mini-PCIe I2C, on-board components */
1414         i2c@0,7000c000 {
1415                 status = "okay";
1416                 clock-frequency = <100000>;
1417
1418                 rt5639: audio-codec@1c {
1419                         compatible = "realtek,rt5639";
1420                         reg = <0x1c>;
1421                         interrupt-parent = <&gpio>;
1422                         interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
1423                         realtek,ldo1-en-gpios =
1424                                 <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
1425                 };
1426
1427                 temperature-sensor@4c {
1428                         compatible = "ti,tmp451";
1429                         reg = <0x4c>;
1430                         interrupt-parent = <&gpio>;
1431                         interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
1432                 };
1433
1434                 eeprom@56 {
1435                         compatible = "atmel,24c02";
1436                         reg = <0x56>;
1437                         pagesize = <8>;
1438                 };
1439         };
1440
1441         /* Expansion GEN2_I2C_* */
1442         i2c@0,7000c400 {
1443                 status = "okay";
1444                 clock-frequency = <100000>;
1445         };
1446
1447         /* Expansion CAM_I2C_* */
1448         i2c@0,7000c500 {
1449                 status = "okay";
1450                 clock-frequency = <100000>;
1451         };
1452
1453         /* HDMI DDC */
1454         hdmi_ddc: i2c@0,7000c700 {
1455                 status = "okay";
1456                 clock-frequency = <100000>;
1457         };
1458
1459         /* Expansion PWR_I2C_*, on-board components */
1460         i2c@0,7000d000 {
1461                 status = "okay";
1462                 clock-frequency = <400000>;
1463
1464                 pmic: pmic@40 {
1465                         compatible = "ams,as3722";
1466                         reg = <0x40>;
1467                         interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
1468
1469                         ams,system-power-controller;
1470
1471                         #interrupt-cells = <2>;
1472                         interrupt-controller;
1473
1474                         gpio-controller;
1475                         #gpio-cells = <2>;
1476
1477                         pinctrl-names = "default";
1478                         pinctrl-0 = <&as3722_default>;
1479
1480                         as3722_default: pinmux {
1481                                 gpio0 {
1482                                         pins = "gpio0";
1483                                         function = "gpio";
1484                                         bias-pull-down;
1485                                 };
1486
1487                                 gpio1_2_4_7 {
1488                                         pins = "gpio1", "gpio2", "gpio4", "gpio7";
1489                                         function = "gpio";
1490                                         bias-pull-up;
1491                                 };
1492
1493                                 gpio3_5_6 {
1494                                         pins = "gpio3", "gpio5", "gpio6";
1495                                         bias-high-impedance;
1496                                 };
1497                         };
1498
1499                         regulators {
1500                                 vsup-sd2-supply = <&vdd_5v0_sys>;
1501                                 vsup-sd3-supply = <&vdd_5v0_sys>;
1502                                 vsup-sd4-supply = <&vdd_5v0_sys>;
1503                                 vsup-sd5-supply = <&vdd_5v0_sys>;
1504                                 vin-ldo0-supply = <&vdd_1v35_lp0>;
1505                                 vin-ldo1-6-supply = <&vdd_3v3_run>;
1506                                 vin-ldo2-5-7-supply = <&vddio_1v8>;
1507                                 vin-ldo3-4-supply = <&vdd_3v3_sys>;
1508                                 vin-ldo9-10-supply = <&vdd_5v0_sys>;
1509                                 vin-ldo11-supply = <&vdd_3v3_run>;
1510
1511                                 sd0 {
1512                                         regulator-name = "+VDD_CPU_AP";
1513                                         regulator-min-microvolt = <700000>;
1514                                         regulator-max-microvolt = <1400000>;
1515                                         regulator-min-microamp = <3500000>;
1516                                         regulator-max-microamp = <3500000>;
1517                                         regulator-always-on;
1518                                         regulator-boot-on;
1519                                         ams,ext-control = <2>;
1520                                 };
1521
1522                                 sd1 {
1523                                         regulator-name = "+VDD_CORE";
1524                                         regulator-min-microvolt = <700000>;
1525                                         regulator-max-microvolt = <1350000>;
1526                                         regulator-min-microamp = <2500000>;
1527                                         regulator-max-microamp = <2500000>;
1528                                         regulator-always-on;
1529                                         regulator-boot-on;
1530                                         ams,ext-control = <1>;
1531                                 };
1532
1533                                 vdd_1v35_lp0: sd2 {
1534                                         regulator-name = "+1.35V_LP0(sd2)";
1535                                         regulator-min-microvolt = <1350000>;
1536                                         regulator-max-microvolt = <1350000>;
1537                                         regulator-always-on;
1538                                         regulator-boot-on;
1539                                 };
1540
1541                                 sd3 {
1542                                         regulator-name = "+1.35V_LP0(sd3)";
1543                                         regulator-min-microvolt = <1350000>;
1544                                         regulator-max-microvolt = <1350000>;
1545                                         regulator-always-on;
1546                                         regulator-boot-on;
1547                                 };
1548
1549                                 vdd_1v05_run: sd4 {
1550                                         regulator-name = "+1.05V_RUN";
1551                                         regulator-min-microvolt = <1050000>;
1552                                         regulator-max-microvolt = <1050000>;
1553                                 };
1554
1555                                 vddio_1v8: sd5 {
1556                                         regulator-name = "+1.8V_VDDIO";
1557                                         regulator-min-microvolt = <1800000>;
1558                                         regulator-max-microvolt = <1800000>;
1559                                         regulator-boot-on;
1560                                         regulator-always-on;
1561                                 };
1562
1563                                 sd6 {
1564                                         regulator-name = "+VDD_GPU_AP";
1565                                         regulator-min-microvolt = <650000>;
1566                                         regulator-max-microvolt = <1200000>;
1567                                         regulator-min-microamp = <3500000>;
1568                                         regulator-max-microamp = <3500000>;
1569                                         regulator-boot-on;
1570                                         regulator-always-on;
1571                                 };
1572
1573                                 avdd_1v05_run: ldo0 {
1574                                         regulator-name = "+1.05V_RUN_AVDD";
1575                                         regulator-min-microvolt = <1050000>;
1576                                         regulator-max-microvolt = <1050000>;
1577                                         regulator-boot-on;
1578                                         regulator-always-on;
1579                                         ams,ext-control = <1>;
1580                                 };
1581
1582                                 ldo1 {
1583                                         regulator-name = "+1.8V_RUN_CAM";
1584                                         regulator-min-microvolt = <1800000>;
1585                                         regulator-max-microvolt = <1800000>;
1586                                 };
1587
1588                                 ldo2 {
1589                                         regulator-name = "+1.2V_GEN_AVDD";
1590                                         regulator-min-microvolt = <1200000>;
1591                                         regulator-max-microvolt = <1200000>;
1592                                         regulator-boot-on;
1593                                         regulator-always-on;
1594                                 };
1595
1596                                 ldo3 {
1597                                         regulator-name = "+1.05V_LP0_VDD_RTC";
1598                                         regulator-min-microvolt = <1000000>;
1599                                         regulator-max-microvolt = <1000000>;
1600                                         regulator-boot-on;
1601                                         regulator-always-on;
1602                                         ams,enable-tracking;
1603                                 };
1604
1605                                 ldo4 {
1606                                         regulator-name = "+2.8V_RUN_CAM";
1607                                         regulator-min-microvolt = <2800000>;
1608                                         regulator-max-microvolt = <2800000>;
1609                                 };
1610
1611                                 ldo5 {
1612                                         regulator-name = "+1.2V_RUN_CAM_FRONT";
1613                                         regulator-min-microvolt = <1200000>;
1614                                         regulator-max-microvolt = <1200000>;
1615                                 };
1616
1617                                 vddio_sdmmc3: ldo6 {
1618                                         regulator-name = "+VDDIO_SDMMC3";
1619                                         regulator-min-microvolt = <1800000>;
1620                                         regulator-max-microvolt = <3300000>;
1621                                 };
1622
1623                                 ldo7 {
1624                                         regulator-name = "+1.05V_RUN_CAM_REAR";
1625                                         regulator-min-microvolt = <1050000>;
1626                                         regulator-max-microvolt = <1050000>;
1627                                 };
1628
1629                                 ldo9 {
1630                                         regulator-name = "+3.3V_RUN_TOUCH";
1631                                         regulator-min-microvolt = <2800000>;
1632                                         regulator-max-microvolt = <2800000>;
1633                                 };
1634
1635                                 ldo10 {
1636                                         regulator-name = "+2.8V_RUN_CAM_AF";
1637                                         regulator-min-microvolt = <2800000>;
1638                                         regulator-max-microvolt = <2800000>;
1639                                 };
1640
1641                                 ldo11 {
1642                                         regulator-name = "+1.8V_RUN_VPP_FUSE";
1643                                         regulator-min-microvolt = <1800000>;
1644                                         regulator-max-microvolt = <1800000>;
1645                                 };
1646                         };
1647                 };
1648         };
1649
1650         /* Expansion TS_SPI_* */
1651         spi@0,7000d400 {
1652                 status = "okay";
1653         };
1654
1655         /* Internal SPI */
1656         spi@0,7000da00 {
1657                 status = "okay";
1658                 spi-max-frequency = <25000000>;
1659                 spi-flash@0 {
1660                         compatible = "winbond,w25q32dw";
1661                         reg = <0>;
1662                         spi-max-frequency = <20000000>;
1663                 };
1664         };
1665
1666         pmc@0,7000e400 {
1667                 nvidia,invert-interrupt;
1668                 nvidia,suspend-mode = <1>;
1669                 nvidia,cpu-pwr-good-time = <500>;
1670                 nvidia,cpu-pwr-off-time = <300>;
1671                 nvidia,core-pwr-good-time = <641 3845>;
1672                 nvidia,core-pwr-off-time = <61036>;
1673                 nvidia,core-power-req-active-high;
1674                 nvidia,sys-clock-req-active-high;
1675         };
1676
1677         /* Serial ATA */
1678         sata@0,70020000 {
1679                 status = "okay";
1680
1681                 hvdd-supply = <&vdd_3v3_lp0>;
1682                 vddio-supply = <&vdd_1v05_run>;
1683                 avdd-supply = <&vdd_1v05_run>;
1684
1685                 target-5v-supply = <&vdd_5v0_sata>;
1686                 target-12v-supply = <&vdd_12v0_sata>;
1687         };
1688
1689         padctl@0,7009f000 {
1690                 pinctrl-0 = <&padctl_default>;
1691                 pinctrl-names = "default";
1692
1693                 padctl_default: pinmux {
1694                         usb3 {
1695                                 nvidia,lanes = "pcie-0", "pcie-1";
1696                                 nvidia,function = "usb3";
1697                                 nvidia,iddq = <0>;
1698                         };
1699
1700                         pcie {
1701                                 nvidia,lanes = "pcie-2", "pcie-3",
1702                                                "pcie-4";
1703                                 nvidia,function = "pcie";
1704                                 nvidia,iddq = <0>;
1705                         };
1706
1707                         sata {
1708                                 nvidia,lanes = "sata-0";
1709                                 nvidia,function = "sata";
1710                                 nvidia,iddq = <0>;
1711                         };
1712                 };
1713         };
1714
1715         /* SD card */
1716         sdhci@0,700b0400 {
1717                 status = "okay";
1718                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1719                 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1720                 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1721                 bus-width = <4>;
1722                 vqmmc-supply = <&vddio_sdmmc3>;
1723         };
1724
1725         /* eMMC */
1726         sdhci@0,700b0600 {
1727                 status = "okay";
1728                 bus-width = <8>;
1729                 non-removable;
1730         };
1731
1732         ahub@0,70300000 {
1733                 i2s@0,70301100 {
1734                         status = "okay";
1735                 };
1736         };
1737
1738         /* mini-PCIe USB */
1739         usb@0,7d004000 {
1740                 status = "okay";
1741         };
1742
1743         usb-phy@0,7d004000 {
1744                 status = "okay";
1745         };
1746
1747         /* USB A connector */
1748         usb@0,7d008000 {
1749                 status = "okay";
1750         };
1751
1752         usb-phy@0,7d008000 {
1753                 status = "okay";
1754                 vbus-supply = <&vdd_usb3_vbus>;
1755         };
1756
1757         clocks {
1758                 compatible = "simple-bus";
1759                 #address-cells = <1>;
1760                 #size-cells = <0>;
1761
1762                 clk32k_in: clock@0 {
1763                         compatible = "fixed-clock";
1764                         reg = <0>;
1765                         #clock-cells = <0>;
1766                         clock-frequency = <32768>;
1767                 };
1768         };
1769
1770         gpio-keys {
1771                 compatible = "gpio-keys";
1772
1773                 power {
1774                         label = "Power";
1775                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1776                         linux,code = <KEY_POWER>;
1777                         debounce-interval = <10>;
1778                         gpio-key,wakeup;
1779                 };
1780         };
1781
1782         regulators {
1783                 compatible = "simple-bus";
1784                 #address-cells = <1>;
1785                 #size-cells = <0>;
1786
1787                 vdd_mux: regulator@0 {
1788                         compatible = "regulator-fixed";
1789                         reg = <0>;
1790                         regulator-name = "+VDD_MUX";
1791                         regulator-min-microvolt = <12000000>;
1792                         regulator-max-microvolt = <12000000>;
1793                         regulator-always-on;
1794                         regulator-boot-on;
1795                 };
1796
1797                 vdd_5v0_sys: regulator@1 {
1798                         compatible = "regulator-fixed";
1799                         reg = <1>;
1800                         regulator-name = "+5V_SYS";
1801                         regulator-min-microvolt = <5000000>;
1802                         regulator-max-microvolt = <5000000>;
1803                         regulator-always-on;
1804                         regulator-boot-on;
1805                         vin-supply = <&vdd_mux>;
1806                 };
1807
1808                 vdd_3v3_sys: regulator@2 {
1809                         compatible = "regulator-fixed";
1810                         reg = <2>;
1811                         regulator-name = "+3.3V_SYS";
1812                         regulator-min-microvolt = <3300000>;
1813                         regulator-max-microvolt = <3300000>;
1814                         regulator-always-on;
1815                         regulator-boot-on;
1816                         vin-supply = <&vdd_mux>;
1817                 };
1818
1819                 vdd_3v3_run: regulator@3 {
1820                         compatible = "regulator-fixed";
1821                         reg = <3>;
1822                         regulator-name = "+3.3V_RUN";
1823                         regulator-min-microvolt = <3300000>;
1824                         regulator-max-microvolt = <3300000>;
1825                         regulator-always-on;
1826                         regulator-boot-on;
1827                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1828                         enable-active-high;
1829                         vin-supply = <&vdd_3v3_sys>;
1830                 };
1831
1832                 vdd_3v3_hdmi: regulator@4 {
1833                         compatible = "regulator-fixed";
1834                         reg = <4>;
1835                         regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1836                         regulator-min-microvolt = <3300000>;
1837                         regulator-max-microvolt = <3300000>;
1838                         vin-supply = <&vdd_3v3_run>;
1839                 };
1840
1841                 vdd_usb1_vbus: regulator@7 {
1842                         compatible = "regulator-fixed";
1843                         reg = <7>;
1844                         regulator-name = "+USB0_VBUS_SW";
1845                         regulator-min-microvolt = <5000000>;
1846                         regulator-max-microvolt = <5000000>;
1847                         gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1848                         enable-active-high;
1849                         gpio-open-drain;
1850                         vin-supply = <&vdd_5v0_sys>;
1851                 };
1852
1853                 vdd_usb3_vbus: regulator@8 {
1854                         compatible = "regulator-fixed";
1855                         reg = <8>;
1856                         regulator-name = "+5V_USB_HS";
1857                         regulator-min-microvolt = <5000000>;
1858                         regulator-max-microvolt = <5000000>;
1859                         gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1860                         enable-active-high;
1861                         gpio-open-drain;
1862                         vin-supply = <&vdd_5v0_sys>;
1863                 };
1864
1865                 vdd_3v3_lp0: regulator@10 {
1866                         compatible = "regulator-fixed";
1867                         reg = <10>;
1868                         regulator-name = "+3.3V_LP0";
1869                         regulator-min-microvolt = <3300000>;
1870                         regulator-max-microvolt = <3300000>;
1871                         regulator-always-on;
1872                         regulator-boot-on;
1873                         gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1874                         enable-active-high;
1875                         vin-supply = <&vdd_3v3_sys>;
1876                 };
1877
1878                 vdd_hdmi_pll: regulator@11 {
1879                         compatible = "regulator-fixed";
1880                         reg = <11>;
1881                         regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1882                         regulator-min-microvolt = <1050000>;
1883                         regulator-max-microvolt = <1050000>;
1884                         gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1885                         vin-supply = <&vdd_1v05_run>;
1886                 };
1887
1888                 vdd_5v0_hdmi: regulator@12 {
1889                         compatible = "regulator-fixed";
1890                         reg = <12>;
1891                         regulator-name = "+5V_HDMI_CON";
1892                         regulator-min-microvolt = <5000000>;
1893                         regulator-max-microvolt = <5000000>;
1894                         gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1895                         enable-active-high;
1896                         vin-supply = <&vdd_5v0_sys>;
1897                 };
1898
1899                 /* Molex power connector */
1900                 vdd_5v0_sata: regulator@13 {
1901                         compatible = "regulator-fixed";
1902                         reg = <13>;
1903                         regulator-name = "+5V_SATA";
1904                         regulator-min-microvolt = <5000000>;
1905                         regulator-max-microvolt = <5000000>;
1906                         gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
1907                         enable-active-high;
1908                         vin-supply = <&vdd_5v0_sys>;
1909                 };
1910
1911                 vdd_12v0_sata: regulator@14 {
1912                         compatible = "regulator-fixed";
1913                         reg = <14>;
1914                         regulator-name = "+12V_SATA";
1915                         regulator-min-microvolt = <12000000>;
1916                         regulator-max-microvolt = <12000000>;
1917                         gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
1918                         enable-active-high;
1919                         vin-supply = <&vdd_mux>;
1920                 };
1921         };
1922
1923         sound {
1924                 compatible = "nvidia,tegra-audio-rt5640-jetson-tk1",
1925                              "nvidia,tegra-audio-rt5640";
1926                 nvidia,model = "NVIDIA Tegra Jetson TK1";
1927
1928                 nvidia,audio-routing =
1929                         "Headphones", "HPOR",
1930                         "Headphones", "HPOL",
1931                         "Mic Jack", "MICBIAS1",
1932                         "IN2P", "Mic Jack";
1933
1934                 nvidia,i2s-controller = <&tegra_i2s1>;
1935                 nvidia,audio-codec = <&rt5639>;
1936
1937                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>;
1938
1939                 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1940                          <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1941                          <&tegra_car TEGRA124_CLK_EXTERN1>;
1942                 clock-names = "pll_a", "pll_a_out0", "mclk";
1943         };
1944 };