arch/arm/boot/dts/tegra114-roth.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/input.h>
   5 #include "tegra114.dtsi"
   6
   7 / {
   8         model = "NVIDIA SHIELD";
   9         compatible = "nvidia,roth", "nvidia,tegra114";
  10
  11         chosen {
  12                 /* SHIELD's bootloader's arguments need to be overridden */
  13                 bootargs = "console=ttyS0,115200n8 console=tty1 gpt fbcon=rotate:1";
  14                 /* SHIELD's bootloader will place initrd at this address */
  15                 linux,initrd-start = <0x82000000>;
  16                 linux,initrd-end = <0x82800000>;
  17         };
  18
  19         aliases {
  20                 serial0 = &uartd;
  21         };
  22
  23         firmware {
  24                 trusted-foundations {
  25                         compatible = "tlm,trusted-foundations";
  26                         tlm,version-major = <2>;
  27                         tlm,version-minor = <8>;
  28                 };
  29         };
  30
  31         memory {
  32                 /* memory >= 0x79600000 is reserved for firmware usage */
  33                 reg = <0x80000000 0x79600000>;
  34         };
  35
  36         host1x@50000000 {
  37                 dsi@54300000 {
  38                         status = "okay";
  39
  40                         vdd-supply = <&vdd_1v2_ap>;
  41
  42                         panel@0 {
  43                                 compatible = "lg,lh500wx1-sd03";
  44                                 reg = <0>;
  45
  46                                 power-supply = <&vdd_lcd>;
  47                                 backlight = <&backlight>;
  48                         };
  49                 };
  50         };
  51
  52         pinmux@70000868 {
  53                 pinctrl-names = "default";
  54                 pinctrl-0 = <&state_default>;
  55
  56                 state_default: pinmux {
  57                         clk1_out_pw4 {
  58                                 nvidia,pins = "clk1_out_pw4";
  59                                 nvidia,function = "extperiph1";
  60                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  61                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  62                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  63                         };
  64                         dap1_din_pn1 {
  65                                 nvidia,pins = "dap1_din_pn1";
  66                                 nvidia,function = "i2s0";
  67                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  68                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  69                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  70                         };
  71                         dap1_dout_pn2 {
  72                                 nvidia,pins = "dap1_dout_pn2",
  73                                                 "dap1_fs_pn0",
  74                                                 "dap1_sclk_pn3";
  75                                 nvidia,function = "i2s0";
  76                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  77                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  78                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  79                         };
  80                         dap2_din_pa4 {
  81                                 nvidia,pins = "dap2_din_pa4";
  82                                 nvidia,function = "i2s1";
  83                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  84                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  85                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  86                         };
  87                         dap2_dout_pa5 {
  88                                 nvidia,pins = "dap2_dout_pa5",
  89                                                 "dap2_fs_pa2",
  90                                                 "dap2_sclk_pa3";
  91                                 nvidia,function = "i2s1";
  92                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  93                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  94                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  95                         };
  96                         dap4_din_pp5 {
  97                                 nvidia,pins = "dap4_din_pp5",
  98                                                 "dap4_dout_pp6",
  99                                                 "dap4_fs_pp4",
 100                                                 "dap4_sclk_pp7";
 101                                 nvidia,function = "i2s3";
 102                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 103                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 104                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 105                         };
 106                         dvfs_pwm_px0 {
 107                                 nvidia,pins = "dvfs_pwm_px0",
 108                                                 "dvfs_clk_px2";
 109                                 nvidia,function = "cldvfs";
 110                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 111                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 112                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 113                         };
 114                         ulpi_clk_py0 {
 115                                 nvidia,pins = "ulpi_clk_py0",
 116                                                 "ulpi_data0_po1",
 117                                                 "ulpi_data1_po2",
 118                                                 "ulpi_data2_po3",
 119                                                 "ulpi_data3_po4",
 120                                                 "ulpi_data4_po5",
 121                                                 "ulpi_data5_po6",
 122                                                 "ulpi_data6_po7",
 123                                                 "ulpi_data7_po0";
 124                                 nvidia,function = "ulpi";
 125                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 126                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 127                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 128                         };
 129                         ulpi_dir_py1 {
 130                                 nvidia,pins = "ulpi_dir_py1",
 131                                                 "ulpi_nxt_py2";
 132                                 nvidia,function = "ulpi";
 133                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 134                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 135                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 136                         };
 137                         ulpi_stp_py3 {
 138                                 nvidia,pins = "ulpi_stp_py3";
 139                                 nvidia,function = "ulpi";
 140                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 141                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 142                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 143                         };
 144                         cam_i2c_scl_pbb1 {
 145                                 nvidia,pins = "cam_i2c_scl_pbb1",
 146                                                 "cam_i2c_sda_pbb2";
 147                                 nvidia,function = "i2c3";
 148                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 149                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 150                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 151                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 152                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 153                         };
 154                         cam_mclk_pcc0 {
 155                                 nvidia,pins = "cam_mclk_pcc0",
 156                                                 "pbb0";
 157                                 nvidia,function = "vi_alt3";
 158                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 159                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 160                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 161                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 162                         };
 163                         pbb4 {
 164                                 nvidia,pins = "pbb4";
 165                                 nvidia,function = "vgp4";
 166                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 167                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 168                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 169                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 170                         };
 171                         gen2_i2c_scl_pt5 {
 172                                 nvidia,pins = "gen2_i2c_scl_pt5",
 173                                                 "gen2_i2c_sda_pt6";
 174                                 nvidia,function = "i2c2";
 175                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 176                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 177                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 178                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 179                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 180                         };
 181                         gmi_a16_pj7 {
 182                                 nvidia,pins = "gmi_a16_pj7",
 183                                                 "gmi_a19_pk7";
 184                                 nvidia,function = "uartd";
 185                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 186                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 187                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 188                         };
 189                         gmi_a17_pb0 {
 190                                 nvidia,pins = "gmi_a17_pb0",
 191                                                 "gmi_a18_pb1";
 192                                 nvidia,function = "uartd";
 193                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 194                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 195                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 196                         };
 197                         gmi_ad5_pg5 {
 198                                 nvidia,pins = "gmi_ad5_pg5",
 199                                                 "gmi_wr_n_pi0";
 200                                 nvidia,function = "spi4";
 201                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 202                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 203                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 204                         };
 205                         gmi_ad6_pg6 {
 206                                 nvidia,pins = "gmi_ad6_pg6",
 207                                                 "gmi_ad7_pg7";
 208                                 nvidia,function = "spi4";
 209                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 210                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 211                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 212                         };
 213                         gmi_ad12_ph4 {
 214                                 nvidia,pins = "gmi_ad12_ph4";
 215                                 nvidia,function = "rsvd4";
 216                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 217                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 218                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 219                         };
 220                         gmi_cs6_n_pi13 {
 221                                 nvidia,pins = "gmi_cs6_n_pi3";
 222                                 nvidia,function = "nand";
 223                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 224                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 225                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 226                         };
 227                         gmi_ad9_ph1 {
 228                                 nvidia,pins = "gmi_ad9_ph1";
 229                                 nvidia,function = "pwm1";
 230                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 231                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 232                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 233                         };
 234                         gmi_cs1_n_pj2 {
 235                                 nvidia,pins = "gmi_cs1_n_pj2",
 236                                                 "gmi_oe_n_pi1";
 237                                 nvidia,function = "soc";
 238                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 239                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 240                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 241                         };
 242                         gmi_rst_n_pi4 {
 243                                 nvidia,pins = "gmi_rst_n_pi4";
 244                                 nvidia,function = "gmi";
 245                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 246                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 247                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 248                         };
 249                         gmi_iordy_pi5 {
 250                                 nvidia,pins = "gmi_iordy_pi5";
 251                                 nvidia,function = "gmi";
 252                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 253                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 254                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 255                         };
 256                         clk2_out_pw5 {
 257                                 nvidia,pins = "clk2_out_pw5";
 258                                 nvidia,function = "extperiph2";
 259                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 260                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 261                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 262                         };
 263                         sdmmc1_clk_pz0 {
 264                                 nvidia,pins = "sdmmc1_clk_pz0";
 265                                 nvidia,function = "sdmmc1";
 266                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 267                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 268                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 269                         };
 270                         sdmmc1_cmd_pz1 {
 271                                 nvidia,pins = "sdmmc1_cmd_pz1",
 272                                                 "sdmmc1_dat0_py7",
 273                                                 "sdmmc1_dat1_py6",
 274                                                 "sdmmc1_dat2_py5",
 275                                                 "sdmmc1_dat3_py4";
 276                                 nvidia,function = "sdmmc1";
 277                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 278                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 279                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 280                         };
 281                         sdmmc3_clk_pa6 {
 282                                 nvidia,pins = "sdmmc3_clk_pa6";
 283                                 nvidia,function = "sdmmc3";
 284                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 285                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 286                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 287                         };
 288                         sdmmc3_cmd_pa7 {
 289                                 nvidia,pins = "sdmmc3_cmd_pa7",
 290                                                 "sdmmc3_dat0_pb7",
 291                                                 "sdmmc3_dat1_pb6",
 292                                                 "sdmmc3_dat2_pb5",
 293                                                 "sdmmc3_dat3_pb4",
 294                                                 "sdmmc3_cd_n_pv2",
 295                                                 "sdmmc3_clk_lb_out_pee4",
 296                                                 "sdmmc3_clk_lb_in_pee5";
 297                                 nvidia,function = "sdmmc3";
 298                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 299                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 300                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 301                         };
 302                         kb_col4_pq4 {
 303                                 nvidia,pins = "kb_col4_pq4";
 304                                 nvidia,function = "sdmmc3";
 305                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 306                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 307                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 308                         };
 309                         sdmmc4_clk_pcc4 {
 310                                 nvidia,pins = "sdmmc4_clk_pcc4";
 311                                 nvidia,function = "sdmmc4";
 312                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 313                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 314                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 315                         };
 316                         sdmmc4_cmd_pt7 {
 317                                 nvidia,pins = "sdmmc4_cmd_pt7",
 318                                                 "sdmmc4_dat0_paa0",
 319                                                 "sdmmc4_dat1_paa1",
 320                                                 "sdmmc4_dat2_paa2",
 321                                                 "sdmmc4_dat3_paa3",
 322                                                 "sdmmc4_dat4_paa4",
 323                                                 "sdmmc4_dat5_paa5",
 324                                                 "sdmmc4_dat6_paa6",
 325                                                 "sdmmc4_dat7_paa7";
 326                                 nvidia,function = "sdmmc4";
 327                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 328                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 329                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 330                         };
 331                         clk_32k_out_pa0 {
 332                                 nvidia,pins = "clk_32k_out_pa0";
 333                                 nvidia,function = "blink";
 334                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 335                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 336                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 337                         };
 338                         kb_col0_pq0 {
 339                                 nvidia,pins = "kb_col0_pq0",
 340                                                 "kb_col1_pq1",
 341                                                 "kb_col2_pq2",
 342                                                 "kb_row0_pr0",
 343                                                 "kb_row1_pr1",
 344                                                 "kb_row2_pr2",
 345                                                 "kb_row8_ps0";
 346                                 nvidia,function = "kbc";
 347                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 348                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 349                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 350                         };
 351                         kb_row7_pr7 {
 352                                 nvidia,pins = "kb_row7_pr7";
 353                                 nvidia,function = "rsvd2";
 354                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 355                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 356                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 357                         };
 358                         kb_row10_ps2 {
 359                                 nvidia,pins = "kb_row10_ps2";
 360                                 nvidia,function = "uarta";
 361                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 362                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 363                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 364                         };
 365                         kb_row9_ps1 {
 366                                 nvidia,pins = "kb_row9_ps1";
 367                                 nvidia,function = "uarta";
 368                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 369                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 370                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 371                         };
 372                         pwr_i2c_scl_pz6 {
 373                                 nvidia,pins = "pwr_i2c_scl_pz6",
 374                                                 "pwr_i2c_sda_pz7";
 375                                 nvidia,function = "i2cpwr";
 376                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 377                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 378                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 379                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 380                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 381                         };
 382                         sys_clk_req_pz5 {
 383                                 nvidia,pins = "sys_clk_req_pz5";
 384                                 nvidia,function = "sysclk";
 385                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 386                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 387                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 388                         };
 389                         core_pwr_req {
 390                                 nvidia,pins = "core_pwr_req";
 391                                 nvidia,function = "pwron";
 392                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 393                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 394                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 395                         };
 396                         cpu_pwr_req {
 397                                 nvidia,pins = "cpu_pwr_req";
 398                                 nvidia,function = "cpu";
 399                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 400                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 401                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 402                         };
 403                         pwr_int_n {
 404                                 nvidia,pins = "pwr_int_n";
 405                                 nvidia,function = "pmi";
 406                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 407                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 408                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 409                         };
 410                         reset_out_n {
 411                                 nvidia,pins = "reset_out_n";
 412                                 nvidia,function = "reset_out_n";
 413                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 414                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 415                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 416                         };
 417                         clk3_out_pee0 {
 418                                 nvidia,pins = "clk3_out_pee0";
 419                                 nvidia,function = "extperiph3";
 420                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 421                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 422                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 423                         };
 424                         gen1_i2c_scl_pc4 {
 425                                 nvidia,pins = "gen1_i2c_scl_pc4",
 426                                                 "gen1_i2c_sda_pc5";
 427                                 nvidia,function = "i2c1";
 428                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 429                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 430                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 431                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 432                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 433                         };
 434                         uart2_cts_n_pj5 {
 435                                 nvidia,pins = "uart2_cts_n_pj5";
 436                                 nvidia,function = "uartb";
 437                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 438                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 439                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 440                         };
 441                         uart2_rts_n_pj6 {
 442                                 nvidia,pins = "uart2_rts_n_pj6";
 443                                 nvidia,function = "uartb";
 444                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 445                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 446                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 447                         };
 448                         uart2_rxd_pc3 {
 449                                 nvidia,pins = "uart2_rxd_pc3";
 450                                 nvidia,function = "irda";
 451                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 452                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 453                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 454                         };
 455                         uart2_txd_pc2 {
 456                                 nvidia,pins = "uart2_txd_pc2";
 457                                 nvidia,function = "irda";
 458                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 459                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 460                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 461                         };
 462                         uart3_cts_n_pa1 {
 463                                 nvidia,pins = "uart3_cts_n_pa1",
 464                                                 "uart3_rxd_pw7";
 465                                 nvidia,function = "uartc";
 466                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 467                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 468                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 469                         };
 470                         uart3_rts_n_pc0 {
 471                                 nvidia,pins = "uart3_rts_n_pc0",
 472                                                 "uart3_txd_pw6";
 473                                 nvidia,function = "uartc";
 474                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 475                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 476                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 477                         };
 478                         owr {
 479                                 nvidia,pins = "owr";
 480                                 nvidia,function = "owr";
 481                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 482                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 483                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 484                         };
 485                         hdmi_cec_pee3 {
 486                                 nvidia,pins = "hdmi_cec_pee3";
 487                                 nvidia,function = "cec";
 488                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 489                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 490                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 491                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 492                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 493                         };
 494                         ddc_scl_pv4 {
 495                                 nvidia,pins = "ddc_scl_pv4",
 496                                                 "ddc_sda_pv5";
 497                                 nvidia,function = "i2c4";
 498                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 499                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 500                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 501                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 502                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
 503                         };
 504                         spdif_in_pk6 {
 505                                 nvidia,pins = "spdif_in_pk6";
 506                                 nvidia,function = "usb";
 507                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 508                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 509                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 510                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 511                         };
 512                         usb_vbus_en0_pn4 {
 513                                 nvidia,pins = "usb_vbus_en0_pn4";
 514                                 nvidia,function = "usb";
 515                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 516                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 517                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 518                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 519                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 520                         };
 521                         gpio_x6_aud_px6 {
 522                                 nvidia,pins = "gpio_x6_aud_px6";
 523                                 nvidia,function = "spi6";
 524                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 525                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 526                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 527                         };
 528                         gpio_x1_aud_px1 {
 529                                 nvidia,pins = "gpio_x1_aud_px1";
 530                                 nvidia,function = "rsvd2";
 531                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 532                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 533                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 534                         };
 535                         gpio_x7_aud_px7 {
 536                                 nvidia,pins = "gpio_x7_aud_px7";
 537                                 nvidia,function = "rsvd1";
 538                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 539                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 540                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 541                         };
 542                         gmi_adv_n_pk0 {
 543                                 nvidia,pins = "gmi_adv_n_pk0";
 544                                 nvidia,function = "gmi";
 545                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 546                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 547                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 548                         };
 549                         gmi_cs0_n_pj0 {
 550                                 nvidia,pins = "gmi_cs0_n_pj0";
 551                                 nvidia,function = "gmi";
 552                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 553                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 554                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 555                         };
 556                         pu3 {
 557                                 nvidia,pins = "pu3";
 558                                 nvidia,function = "pwm0";
 559                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 560                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 561                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 562                         };
 563                         gpio_x4_aud_px4 {
 564                                 nvidia,pins = "gpio_x4_aud_px4",
 565                                                 "gpio_x5_aud_px5";
 566                                 nvidia,function = "rsvd1";
 567                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 568                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 569                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 570                         };
 571                         gpio_x3_aud_px3 {
 572                                 nvidia,pins = "gpio_x3_aud_px3";
 573                                 nvidia,function = "rsvd4";
 574                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 575                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 576                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 577                         };
 578                         gpio_w2_aud_pw2 {
 579                                 nvidia,pins = "gpio_w2_aud_pw2";
 580                                 nvidia,function = "rsvd2";
 581                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 582                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 583                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 584                         };
 585                         gpio_w3_aud_pw3 {
 586                                 nvidia,pins = "gpio_w3_aud_pw3";
 587                                 nvidia,function = "spi6";
 588                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 589                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 590                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 591                         };
 592                         dap3_fs_pp0 {
 593                                 nvidia,pins = "dap3_fs_pp0",
 594                                                 "dap3_din_pp1",
 595                                                 "dap3_dout_pp2",
 596                                                 "dap3_sclk_pp3";
 597                                 nvidia,function = "i2s2";
 598                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 599                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 600                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 601                         };
 602                         pv0 {
 603                                 nvidia,pins = "pv0";
 604                                 nvidia,function = "rsvd4";
 605                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 606                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 607                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 608                         };
 609                         pv1 {
 610                                 nvidia,pins = "pv1";
 611                                 nvidia,function = "rsvd1";
 612                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 613                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 614                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 615                         };
 616                         pbb3 {
 617                                 nvidia,pins = "pbb3",
 618                                                 "pbb5",
 619                                                 "pbb6",
 620                                                 "pbb7";
 621                                 nvidia,function = "rsvd4";
 622                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 623                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 624                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 625                         };
 626                         pcc1 {
 627                                 nvidia,pins = "pcc1",
 628                                                 "pcc2";
 629                                 nvidia,function = "rsvd4";
 630                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 631                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 632                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 633                         };
 634                         gmi_ad0_pg0 {
 635                                 nvidia,pins = "gmi_ad0_pg0",
 636                                                 "gmi_ad1_pg1";
 637                                 nvidia,function = "gmi";
 638                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 639                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 640                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 641                         };
 642                         gmi_ad10_ph2 {
 643                                 nvidia,pins = "gmi_ad10_ph2",
 644                                                 "gmi_ad12_ph4",
 645                                                 "gmi_ad15_ph7",
 646                                                 "gmi_cs3_n_pk4";
 647                                 nvidia,function = "gmi";
 648                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 649                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 650                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 651                         };
 652                         gmi_ad11_ph3 {
 653                                 nvidia,pins = "gmi_ad11_ph3",
 654                                                 "gmi_ad13_ph5",
 655                                                 "gmi_ad8_ph0",
 656                                                 "gmi_clk_pk1",
 657                                                 "gmi_cs2_n_pk3";
 658                                 nvidia,function = "gmi";
 659                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 660                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 661                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 662                         };
 663                         gmi_ad14_ph6 {
 664                                 nvidia,pins = "gmi_ad14_ph6",
 665                                                 "gmi_cs0_n_pj0",
 666                                                 "gmi_cs4_n_pk2",
 667                                                 "gmi_cs7_n_pi6",
 668                                                 "gmi_dqs_p_pj3",
 669                                                 "gmi_wp_n_pc7";
 670                                 nvidia,function = "gmi";
 671                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 672                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 673                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 674                         };
 675                         gmi_ad2_pg2 {
 676                                 nvidia,pins = "gmi_ad2_pg2",
 677                                                 "gmi_ad3_pg3";
 678                                 nvidia,function = "gmi";
 679                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 680                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 681                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 682                         };
 683                         sdmmc1_wp_n_pv3 {
 684                                 nvidia,pins = "sdmmc1_wp_n_pv3";
 685                                 nvidia,function = "spi4";
 686                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 687                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 688                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 689                         };
 690                         clk2_req_pcc5 {
 691                                 nvidia,pins = "clk2_req_pcc5";
 692                                 nvidia,function = "rsvd4";
 693                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 694                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 695                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 696                         };
 697                         kb_col3_pq3 {
 698                                 nvidia,pins = "kb_col3_pq3";
 699                                 nvidia,function = "pwm2";
 700                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 701                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 702                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 703                         };
 704                         kb_col5_pq5 {
 705                                 nvidia,pins = "kb_col5_pq5";
 706                                 nvidia,function = "kbc";
 707                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 708                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 709                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 710                         };
 711                         kb_col6_pq6 {
 712                                 nvidia,pins = "kb_col6_pq6",
 713                                                 "kb_col7_pq7";
 714                                 nvidia,function = "kbc";
 715                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 716                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 717                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 718                         };
 719                         kb_row3_pr3 {
 720                                 nvidia,pins = "kb_row3_pr3",
 721                                                 "kb_row4_pr4",
 722                                                 "kb_row6_pr6";
 723                                 nvidia,function = "kbc";
 724                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 725                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 726                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 727                         };
 728                         clk3_req_pee1 {
 729                                 nvidia,pins = "clk3_req_pee1";
 730                                 nvidia,function = "rsvd4";
 731                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 732                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 733                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 734                         };
 735                         pu2 {
 736                                 nvidia,pins = "pu2";
 737                                 nvidia,function = "rsvd1";
 738                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 739                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 740                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 741                         };
 742                         hdmi_int_pn7 {
 743                                 nvidia,pins = "hdmi_int_pn7";
 744                                 nvidia,function = "rsvd1";
 745                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 746                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 747                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 748                         };
 749
 750                         drive_sdio1 {
 751                                 nvidia,pins = "drive_sdio1";
 752                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 753                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 754                                 nvidia,pull-down-strength = <36>;
 755                                 nvidia,pull-up-strength = <20>;
 756                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
 757                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
 758                         };
 759                         drive_sdio3 {
 760                                 nvidia,pins = "drive_sdio3";
 761                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 762                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 763                                 nvidia,pull-down-strength = <36>;
 764                                 nvidia,pull-up-strength = <20>;
 765                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 766                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 767                         };
 768                         drive_gma {
 769                                 nvidia,pins = "drive_gma";
 770                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 771                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 772                                 nvidia,pull-down-strength = <2>;
 773                                 nvidia,pull-up-strength = <2>;
 774                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 775                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 776                         };
 777                 };
 778         };
 779
 780         /* Usable on reworked devices only */
 781         serial@70006300 {
 782                 status = "okay";
 783         };
 784
 785         pwm@7000a000 {
 786                 status = "okay";
 787         };
 788
 789         i2c@7000d000 {
 790                 status = "okay";
 791                 clock-frequency = <400000>;
 792
 793                 regulator@43 {
 794                         compatible = "ti,tps51632";
 795                         reg = <0x43>;
 796                         regulator-name = "vdd-cpu";
 797                         regulator-min-microvolt = <500000>;
 798                         regulator-max-microvolt = <1520000>;
 799                         regulator-always-on;
 800                         regulator-boot-on;
 801                 };
 802
 803                 palmas: pmic@58 {
 804                         compatible = "ti,palmas";
 805                         reg = <0x58>;
 806                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 807
 808                         #interrupt-cells = <2>;
 809                         interrupt-controller;
 810
 811                         ti,system-power-controller;
 812
 813                         palmas_gpio: gpio {
 814                                 compatible = "ti,palmas-gpio";
 815                                 gpio-controller;
 816                                 #gpio-cells = <2>;
 817                         };
 818
 819                         pmic {
 820                                 compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
 821
 822                                 regulators {
 823                                         smps12 {
 824                                                 regulator-name = "vdd-ddr";
 825                                                 regulator-min-microvolt = <1200000>;
 826                                                 regulator-max-microvolt = <1500000>;
 827                                                 regulator-always-on;
 828                                                 regulator-boot-on;
 829                                         };
 830
 831                                         vdd_1v8: smps3 {
 832                                                 regulator-name = "vdd-1v8";
 833                                                 regulator-min-microvolt = <1800000>;
 834                                                 regulator-max-microvolt = <1800000>;
 835                                                 regulator-boot-on;
 836                                         };
 837
 838                                         smps457 {
 839                                                 regulator-name = "vdd-soc";
 840                                                 regulator-min-microvolt = <900000>;
 841                                                 regulator-max-microvolt = <1400000>;
 842                                                 regulator-always-on;
 843                                                 regulator-boot-on;
 844                                         };
 845
 846                                         smps8 {
 847                                                 regulator-name = "avdd-pll-1v05";
 848                                                 regulator-min-microvolt = <1050000>;
 849                                                 regulator-max-microvolt = <1050000>;
 850                                                 regulator-always-on;
 851                                                 regulator-boot-on;
 852                                         };
 853
 854                                         smps9 {
 855                                                 regulator-name = "vdd-2v85-emmc";
 856                                                 regulator-min-microvolt = <2800000>;
 857                                                 regulator-max-microvolt = <2800000>;
 858                                                 regulator-always-on;
 859                                         };
 860
 861                                         smps10_out1 {
 862                                                 regulator-name = "vdd-fan";
 863                                                 regulator-min-microvolt = <5000000>;
 864                                                 regulator-max-microvolt = <5000000>;
 865                                                 regulator-always-on;
 866                                                 regulator-boot-on;
 867                                         };
 868
 869                                         smps10_out2 {
 870                                                 regulator-name = "vdd-5v0-sys";
 871                                                 regulator-min-microvolt = <5000000>;
 872                                                 regulator-max-microvolt = <5000000>;
 873                                                 regulator-always-on;
 874                                                 regulator-boot-on;
 875                                         };
 876
 877                                         ldo2 {
 878                                                 regulator-name = "vdd-2v8-display";
 879                                                 regulator-min-microvolt = <2800000>;
 880                                                 regulator-max-microvolt = <2800000>;
 881                                                 regulator-always-on;
 882                                                 regulator-boot-on;
 883                                         };
 884
 885                                         vdd_1v2_ap: ldo3 {
 886                                                 regulator-name = "avdd-1v2";
 887                                                 regulator-min-microvolt = <1200000>;
 888                                                 regulator-max-microvolt = <1200000>;
 889                                                 regulator-always-on;
 890                                                 regulator-boot-on;
 891                                         };
 892
 893                                         ldo4 {
 894                                                 regulator-name = "vpp-fuse";
 895                                                 regulator-min-microvolt = <1800000>;
 896                                                 regulator-max-microvolt = <1800000>;
 897                                         };
 898
 899                                         ldo5 {
 900                                                 regulator-name = "avdd-hdmi-pll";
 901                                                 regulator-min-microvolt = <1200000>;
 902                                                 regulator-max-microvolt = <1200000>;
 903                                         };
 904
 905                                         ldo6 {
 906                                                 regulator-name = "vdd-sensor-2v8";
 907                                                 regulator-min-microvolt = <2850000>;
 908                                                 regulator-max-microvolt = <2850000>;
 909                                         };
 910
 911                                         ldo8 {
 912                                                 regulator-name = "vdd-rtc";
 913                                                 regulator-min-microvolt = <1100000>;
 914                                                 regulator-max-microvolt = <1100000>;
 915                                                 regulator-always-on;
 916                                                 regulator-boot-on;
 917                                                 ti,enable-ldo8-tracking;
 918                                         };
 919
 920                                         vddio_sdmmc3: ldo9 {
 921                                                 regulator-name = "vddio-sdmmc3";
 922                                                 regulator-min-microvolt = <1800000>;
 923                                                 regulator-max-microvolt = <3300000>;
 924                                         };
 925
 926                                         ldousb {
 927                                                 regulator-name = "avdd-usb-hdmi";
 928                                                 regulator-min-microvolt = <3300000>;
 929                                                 regulator-max-microvolt = <3300000>;
 930                                                 regulator-always-on;
 931                                                 regulator-boot-on;
 932                                         };
 933
 934                                         vdd_3v3_sys: regen1 {
 935                                                 regulator-name = "rail-3v3";
 936                                                 regulator-max-microvolt = <3300000>;
 937                                                 regulator-always-on;
 938                                                 regulator-boot-on;
 939                                         };
 940
 941                                         regen2 {
 942                                                 regulator-name = "rail-5v0";
 943                                                 regulator-max-microvolt = <5000000>;
 944                                                 regulator-always-on;
 945                                                 regulator-boot-on;
 946                                         };
 947
 948                                 };
 949                         };
 950
 951                         rtc {
 952                                 compatible = "ti,palmas-rtc";
 953                                 interrupt-parent = <&palmas>;
 954                                 interrupts = <8 0>;
 955                         };
 956
 957                 };
 958         };
 959
 960         pmc@7000e400 {
 961                 nvidia,invert-interrupt;
 962         };
 963
 964         /* SD card */
 965         sdhci@78000400 {
 966                 status = "okay";
 967                 bus-width = <4>;
 968                 vqmmc-supply = <&vddio_sdmmc3>;
 969                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 970                 power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
 971         };
 972
 973         /* eMMC */
 974         sdhci@78000600 {
 975                 status = "okay";
 976                 bus-width = <8>;
 977                 non-removable;
 978         };
 979
 980         /* External USB port (must be powered) */
 981         usb@7d000000 {
 982                 status = "okay";
 983         };
 984
 985         usb-phy@7d000000 {
 986                 status = "okay";
 987                 nvidia,xcvr-setup = <7>;
 988                 nvidia,xcvr-lsfslew = <2>;
 989                 nvidia,xcvr-lsrslew = <2>;
 990                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 991                 /* Should be changed to "otg" once we have vbus_supply */
 992                 /* As of now, USB devices need to be powered externally */
 993                 dr_mode = "host";
 994         };
 995
 996         /* SHIELD controller */
 997         usb@7d008000 {
 998                 status = "okay";
 999         };
1000
1001         usb-phy@7d008000 {
1002                 status = "okay";
1003                 nvidia,xcvr-setup = <7>;
1004                 nvidia,xcvr-lsfslew = <2>;
1005                 nvidia,xcvr-lsrslew = <2>;
1006         };
1007
1008         backlight: backlight {
1009                 compatible = "pwm-backlight";
1010                 pwms = <&pwm 1 40000>;
1011
1012                 brightness-levels = <0 4 8 16 32 64 128 255>;
1013                 default-brightness-level = <6>;
1014
1015                 power-supply = <&lcd_bl_en>;
1016                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1017         };
1018
1019         clocks {
1020                 compatible = "simple-bus";
1021                 #address-cells = <1>;
1022                 #size-cells = <0>;
1023
1024                 clk32k_in: clock@0 {
1025                         compatible = "fixed-clock";
1026                         reg = <0>;
1027                         #clock-cells = <0>;
1028                         clock-frequency = <32768>;
1029                 };
1030         };
1031
1032         gpio-keys {
1033                 compatible = "gpio-keys";
1034
1035                 back {
1036                         label = "Back";
1037                         gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1038                         linux,code = <KEY_BACK>;
1039                 };
1040
1041                 home {
1042                         label = "Home";
1043                         gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1044                         linux,code = <KEY_HOME>;
1045                 };
1046
1047                 power {
1048                         label = "Power";
1049                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1050                         linux,code = <KEY_POWER>;
1051                         wakeup-source;
1052                 };
1053         };
1054
1055         regulators {
1056                 compatible = "simple-bus";
1057                 #address-cells = <1>;
1058                 #size-cells = <0>;
1059
1060                 lcd_bl_en: regulator@0 {
1061                         compatible = "regulator-fixed";
1062                         reg = <0>;
1063                         regulator-name = "lcd_bl_en";
1064                         regulator-min-microvolt = <5000000>;
1065                         regulator-max-microvolt = <5000000>;
1066                         regulator-boot-on;
1067                 };
1068
1069                 vdd_lcd: regulator@1 {
1070                         compatible = "regulator-fixed";
1071                         reg = <1>;
1072                         regulator-name = "vdd_lcd_1v8";
1073                         regulator-min-microvolt = <1800000>;
1074                         regulator-max-microvolt = <1800000>;
1075                         vin-supply = <&vdd_1v8>;
1076                         enable-active-high;
1077                         gpio = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
1078                         regulator-boot-on;
1079                 };
1080
1081                 regulator@2 {
1082                         compatible = "regulator-fixed";
1083                         reg = <2>;
1084                         regulator-name = "vdd_1v8_ts";
1085                         regulator-min-microvolt = <1800000>;
1086                         regulator-max-microvolt = <1800000>;
1087                         gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_LOW>;
1088                         regulator-boot-on;
1089                 };
1090
1091                 regulator@3 {
1092                         compatible = "regulator-fixed";
1093                         reg = <3>;
1094                         regulator-name = "vdd_3v3_ts";
1095                         regulator-min-microvolt = <3300000>;
1096                         regulator-max-microvolt = <3300000>;
1097                         enable-active-high;
1098                         gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1099                         regulator-boot-on;
1100                 };
1101
1102                 regulator@4 {
1103                         compatible = "regulator-fixed";
1104                         reg = <4>;
1105                         regulator-name = "vdd_1v8_com";
1106                         regulator-min-microvolt = <1800000>;
1107                         regulator-max-microvolt = <1800000>;
1108                         vin-supply = <&vdd_1v8>;
1109                         enable-active-high;
1110                         gpio = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
1111                         regulator-boot-on;
1112                 };
1113
1114                 regulator@5 {
1115                         compatible = "regulator-fixed";
1116                         reg = <5>;
1117                         regulator-name = "vdd_3v3_com";
1118                         regulator-min-microvolt = <3300000>;
1119                         regulator-max-microvolt = <3300000>;
1120                         vin-supply = <&vdd_3v3_sys>;
1121                         enable-active-high;
1122                         gpio = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
1123                         regulator-always-on;
1124                         regulator-boot-on;
1125                 };
1126         };
1127 };