arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts

   1 /*
   2  *  Copyright (C) 2015 Marek Vasut <marex@denx.de>
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of
  12  *     the License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  *     You should have received a copy of the GNU General Public
  20  *     License along with this file; if not, write to the Free
  21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  *     MA 02110-1301 USA
  23  *
  24  * Or, alternatively,
  25  *
  26  *  b) Permission is hereby granted, free of charge, to any person
  27  *     obtaining a copy of this software and associated documentation
  28  *     files (the "Software"), to deal in the Software without
  29  *     restriction, including without limitation the rights to use,
  30  *     copy, modify, merge, publish, distribute, sublicense, and/or
  31  *     sell copies of the Software, and to permit persons to whom the
  32  *     Software is furnished to do so, subject to the following
  33  *     conditions:
  34  *
  35  *     The above copyright notice and this permission notice shall be
  36  *     included in all copies or substantial portions of the Software.
  37  *
  38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45  *     OTHER DEALINGS IN THE SOFTWARE.
  46  */
  47
  48 #include "socfpga_cyclone5.dtsi"
  49 #include <dt-bindings/gpio/gpio.h>
  50 #include <dt-bindings/input/input.h>
  51
  52 / {
  53         model = "samtec VIN|ING FPGA";
  54         compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
  55
  56         chosen {
  57                 bootargs = "earlyprintk";
  58                 stdout-path = "serial0:115200n8";
  59         };
  60
  61         memory@0 {
  62                 name = "memory";
  63                 device_type = "memory";
  64                 reg = <0x0 0x40000000>; /* 1GB */
  65         };
  66
  67         aliases {
  68                 /*
  69                  * This allow the ethaddr uboot environment variable contents
  70                  * to be added to the gmac1 device tree blob.
  71                  */
  72                 ethernet0 = &gmac1;
  73                 ethernet1 = &gmac0;
  74         };
  75
  76         gpio-keys {
  77                 compatible = "gpio-keys";
  78
  79                 hps_temp0 {
  80                         label = "BTN_0";                        /* TEMP_OS */
  81                         gpios = <&portc 18 GPIO_ACTIVE_LOW>;    /* HPS_GPIO60 */
  82                         linux,code = <BTN_0>;
  83                 };
  84
  85                 hps_hkey0 {
  86                         label = "BTN_1";                        /* DIS_PWR */
  87                         gpios = <&portc 19 GPIO_ACTIVE_LOW>;    /* HPS_GPIO61 */
  88                         linux,code = <BTN_1>;
  89                 };
  90
  91                 hps_hkey1 {
  92                         label = "hps_hkey1";                    /* POWER_DOWN */
  93                         gpios = <&portc 20 GPIO_ACTIVE_LOW>;    /* HPS_GPIO62 */
  94                         linux,code = <KEY_POWER>;
  95                 };
  96         };
  97
  98         regulator-usb-nrst {
  99                 compatible = "regulator-fixed";
 100                 regulator-name = "usb_nrst";
 101                 regulator-min-microvolt = <5000000>;
 102                 regulator-max-microvolt = <5000000>;
 103                 gpio = <&portb 5 GPIO_ACTIVE_HIGH>;
 104                 startup-delay-us = <70000>;
 105                 enable-active-high;
 106                 regulator-always-on;
 107         };
 108 };
 109
 110 &gmac1 {
 111         status = "okay";
 112         phy-mode = "rgmii";
 113         phy-handle = <&phy1>;
 114
 115         snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;
 116         snps,reset-active-low;
 117         snps,reset-delays-us = <10000 10000 10000>;
 118
 119         mdio0 {
 120                 #address-cells = <1>;
 121                 #size-cells = <0>;
 122                 compatible = "snps,dwmac-mdio";
 123                 phy1: ethernet-phy@1 {
 124                         reg = <1>;
 125                         rxd0-skew-ps = <0>;
 126                         rxd1-skew-ps = <0>;
 127                         rxd2-skew-ps = <0>;
 128                         rxd3-skew-ps = <0>;
 129                         txen-skew-ps = <0>;
 130                         txc-skew-ps = <2600>;
 131                         rxdv-skew-ps = <0>;
 132                         rxc-skew-ps = <2000>;
 133                 };
 134         };
 135 };
 136
 137 &gpio0 {        /* GPIO 0..29 */
 138         status = "okay";
 139 };
 140
 141 &gpio1 {        /* GPIO 30..57 */
 142         status = "okay";
 143 };
 144
 145 &gpio2 {        /* GPIO 58..66 (HLGPI 0..13 at offset 13) */
 146         status = "okay";
 147 };
 148
 149 &i2c0 {
 150         status = "okay";
 151
 152         gpio: pca9557@1f {
 153                 compatible = "nxp,pca9557";
 154                 reg = <0x1f>;
 155                 gpio-controller;
 156                 #gpio-cells = <2>;
 157         };
 158
 159         temp: lm75@48 {
 160                 compatible = "lm75";
 161                 reg = <0x48>;
 162         };
 163
 164         at24@50 {
 165                 compatible = "atmel,24c01";
 166                 pagesize = <8>;
 167                 reg = <0x50>;
 168         };
 169
 170         i2cswitch@70 {
 171                 compatible = "nxp,pca9548";
 172                 #address-cells = <1>;
 173                 #size-cells = <0>;
 174                 reg = <0x70>;
 175
 176                 i2c@0 {
 177                         #address-cells = <1>;
 178                         #size-cells = <0>;
 179                         reg = <0>;
 180                 };
 181
 182                 i2c@1 {
 183                         #address-cells = <1>;
 184                         #size-cells = <0>;
 185                         reg = <1>;
 186                 };
 187
 188                 i2c@2 {
 189                         #address-cells = <1>;
 190                         #size-cells = <0>;
 191                         reg = <2>;
 192                 };
 193
 194                 i2c@3 {
 195                         #address-cells = <1>;
 196                         #size-cells = <0>;
 197                         reg = <3>;
 198                 };
 199
 200                 i2c@4 {
 201                         #address-cells = <1>;
 202                         #size-cells = <0>;
 203                         reg = <4>;
 204                 };
 205
 206                 i2c@5 {
 207                         #address-cells = <1>;
 208                         #size-cells = <0>;
 209                         reg = <5>;
 210                 };
 211
 212                 i2c@6 { /* Backplane EEPROM */
 213                         #address-cells = <1>;
 214                         #size-cells = <0>;
 215                         reg = <6>;
 216                         eeprom@51 {
 217                                 compatible = "atmel,24c01";
 218                                 pagesize = <8>;
 219                                 reg = <0x51>;
 220                         };
 221                 };
 222
 223                 i2c@7 { /* Power board EEPROM */
 224                         #address-cells = <1>;
 225                         #size-cells = <0>;
 226                         reg = <7>;
 227                         eeprom@51 {
 228                                 compatible = "atmel,24c01";
 229                                 pagesize = <8>;
 230                                 reg = <0x51>;
 231                         };
 232                 };
 233         };
 234 };
 235
 236 &i2c1 {
 237         status = "okay";
 238         clock-frequency = <100000>;
 239
 240         at24@50 {
 241                 compatible = "atmel,24c02";
 242                 pagesize = <8>;
 243                 reg = <0x50>;
 244         };
 245 };
 246
 247 &qspi {
 248         status = "okay";
 249
 250         n25q128@0 {
 251                 #address-cells = <1>;
 252                 #size-cells = <1>;
 253                 compatible = "n25q128";
 254                 reg = <0>;              /* chip select */
 255                 spi-max-frequency = <100000000>;
 256                 m25p,fast-read;
 257
 258                 cdns,page-size = <256>;
 259                 cdns,block-size = <16>;
 260                 cdns,read-delay = <4>;
 261                 cdns,tshsl-ns = <50>;
 262                 cdns,tsd2d-ns = <50>;
 263                 cdns,tchsh-ns = <4>;
 264                 cdns,tslch-ns = <4>;
 265         };
 266
 267         n25q00@1 {
 268                 #address-cells = <1>;
 269                 #size-cells = <1>;
 270                 compatible = "n25q00";
 271                 reg = <1>;              /* chip select */
 272                 spi-max-frequency = <100000000>;
 273                 m25p,fast-read;
 274
 275                 cdns,page-size = <256>;
 276                 cdns,block-size = <16>;
 277                 cdns,read-delay = <4>;
 278                 cdns,tshsl-ns = <50>;
 279                 cdns,tsd2d-ns = <50>;
 280                 cdns,tchsh-ns = <4>;
 281                 cdns,tslch-ns = <4>;
 282         };
 283 };
 284
 285 &usb0 {
 286         dr_mode = "host";
 287         status = "okay";
 288 };
 289
 290 &usb1 {
 291         dr_mode = "peripheral";
 292         status = "okay";
 293 };