Merge tag 'devprop-4.21-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafae...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / socfpga_cyclone5_vining_fpga.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
2 /*
3  * Copyright (C) 2015 Marek Vasut <marex@denx.de>
4  */
5
6 #include "socfpga_cyclone5.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9
10 / {
11         model = "samtec VIN|ING FPGA";
12         compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
13
14         chosen {
15                 bootargs = "earlyprintk";
16                 stdout-path = "serial0:115200n8";
17         };
18
19         memory@0 {
20                 name = "memory";
21                 device_type = "memory";
22                 reg = <0x0 0x40000000>; /* 1GB */
23         };
24
25         aliases {
26                 /*
27                  * This allow the ethaddr uboot environment variable contents
28                  * to be added to the gmac1 device tree blob.
29                  */
30                 ethernet0 = &gmac1;
31                 ethernet1 = &gmac0;
32         };
33
34         gpio-keys {
35                 compatible = "gpio-keys";
36
37                 hps_temp0 {
38                         label = "BTN_0";                        /* TEMP_OS */
39                         gpios = <&portc 18 GPIO_ACTIVE_LOW>;    /* HPS_GPIO60 */
40                         linux,code = <BTN_0>;
41                 };
42
43                 hps_hkey0 {
44                         label = "BTN_1";                        /* DIS_PWR */
45                         gpios = <&portc 19 GPIO_ACTIVE_LOW>;    /* HPS_GPIO61 */
46                         linux,code = <BTN_1>;
47                 };
48
49                 hps_hkey1 {
50                         label = "hps_hkey1";                    /* POWER_DOWN */
51                         gpios = <&portc 20 GPIO_ACTIVE_LOW>;    /* HPS_GPIO62 */
52                         linux,code = <KEY_POWER>;
53                 };
54         };
55
56         regulator-usb-nrst {
57                 compatible = "regulator-fixed";
58                 regulator-name = "usb_nrst";
59                 regulator-min-microvolt = <5000000>;
60                 regulator-max-microvolt = <5000000>;
61                 gpio = <&portb 5 GPIO_ACTIVE_HIGH>;
62                 startup-delay-us = <70000>;
63                 enable-active-high;
64                 regulator-always-on;
65         };
66 };
67
68 &gmac1 {
69         status = "okay";
70         phy-mode = "rgmii";
71         phy-handle = <&phy1>;
72
73         snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;
74         snps,reset-active-low;
75         snps,reset-delays-us = <10000 10000 10000>;
76
77         mdio0 {
78                 #address-cells = <1>;
79                 #size-cells = <0>;
80                 compatible = "snps,dwmac-mdio";
81                 phy1: ethernet-phy@1 {
82                         reg = <1>;
83                         rxd0-skew-ps = <0>;
84                         rxd1-skew-ps = <0>;
85                         rxd2-skew-ps = <0>;
86                         rxd3-skew-ps = <0>;
87                         txen-skew-ps = <0>;
88                         txc-skew-ps = <2600>;
89                         rxdv-skew-ps = <0>;
90                         rxc-skew-ps = <2000>;
91                 };
92         };
93 };
94
95 &gpio0 {        /* GPIO 0..29 */
96         status = "okay";
97 };
98
99 &gpio1 {        /* GPIO 30..57 */
100         status = "okay";
101 };
102
103 &gpio2 {        /* GPIO 58..66 (HLGPI 0..13 at offset 13) */
104         status = "okay";
105 };
106
107 &i2c0 {
108         status = "okay";
109
110         gpio: pca9557@1f {
111                 compatible = "nxp,pca9557";
112                 reg = <0x1f>;
113                 gpio-controller;
114                 #gpio-cells = <2>;
115         };
116
117         temp: lm75@48 {
118                 compatible = "lm75";
119                 reg = <0x48>;
120         };
121
122         at24@50 {
123                 compatible = "atmel,24c01";
124                 pagesize = <8>;
125                 reg = <0x50>;
126         };
127
128         i2cswitch@70 {
129                 compatible = "nxp,pca9548";
130                 #address-cells = <1>;
131                 #size-cells = <0>;
132                 reg = <0x70>;
133
134                 i2c@0 {
135                         #address-cells = <1>;
136                         #size-cells = <0>;
137                         reg = <0>;
138                 };
139
140                 i2c@1 {
141                         #address-cells = <1>;
142                         #size-cells = <0>;
143                         reg = <1>;
144                 };
145
146                 i2c@2 {
147                         #address-cells = <1>;
148                         #size-cells = <0>;
149                         reg = <2>;
150                 };
151
152                 i2c@3 {
153                         #address-cells = <1>;
154                         #size-cells = <0>;
155                         reg = <3>;
156                 };
157
158                 i2c@4 {
159                         #address-cells = <1>;
160                         #size-cells = <0>;
161                         reg = <4>;
162                 };
163
164                 i2c@5 {
165                         #address-cells = <1>;
166                         #size-cells = <0>;
167                         reg = <5>;
168                 };
169
170                 i2c@6 { /* Backplane EEPROM */
171                         #address-cells = <1>;
172                         #size-cells = <0>;
173                         reg = <6>;
174                         eeprom@51 {
175                                 compatible = "atmel,24c01";
176                                 pagesize = <8>;
177                                 reg = <0x51>;
178                         };
179                 };
180
181                 i2c@7 { /* Power board EEPROM */
182                         #address-cells = <1>;
183                         #size-cells = <0>;
184                         reg = <7>;
185                         eeprom@51 {
186                                 compatible = "atmel,24c01";
187                                 pagesize = <8>;
188                                 reg = <0x51>;
189                         };
190                 };
191         };
192 };
193
194 &i2c1 {
195         status = "okay";
196         clock-frequency = <100000>;
197
198         at24@50 {
199                 compatible = "atmel,24c02";
200                 pagesize = <8>;
201                 reg = <0x50>;
202         };
203 };
204
205 &qspi {
206         status = "okay";
207
208         n25q128@0 {
209                 #address-cells = <1>;
210                 #size-cells = <1>;
211                 compatible = "n25q128";
212                 reg = <0>;              /* chip select */
213                 spi-max-frequency = <100000000>;
214                 m25p,fast-read;
215
216                 cdns,page-size = <256>;
217                 cdns,block-size = <16>;
218                 cdns,read-delay = <4>;
219                 cdns,tshsl-ns = <50>;
220                 cdns,tsd2d-ns = <50>;
221                 cdns,tchsh-ns = <4>;
222                 cdns,tslch-ns = <4>;
223         };
224
225         n25q00@1 {
226                 #address-cells = <1>;
227                 #size-cells = <1>;
228                 compatible = "n25q00";
229                 reg = <1>;              /* chip select */
230                 spi-max-frequency = <100000000>;
231                 m25p,fast-read;
232
233                 cdns,page-size = <256>;
234                 cdns,block-size = <16>;
235                 cdns,read-delay = <4>;
236                 cdns,tshsl-ns = <50>;
237                 cdns,tsd2d-ns = <50>;
238                 cdns,tchsh-ns = <4>;
239                 cdns,tslch-ns = <4>;
240         };
241 };
242
243 &usb0 {
244         dr_mode = "host";
245         status = "okay";
246 };
247
248 &usb1 {
249         dr_mode = "peripheral";
250         status = "okay";
251 };