arch/arm/boot/dts/sama5d3_gmac.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * sama5d3_gmac.dtsi - Device Tree Include file for SAMA5D3 SoC with
   4  * Gigabit Ethernet.
   5  *
   6  * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
   7  */
   8
   9 #include <dt-bindings/pinctrl/at91.h>
  10 #include <dt-bindings/interrupt-controller/irq.h>
  11
  12 / {
  13         ahb {
  14                 apb {
  15                         pinctrl@fffff200 {
  16                                 macb0 {
  17                                         pinctrl_macb0_data_rgmii: macb0_data_rgmii {
  18                                                 atmel,pins =
  19                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A GTX0, conflicts with PWMH0 */
  20                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A GTX1, conflicts with PWML0 */
  21                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB2 periph A GTX2, conflicts with TK1 */
  22                                                          AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB3 periph A GTX3, conflicts with TF1 */
  23                                                          AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB4 periph A GRX0, conflicts with PWMH1 */
  24                                                          AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB5 periph A GRX1, conflicts with PWML1 */
  25                                                          AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB6 periph A GRX2, conflicts with TD1 */
  26                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB7 periph A GRX3, conflicts with RK1 */
  27                                         };
  28                                         pinctrl_macb0_data_gmii: macb0_data_gmii {
  29                                                 atmel,pins =
  30                                                         <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB19 periph B GTX4, conflicts with MCI1_CDA */
  31                                                          AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
  32                                                          AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
  33                                                          AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
  34                                                          AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
  35                                                          AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB24 periph B GRX5, conflicts with MCI1_CK */
  36                                                          AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB25 periph B GRX6, conflicts with SCK1 */
  37                                                          AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
  38                                         };
  39                                         pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
  40                                                 atmel,pins =
  41                                                         <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB8 periph A GTXCK, conflicts with PWMH2 */
  42                                                          AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB9 periph A GTXEN, conflicts with PWML2 */
  43                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB11 periph A GRXCK, conflicts with RD1 */
  44                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB13 periph A GRXER, conflicts with PWML3 */
  45                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB16 periph A GMDC */
  46                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB17 periph A GMDIO */
  47                                                          AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
  48                                         };
  49                                         pinctrl_macb0_signal_gmii: macb0_signal_gmii {
  50                                                 atmel,pins =
  51                                                         <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB9 periph A GTXEN, conflicts with PWML2 */
  52                                                          AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB10 periph A GTXER, conflicts with RF1 */
  53                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB11 periph A GRXCK, conflicts with RD1 */
  54                                                          AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB12 periph A GRXDV, conflicts with PWMH3 */
  55                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB13 periph A GRXER, conflicts with PWML3 */
  56                                                          AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB14 periph A GCRS, conflicts with CANRX1 */
  57                                                          AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB15 periph A GCOL, conflicts with CANTX1 */
  58                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB16 periph A GMDC */
  59                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB17 periph A GMDIO */
  60                                                          AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
  61                                         };
  62
  63                                 };
  64                         };
  65
  66                         pmc: pmc@fffffc00 {
  67                                 periphck {
  68                                         macb0_clk: macb0_clk {
  69                                                 #clock-cells = <0>;
  70                                                 reg = <34>;
  71                                         };
  72                                 };
  73                         };
  74
  75                         macb0: ethernet@f0028000 {
  76                                 compatible = "atmel,sama5d3-gem";
  77                                 reg = <0xf0028000 0x100>;
  78                                 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
  79                                 pinctrl-names = "default";
  80                                 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
  81                                 clocks = <&macb0_clk>, <&macb0_clk>;
  82                                 clock-names = "hclk", "pclk";
  83                                 status = "disabled";
  84                         };
  85                 };
  86         };
  87 };