2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 * Licensed under GPLv2 or later.
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
20 model = "Atmel SAMA5D3 family SoC";
21 compatible = "atmel,sama5d3", "atmel,sama5";
22 interrupt-parent = <&aic>;
49 compatible = "arm,cortex-a5";
55 compatible = "arm,cortex-a5-pmu";
56 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
60 device_type = "memory";
61 reg = <0x20000000 0x8000000>;
65 slow_xtal: slow_xtal {
66 compatible = "fixed-clock";
68 clock-frequency = <0>;
71 main_xtal: main_xtal {
72 compatible = "fixed-clock";
74 clock-frequency = <0>;
77 adc_op_clk: adc_op_clk{
78 compatible = "fixed-clock";
80 clock-frequency = <1000000>;
85 compatible = "mmio-sram";
86 reg = <0x00300000 0x20000>;
90 compatible = "simple-bus";
96 compatible = "simple-bus";
102 compatible = "atmel,hsmci";
103 reg = <0xf0000000 0x600>;
104 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
105 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
110 #address-cells = <1>;
112 clocks = <&mci0_clk>;
113 clock-names = "mci_clk";
117 #address-cells = <1>;
119 compatible = "atmel,at91rm9200-spi";
120 reg = <0xf0004000 0x100>;
121 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
122 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
123 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
124 dma-names = "tx", "rx";
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_spi0>;
127 clocks = <&spi0_clk>;
128 clock-names = "spi_clk";
133 compatible = "atmel,at91sam9g45-ssc";
134 reg = <0xf0008000 0x4000>;
135 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
136 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
137 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
138 dma-names = "tx", "rx";
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
141 clocks = <&ssc0_clk>;
142 clock-names = "pclk";
146 tcb0: timer@f0010000 {
147 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
148 #address-cells = <1>;
150 reg = <0xf0010000 0x100>;
151 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
152 clocks = <&tcb0_clk>, <&clk32k>;
153 clock-names = "t0_clk", "slow_clk";
157 compatible = "atmel,at91sam9x5-i2c";
158 reg = <0xf0014000 0x4000>;
159 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
160 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
161 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
162 dma-names = "tx", "rx";
163 pinctrl-names = "default";
164 pinctrl-0 = <&pinctrl_i2c0>;
165 #address-cells = <1>;
167 clocks = <&twi0_clk>;
172 compatible = "atmel,at91sam9x5-i2c";
173 reg = <0xf0018000 0x4000>;
174 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
175 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
176 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
177 dma-names = "tx", "rx";
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_i2c1>;
180 #address-cells = <1>;
182 clocks = <&twi1_clk>;
186 usart0: serial@f001c000 {
187 compatible = "atmel,at91sam9260-usart";
188 reg = <0xf001c000 0x100>;
189 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
190 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
191 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
192 dma-names = "tx", "rx";
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_usart0>;
195 clocks = <&usart0_clk>;
196 clock-names = "usart";
200 usart1: serial@f0020000 {
201 compatible = "atmel,at91sam9260-usart";
202 reg = <0xf0020000 0x100>;
203 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
204 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
205 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
206 dma-names = "tx", "rx";
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_usart1>;
209 clocks = <&usart1_clk>;
210 clock-names = "usart";
214 uart0: serial@f0024000 {
215 compatible = "atmel,at91sam9260-usart";
216 reg = <0xf0024000 0x100>;
217 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_uart0>;
220 clocks = <&uart0_clk>;
221 clock-names = "usart";
226 compatible = "atmel,sama5d3-pwm";
227 reg = <0xf002c000 0x300>;
228 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
235 compatible = "atmel,at91sam9g45-isi";
236 reg = <0xf0034000 0x4000>;
237 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
238 pinctrl-names = "default";
239 pinctrl-0 = <&pinctrl_isi_data_0_7>;
241 clock-names = "isi_clk";
244 #address-cells = <1>;
250 compatible = "atmel,sama5d3-sfr", "syscon";
251 reg = <0xf0038000 0x60>;
255 compatible = "atmel,hsmci";
256 reg = <0xf8000000 0x600>;
257 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
258 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
260 pinctrl-names = "default";
261 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
263 #address-cells = <1>;
265 clocks = <&mci1_clk>;
266 clock-names = "mci_clk";
270 #address-cells = <1>;
272 compatible = "atmel,at91rm9200-spi";
273 reg = <0xf8008000 0x100>;
274 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
275 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
276 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
277 dma-names = "tx", "rx";
278 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_spi1>;
280 clocks = <&spi1_clk>;
281 clock-names = "spi_clk";
286 compatible = "atmel,at91sam9g45-ssc";
287 reg = <0xf800c000 0x4000>;
288 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
289 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
290 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
291 dma-names = "tx", "rx";
292 pinctrl-names = "default";
293 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
294 clocks = <&ssc1_clk>;
295 clock-names = "pclk";
300 #address-cells = <1>;
302 compatible = "atmel,at91sam9x5-adc";
303 reg = <0xf8018000 0x100>;
304 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
305 pinctrl-names = "default";
323 clock-names = "adc_clk", "adc_op_clk";
324 atmel,adc-channels-used = <0xfff>;
325 atmel,adc-startup-time = <40>;
326 atmel,adc-use-external-triggers;
327 atmel,adc-vref = <3000>;
328 atmel,adc-res = <10 12>;
329 atmel,adc-sample-hold-time = <11>;
330 atmel,adc-res-names = "lowres", "highres";
334 trigger-name = "external-rising";
335 trigger-value = <0x1>;
339 trigger-name = "external-falling";
340 trigger-value = <0x2>;
344 trigger-name = "external-any";
345 trigger-value = <0x3>;
349 trigger-name = "continuous";
350 trigger-value = <0x6>;
355 compatible = "atmel,at91sam9x5-i2c";
356 reg = <0xf801c000 0x4000>;
357 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
358 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
359 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
360 dma-names = "tx", "rx";
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_i2c2>;
363 #address-cells = <1>;
365 clocks = <&twi2_clk>;
369 usart2: serial@f8020000 {
370 compatible = "atmel,at91sam9260-usart";
371 reg = <0xf8020000 0x100>;
372 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
373 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
374 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
375 dma-names = "tx", "rx";
376 pinctrl-names = "default";
377 pinctrl-0 = <&pinctrl_usart2>;
378 clocks = <&usart2_clk>;
379 clock-names = "usart";
383 usart3: serial@f8024000 {
384 compatible = "atmel,at91sam9260-usart";
385 reg = <0xf8024000 0x100>;
386 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
387 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
388 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
389 dma-names = "tx", "rx";
390 pinctrl-names = "default";
391 pinctrl-0 = <&pinctrl_usart3>;
392 clocks = <&usart3_clk>;
393 clock-names = "usart";
398 compatible = "atmel,at91sam9g46-sha";
399 reg = <0xf8034000 0x100>;
400 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
401 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
404 clock-names = "sha_clk";
408 compatible = "atmel,at91sam9g46-aes";
409 reg = <0xf8038000 0x100>;
410 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
411 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
412 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
413 dma-names = "tx", "rx";
415 clock-names = "aes_clk";
419 compatible = "atmel,at91sam9g46-tdes";
420 reg = <0xf803c000 0x100>;
421 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
422 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
423 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
424 dma-names = "tx", "rx";
425 clocks = <&tdes_clk>;
426 clock-names = "tdes_clk";
430 compatible = "atmel,at91sam9g45-trng";
431 reg = <0xf8040000 0x100>;
432 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
433 clocks = <&trng_clk>;
436 hsmc: hsmc@ffffc000 {
437 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
438 reg = <0xffffc000 0x1000>;
439 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
440 clocks = <&hsmc_clk>;
441 #address-cells = <1>;
445 pmecc: ecc-engine@ffffc070 {
446 compatible = "atmel,at91sam9g45-pmecc";
447 reg = <0xffffc070 0x490>,
452 dma0: dma-controller@ffffe600 {
453 compatible = "atmel,at91sam9g45-dma";
454 reg = <0xffffe600 0x200>;
455 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
457 clocks = <&dma0_clk>;
458 clock-names = "dma_clk";
461 dma1: dma-controller@ffffe800 {
462 compatible = "atmel,at91sam9g45-dma";
463 reg = <0xffffe800 0x200>;
464 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
466 clocks = <&dma1_clk>;
467 clock-names = "dma_clk";
470 ramc0: ramc@ffffea00 {
471 compatible = "atmel,sama5d3-ddramc";
472 reg = <0xffffea00 0x200>;
473 clocks = <&ddrck>, <&mpddr_clk>;
474 clock-names = "ddrck", "mpddr";
477 dbgu: serial@ffffee00 {
478 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
479 reg = <0xffffee00 0x200>;
480 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
481 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
482 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
483 dma-names = "tx", "rx";
484 pinctrl-names = "default";
485 pinctrl-0 = <&pinctrl_dbgu>;
486 clocks = <&dbgu_clk>;
487 clock-names = "usart";
491 aic: interrupt-controller@fffff000 {
492 #interrupt-cells = <3>;
493 compatible = "atmel,sama5d3-aic";
494 interrupt-controller;
495 reg = <0xfffff000 0x200>;
496 atmel,external-irqs = <47>;
499 pinctrl: pinctrl@fffff200 {
500 #address-cells = <1>;
502 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
503 ranges = <0xfffff200 0xfffff200 0xa00>;
506 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
507 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
508 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
509 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
510 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
513 /* shared pinctrl settings */
515 pinctrl_adc0_adtrg: adc0_adtrg {
517 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
519 pinctrl_adc0_ad0: adc0_ad0 {
521 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
523 pinctrl_adc0_ad1: adc0_ad1 {
525 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
527 pinctrl_adc0_ad2: adc0_ad2 {
529 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
531 pinctrl_adc0_ad3: adc0_ad3 {
533 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
535 pinctrl_adc0_ad4: adc0_ad4 {
537 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
539 pinctrl_adc0_ad5: adc0_ad5 {
541 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
543 pinctrl_adc0_ad6: adc0_ad6 {
545 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
547 pinctrl_adc0_ad7: adc0_ad7 {
549 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
551 pinctrl_adc0_ad8: adc0_ad8 {
553 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
555 pinctrl_adc0_ad9: adc0_ad9 {
557 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
559 pinctrl_adc0_ad10: adc0_ad10 {
561 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
563 pinctrl_adc0_ad11: adc0_ad11 {
565 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
570 pinctrl_dbgu: dbgu-0 {
572 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
573 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
578 pinctrl_ebi_addr: ebi-addr-0 {
580 <AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
581 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
582 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
583 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
584 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
585 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
586 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
587 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
588 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
589 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
590 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
591 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
592 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
593 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
594 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
595 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
596 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
597 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
598 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
599 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
600 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
601 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
602 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
605 pinctrl_ebi_nand_addr: ebi-addr-1 {
607 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
608 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
611 pinctrl_ebi_cs0: ebi-cs0-0 {
613 <AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
616 pinctrl_ebi_cs1: ebi-cs1-0 {
618 <AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
621 pinctrl_ebi_cs2: ebi-cs2-0 {
623 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
626 pinctrl_ebi_nwait: ebi-nwait-0 {
628 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
631 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
633 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
638 pinctrl_i2c0: i2c0-0 {
640 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
641 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
646 pinctrl_i2c1: i2c1-0 {
648 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
649 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
654 pinctrl_i2c2: i2c2-0 {
656 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
657 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
662 pinctrl_isi_data_0_7: isi-0-data-0-7 {
664 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
665 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
666 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
667 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
668 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
669 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
670 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
671 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
672 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
673 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
674 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
677 pinctrl_isi_data_8_9: isi-0-data-8-9 {
679 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
680 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
683 pinctrl_isi_data_10_11: isi-0-data-10-11 {
685 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
686 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
691 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
693 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
694 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
695 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
697 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
699 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
700 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
701 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
703 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
705 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
706 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
707 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
708 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
713 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
715 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
716 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
717 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
719 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
721 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
722 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
723 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
728 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
730 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
731 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
736 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
738 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
740 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
742 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
744 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
746 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
748 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
750 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
753 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
755 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
757 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
759 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
761 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
763 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
765 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
767 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
769 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
771 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
773 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
775 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
778 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
780 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
782 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
784 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
786 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
788 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
790 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
792 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
795 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
797 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
799 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
801 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
803 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
805 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
807 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
809 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
814 pinctrl_spi0: spi0-0 {
816 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
817 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
818 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
823 pinctrl_spi1: spi1-0 {
825 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
826 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
827 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
832 pinctrl_ssc0_tx: ssc0_tx {
834 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
835 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
836 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
839 pinctrl_ssc0_rx: ssc0_rx {
841 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
842 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
843 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
848 pinctrl_ssc1_tx: ssc1_tx {
850 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
851 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
852 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
855 pinctrl_ssc1_rx: ssc1_rx {
857 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
858 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
859 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
864 pinctrl_uart0: uart0-0 {
866 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with PWMFI2, ISI_D8 */
867 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with ISI_PCK */
872 pinctrl_uart1: uart1-0 {
874 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with TWD0, ISI_VSYNC */
875 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with TWCK0, ISI_HSYNC */
880 pinctrl_usart0: usart0-0 {
882 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
883 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
886 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
888 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
889 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
894 pinctrl_usart1: usart1-0 {
896 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
897 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
900 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
902 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
903 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
908 pinctrl_usart2: usart2-0 {
910 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A25 */
911 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts NCS0 */
914 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
916 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
917 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
922 pinctrl_usart3: usart3-0 {
924 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* conflicts with A18 */
925 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with A19 */
928 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
930 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
931 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
936 pioA: gpio@fffff200 {
937 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
938 reg = <0xfffff200 0x100>;
939 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
942 interrupt-controller;
943 #interrupt-cells = <2>;
944 clocks = <&pioA_clk>;
947 pioB: gpio@fffff400 {
948 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
949 reg = <0xfffff400 0x100>;
950 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
953 interrupt-controller;
954 #interrupt-cells = <2>;
955 clocks = <&pioB_clk>;
958 pioC: gpio@fffff600 {
959 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
960 reg = <0xfffff600 0x100>;
961 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
964 interrupt-controller;
965 #interrupt-cells = <2>;
966 clocks = <&pioC_clk>;
969 pioD: gpio@fffff800 {
970 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
971 reg = <0xfffff800 0x100>;
972 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
975 interrupt-controller;
976 #interrupt-cells = <2>;
977 clocks = <&pioD_clk>;
980 pioE: gpio@fffffa00 {
981 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
982 reg = <0xfffffa00 0x100>;
983 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
986 interrupt-controller;
987 #interrupt-cells = <2>;
988 clocks = <&pioE_clk>;
993 compatible = "atmel,sama5d3-pmc", "syscon";
994 reg = <0xfffffc00 0x120>;
995 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
996 interrupt-controller;
997 #address-cells = <1>;
999 #interrupt-cells = <1>;
1001 main_rc_osc: main_rc_osc {
1002 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
1004 interrupt-parent = <&pmc>;
1005 interrupts = <AT91_PMC_MOSCRCS>;
1006 clock-frequency = <12000000>;
1007 clock-accuracy = <50000000>;
1010 main_osc: main_osc {
1011 compatible = "atmel,at91rm9200-clk-main-osc";
1013 interrupt-parent = <&pmc>;
1014 interrupts = <AT91_PMC_MOSCS>;
1015 clocks = <&main_xtal>;
1019 compatible = "atmel,at91sam9x5-clk-main";
1021 interrupt-parent = <&pmc>;
1022 interrupts = <AT91_PMC_MOSCSELS>;
1023 clocks = <&main_rc_osc &main_osc>;
1027 compatible = "atmel,sama5d3-clk-pll";
1029 interrupt-parent = <&pmc>;
1030 interrupts = <AT91_PMC_LOCKA>;
1033 atmel,clk-input-range = <8000000 50000000>;
1034 #atmel,pll-clk-output-range-cells = <4>;
1035 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
1038 plladiv: plladivck {
1039 compatible = "atmel,at91sam9x5-clk-plldiv";
1045 compatible = "atmel,at91sam9x5-clk-utmi";
1047 interrupt-parent = <&pmc>;
1048 interrupts = <AT91_PMC_LOCKU>;
1053 compatible = "atmel,at91sam9x5-clk-master";
1055 interrupt-parent = <&pmc>;
1056 interrupts = <AT91_PMC_MCKRDY>;
1057 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
1058 atmel,clk-output-range = <0 166000000>;
1059 atmel,clk-divisors = <1 2 4 3>;
1063 compatible = "atmel,at91sam9x5-clk-usb";
1065 clocks = <&plladiv>, <&utmi>;
1069 compatible = "atmel,at91sam9x5-clk-programmable";
1070 #address-cells = <1>;
1072 interrupt-parent = <&pmc>;
1073 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
1078 interrupts = <AT91_PMC_PCKRDY(0)>;
1084 interrupts = <AT91_PMC_PCKRDY(1)>;
1090 interrupts = <AT91_PMC_PCKRDY(2)>;
1095 compatible = "atmel,at91sam9x5-clk-smd";
1097 clocks = <&plladiv>, <&utmi>;
1101 compatible = "atmel,at91rm9200-clk-system";
1102 #address-cells = <1>;
1149 compatible = "atmel,at91sam9x5-clk-peripheral";
1150 #address-cells = <1>;
1154 dbgu_clk: dbgu_clk {
1159 hsmc_clk: hsmc_clk {
1164 pioA_clk: pioA_clk {
1169 pioB_clk: pioB_clk {
1174 pioC_clk: pioC_clk {
1179 pioD_clk: pioD_clk {
1184 pioE_clk: pioE_clk {
1189 usart0_clk: usart0_clk {
1192 atmel,clk-output-range = <0 66000000>;
1195 usart1_clk: usart1_clk {
1198 atmel,clk-output-range = <0 66000000>;
1201 usart2_clk: usart2_clk {
1204 atmel,clk-output-range = <0 66000000>;
1207 usart3_clk: usart3_clk {
1210 atmel,clk-output-range = <0 66000000>;
1213 uart0_clk: uart0_clk {
1216 atmel,clk-output-range = <0 66000000>;
1219 twi0_clk: twi0_clk {
1222 atmel,clk-output-range = <0 16625000>;
1225 twi1_clk: twi1_clk {
1228 atmel,clk-output-range = <0 16625000>;
1231 twi2_clk: twi2_clk {
1234 atmel,clk-output-range = <0 16625000>;
1237 mci0_clk: mci0_clk {
1242 mci1_clk: mci1_clk {
1247 spi0_clk: spi0_clk {
1250 atmel,clk-output-range = <0 133000000>;
1253 spi1_clk: spi1_clk {
1256 atmel,clk-output-range = <0 133000000>;
1259 tcb0_clk: tcb0_clk {
1262 atmel,clk-output-range = <0 133000000>;
1273 atmel,clk-output-range = <0 66000000>;
1276 dma0_clk: dma0_clk {
1281 dma1_clk: dma1_clk {
1286 uhphs_clk: uhphs_clk {
1291 udphs_clk: udphs_clk {
1301 ssc0_clk: ssc0_clk {
1304 atmel,clk-output-range = <0 66000000>;
1307 ssc1_clk: ssc1_clk {
1310 atmel,clk-output-range = <0 66000000>;
1323 tdes_clk: tdes_clk {
1328 trng_clk: trng_clk {
1333 fuse_clk: fuse_clk {
1338 mpddr_clk: mpddr_clk {
1345 reset_controller: rstc@fffffe00 {
1346 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1347 reg = <0xfffffe00 0x10>;
1351 shutdown_controller: shutdown-controller@fffffe10 {
1352 compatible = "atmel,at91sam9x5-shdwc";
1353 reg = <0xfffffe10 0x10>;
1357 pit: timer@fffffe30 {
1358 compatible = "atmel,at91sam9260-pit";
1359 reg = <0xfffffe30 0xf>;
1360 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1364 watchdog: watchdog@fffffe40 {
1365 compatible = "atmel,at91sam9260-wdt";
1366 reg = <0xfffffe40 0x10>;
1367 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1369 atmel,watchdog-type = "hardware";
1370 atmel,reset-type = "all";
1372 status = "disabled";
1376 compatible = "atmel,at91sam9x5-sckc";
1377 reg = <0xfffffe50 0x4>;
1379 slow_rc_osc: slow_rc_osc {
1380 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1382 clock-frequency = <32768>;
1383 clock-accuracy = <50000000>;
1384 atmel,startup-time-usec = <75>;
1387 slow_osc: slow_osc {
1388 compatible = "atmel,at91sam9x5-clk-slow-osc";
1390 clocks = <&slow_xtal>;
1391 atmel,startup-time-usec = <1200000>;
1395 compatible = "atmel,at91sam9x5-clk-slow";
1397 clocks = <&slow_rc_osc &slow_osc>;
1402 compatible = "atmel,at91rm9200-rtc";
1403 reg = <0xfffffeb0 0x30>;
1404 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1409 nfc_sram: sram@200000 {
1410 compatible = "mmio-sram";
1412 reg = <0x200000 0x2400>;
1415 usb0: gadget@500000 {
1416 #address-cells = <1>;
1418 compatible = "atmel,sama5d3-udc";
1419 reg = <0x00500000 0x100000
1421 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1422 clocks = <&udphs_clk>, <&utmi>;
1423 clock-names = "pclk", "hclk";
1424 status = "disabled";
1428 atmel,fifo-size = <64>;
1429 atmel,nb-banks = <1>;
1434 atmel,fifo-size = <1024>;
1435 atmel,nb-banks = <3>;
1442 atmel,fifo-size = <1024>;
1443 atmel,nb-banks = <3>;
1450 atmel,fifo-size = <1024>;
1451 atmel,nb-banks = <2>;
1457 atmel,fifo-size = <1024>;
1458 atmel,nb-banks = <2>;
1464 atmel,fifo-size = <1024>;
1465 atmel,nb-banks = <2>;
1471 atmel,fifo-size = <1024>;
1472 atmel,nb-banks = <2>;
1478 atmel,fifo-size = <1024>;
1479 atmel,nb-banks = <2>;
1485 atmel,fifo-size = <1024>;
1486 atmel,nb-banks = <2>;
1491 atmel,fifo-size = <1024>;
1492 atmel,nb-banks = <2>;
1497 atmel,fifo-size = <1024>;
1498 atmel,nb-banks = <2>;
1503 atmel,fifo-size = <1024>;
1504 atmel,nb-banks = <2>;
1509 atmel,fifo-size = <1024>;
1510 atmel,nb-banks = <2>;
1515 atmel,fifo-size = <1024>;
1516 atmel,nb-banks = <2>;
1521 atmel,fifo-size = <1024>;
1522 atmel,nb-banks = <2>;
1527 atmel,fifo-size = <1024>;
1528 atmel,nb-banks = <2>;
1533 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1534 reg = <0x00600000 0x100000>;
1535 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1536 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1537 clock-names = "ohci_clk", "hclk", "uhpck";
1538 status = "disabled";
1542 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1543 reg = <0x00700000 0x100000>;
1544 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1545 clocks = <&utmi>, <&uhphs_clk>;
1546 clock-names = "usb_clk", "ehci_clk";
1547 status = "disabled";
1551 compatible = "atmel,sama5d3-ebi";
1552 #address-cells = <2>;
1554 atmel,smc = <&hsmc>;
1555 reg = <0x10000000 0x10000000
1556 0x40000000 0x30000000>;
1557 ranges = <0x0 0x0 0x10000000 0x10000000
1558 0x1 0x0 0x40000000 0x10000000
1559 0x2 0x0 0x50000000 0x10000000
1560 0x3 0x0 0x60000000 0x10000000>;
1562 status = "disabled";
1564 nand_controller: nand-controller {
1565 compatible = "atmel,sama5d3-nand-controller";
1566 atmel,nfc-sram = <&nfc_sram>;
1567 atmel,nfc-io = <&nfc_io>;
1568 ecc-engine = <&pmecc>;
1569 #address-cells = <2>;
1572 status = "disabled";
1576 nfc_io: nfc-io@70000000 {
1577 compatible = "atmel,sama5d3-nfc-io", "syscon";
1578 reg = <0x70000000 0x8000000>;