arch/arm/boot/dts/rk3288-veyron-speedy.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Google Veyron Speedy Rev 1+ board device tree source
   4  *
   5  * Copyright 2015 Google, Inc
   6  */
   7
   8 /dts-v1/;
   9 #include "rk3288-veyron-chromebook.dtsi"
  10 #include "cros-ec-sbs.dtsi"
  11
  12 / {
  13         model = "Google Speedy";
  14         compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
  15                      "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
  16                      "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
  17                      "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
  18                      "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
  19 };
  20
  21 &cpu_alert0 {
  22         temperature = <65000>;
  23 };
  24
  25 &cpu_alert1 {
  26         temperature = <70000>;
  27 };
  28
  29 &cpu_crit {
  30         temperature = <90000>;
  31 };
  32
  33 &edp {
  34         /delete-property/pinctrl-names;
  35         /delete-property/pinctrl-0;
  36
  37         force-hpd;
  38 };
  39
  40 &gpu_alert0 {
  41         temperature = <80000>;
  42 };
  43
  44 &gpu_crit {
  45         temperature = <90000>;
  46 };
  47
  48 &rk808 {
  49         pinctrl-names = "default";
  50         pinctrl-0 = <&pmic_int_l>;
  51 };
  52
  53 &sdmmc {
  54         disable-wp;
  55         pinctrl-names = "default";
  56         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
  57                         &sdmmc_bus4>;
  58 };
  59
  60 &vcc_5v {
  61         enable-active-high;
  62         gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
  63         pinctrl-names = "default";
  64         pinctrl-0 = <&drv_5v>;
  65 };
  66
  67 &vcc50_hdmi {
  68         enable-active-high;
  69         gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
  70         pinctrl-names = "default";
  71         pinctrl-0 = <&vcc50_hdmi_en>;
  72 };
  73
  74 &gpio0 {
  75         gpio-line-names = "PMIC_SLEEP_AP",
  76                           "DDRIO_PWROFF",
  77                           "DDRIO_RETEN",
  78                           "TS3A227E_INT_L",
  79                           "PMIC_INT_L",
  80                           "PWR_KEY_L",
  81                           "AP_LID_INT_L",
  82                           "EC_IN_RW",
  83
  84                           "AC_PRESENT_AP",
  85                           /*
  86                            * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
  87                            * it REC_MODE_L.
  88                            */
  89                           "RECOVERY_SW_L",
  90                           "OTP_OUT",
  91                           "HOST1_PWR_EN",
  92                           "USBOTG_PWREN_H",
  93                           "AP_WARM_RESET_H",
  94                           "nFALUT2",
  95                           "I2C0_SDA_PMIC",
  96
  97                           "I2C0_SCL_PMIC",
  98                           "SUSPEND_L",
  99                           "USB_INT";
 100 };
 101
 102 &gpio2 {
 103         gpio-line-names = "CONFIG0",
 104                           "CONFIG1",
 105                           "CONFIG2",
 106                           "",
 107                           "",
 108                           "",
 109                           "",
 110                           "CONFIG3",
 111
 112                           "PWRLIMIT#_CPU",
 113                           "EMMC_RST_L",
 114                           "",
 115                           "",
 116                           "BL_PWR_EN",
 117                           "AVDD_1V8_DISP_EN";
 118 };
 119
 120 &gpio3 {
 121         gpio-line-names = "FLASH0_D0",
 122                           "FLASH0_D1",
 123                           "FLASH0_D2",
 124                           "FLASH0_D3",
 125                           "FLASH0_D4",
 126                           "FLASH0_D5",
 127                           "FLASH0_D6",
 128                           "FLASH0_D7",
 129
 130                           "",
 131                           "",
 132                           "",
 133                           "",
 134                           "",
 135                           "",
 136                           "",
 137                           "",
 138
 139                           "FLASH0_CS2/EMMC_CMD",
 140                           "",
 141                           "FLASH0_DQS/EMMC_CLKO";
 142 };
 143
 144 &gpio4 {
 145         gpio-line-names = "",
 146                           "",
 147                           "",
 148                           "",
 149                           "",
 150                           "",
 151                           "",
 152                           "",
 153
 154                           "",
 155                           "",
 156                           "",
 157                           "",
 158                           "",
 159                           "",
 160                           "",
 161                           "",
 162
 163                           "UART0_RXD",
 164                           "UART0_TXD",
 165                           "UART0_CTS",
 166                           "UART0_RTS",
 167                           "SDIO0_D0",
 168                           "SDIO0_D1",
 169                           "SDIO0_D2",
 170                           "SDIO0_D3",
 171
 172                           "SDIO0_CMD",
 173                           "SDIO0_CLK",
 174                           "BT_DEV_WAKE",
 175                           "",
 176                           "WIFI_ENABLE_H",
 177                           "BT_ENABLE_L",
 178                           "WIFI_HOST_WAKE",
 179                           "BT_HOST_WAKE";
 180 };
 181
 182 &gpio5 {
 183         gpio-line-names = "",
 184                           "",
 185                           "",
 186                           "",
 187                           "",
 188                           "",
 189                           "",
 190                           "",
 191
 192                           "",
 193                           "",
 194                           "",
 195                           "",
 196                           "SPI0_CLK",
 197                           "SPI0_CS0",
 198                           "SPI0_TXD",
 199                           "SPI0_RXD",
 200
 201                           "",
 202                           "",
 203                           "",
 204                           "VCC50_HDMI_EN";
 205 };
 206
 207 &gpio6 {
 208         gpio-line-names = "I2S0_SCLK",
 209                           "I2S0_LRCK_RX",
 210                           "I2S0_LRCK_TX",
 211                           "I2S0_SDI",
 212                           "I2S0_SDO0",
 213                           "HP_DET_H",
 214                           "ALS_INT",            /* not connected */
 215                           "INT_CODEC",
 216
 217                           "I2S0_CLK",
 218                           "I2C2_SDA",
 219                           "I2C2_SCL",
 220                           "MICDET",
 221                           "",
 222                           "",
 223                           "",
 224                           "",
 225
 226                           "SDMMC_D0",
 227                           "SDMMC_D1",
 228                           "SDMMC_D2",
 229                           "SDMMC_D3",
 230                           "SDMMC_CLK",
 231                           "SDMMC_CMD";
 232 };
 233
 234 &gpio7 {
 235         gpio-line-names = "LCDC_BL",
 236                           "PWM_LOG",
 237                           "BL_EN",
 238                           "TRACKPAD_INT",
 239                           "TPM_INT_H",
 240                           "SDMMC_DET_L",
 241                           /*
 242                            * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
 243                            * it FW_WP_AP.
 244                            */
 245                           "AP_FLASH_WP_L",
 246                           "EC_INT",
 247
 248                           "CPU_NMI",
 249                           "DVS_OK",
 250                           "",
 251                           "EDP_HOTPLUG",
 252                           "DVS1",
 253                           "nFALUT1",
 254                           "LCD_EN",
 255                           "DVS2",
 256
 257                           "VCC5V_GOOD_H",
 258                           "I2C4_SDA_TP",
 259                           "I2C4_SCL_TP",
 260                           "I2C5_SDA_HDMI",
 261                           "I2C5_SCL_HDMI",
 262                           "5V_DRV",
 263                           "UART2_RXD",
 264                           "UART2_TXD";
 265 };
 266
 267 &gpio8 {
 268         gpio-line-names = "RAM_ID0",
 269                           "RAM_ID1",
 270                           "RAM_ID2",
 271                           "RAM_ID3",
 272                           "I2C1_SDA_TPM",
 273                           "I2C1_SCL_TPM",
 274                           "SPI2_CLK",
 275                           "SPI2_CS0",
 276
 277                           "SPI2_RXD",
 278                           "SPI2_TXD";
 279 };
 280
 281 &pinctrl {
 282         buck-5v {
 283                 drv_5v: drv-5v {
 284                         rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
 285                 };
 286         };
 287
 288         hdmi {
 289                 vcc50_hdmi_en: vcc50-hdmi-en {
 290                         rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
 291                 };
 292         };
 293
 294         pmic {
 295                 dvs_1: dvs-1 {
 296                         rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
 297                 };
 298
 299                 dvs_2: dvs-2 {
 300                         rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
 301                 };
 302         };
 303 };