Merge tag 'asoc-v4.19-rc4' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / rk3288-veyron-jaq.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Google Veyron Jaq Rev 1+ board device tree source
4  *
5  * Copyright 2015 Google, Inc
6  */
7
8 /dts-v1/;
9
10 #include "rk3288-veyron-chromebook.dtsi"
11 #include "cros-ec-sbs.dtsi"
12
13 / {
14         model = "Google Jaq";
15         compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
16                      "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
17                      "google,veyron-jaq-rev1", "google,veyron-jaq",
18                      "google,veyron", "rockchip,rk3288";
19
20         panel_regulator: panel-regulator {
21                 compatible = "regulator-fixed";
22                 enable-active-high;
23                 gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
24                 pinctrl-names = "default";
25                 pinctrl-0 = <&lcd_enable_h>;
26                 regulator-name = "panel_regulator";
27                 startup-delay-us = <100000>;
28                 vin-supply = <&vcc33_sys>;
29         };
30
31         vcc18_lcd: vcc18-lcd {
32                 compatible = "regulator-fixed";
33                 enable-active-high;
34                 gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
35                 pinctrl-names = "default";
36                 pinctrl-0 = <&avdd_1v8_disp_en>;
37                 regulator-name = "vcc18_lcd";
38                 regulator-always-on;
39                 regulator-boot-on;
40                 vin-supply = <&vcc18_wl>;
41         };
42
43         backlight_regulator: backlight-regulator {
44                 compatible = "regulator-fixed";
45                 enable-active-high;
46                 gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
47                 pinctrl-names = "default";
48                 pinctrl-0 = <&bl_pwr_en>;
49                 regulator-name = "backlight_regulator";
50                 vin-supply = <&vcc33_sys>;
51                 startup-delay-us = <15000>;
52         };
53 };
54
55 &backlight {
56         /* Jaq panel PWM must be >= 3%, so start non-zero brightness at 8 */
57         brightness-levels = <
58                   0
59                   8   9  10  11  12  13  14  15
60                  16  17  18  19  20  21  22  23
61                  24  25  26  27  28  29  30  31
62                  32  33  34  35  36  37  38  39
63                  40  41  42  43  44  45  46  47
64                  48  49  50  51  52  53  54  55
65                  56  57  58  59  60  61  62  63
66                  64  65  66  67  68  69  70  71
67                  72  73  74  75  76  77  78  79
68                  80  81  82  83  84  85  86  87
69                  88  89  90  91  92  93  94  95
70                  96  97  98  99 100 101 102 103
71                 104 105 106 107 108 109 110 111
72                 112 113 114 115 116 117 118 119
73                 120 121 122 123 124 125 126 127
74                 128 129 130 131 132 133 134 135
75                 136 137 138 139 140 141 142 143
76                 144 145 146 147 148 149 150 151
77                 152 153 154 155 156 157 158 159
78                 160 161 162 163 164 165 166 167
79                 168 169 170 171 172 173 174 175
80                 176 177 178 179 180 181 182 183
81                 184 185 186 187 188 189 190 191
82                 192 193 194 195 196 197 198 199
83                 200 201 202 203 204 205 206 207
84                 208 209 210 211 212 213 214 215
85                 216 217 218 219 220 221 222 223
86                 224 225 226 227 228 229 230 231
87                 232 233 234 235 236 237 238 239
88                 240 241 242 243 244 245 246 247
89                 248 249 250 251 252 253 254 255>;
90         power-supply = <&backlight_regulator>;
91 };
92
93 &panel {
94         power-supply = <&panel_regulator>;
95 };
96
97 &rk808 {
98         pinctrl-names = "default";
99         pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
100         dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
101                     <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
102
103         regulators {
104                 mic_vcc: LDO_REG2 {
105                         regulator-name = "mic_vcc";
106                         regulator-always-on;
107                         regulator-boot-on;
108                         regulator-min-microvolt = <1800000>;
109                         regulator-max-microvolt = <1800000>;
110                         regulator-state-mem {
111                                 regulator-off-in-suspend;
112                         };
113                 };
114         };
115 };
116
117 &sdmmc {
118         disable-wp;
119         pinctrl-names = "default";
120         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
121                         &sdmmc_bus4>;
122 };
123
124 &vcc_5v {
125         enable-active-high;
126         gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
127         pinctrl-names = "default";
128         pinctrl-0 = <&drv_5v>;
129 };
130
131 &vcc50_hdmi {
132         enable-active-high;
133         gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
134         pinctrl-names = "default";
135         pinctrl-0 = <&vcc50_hdmi_en>;
136 };
137
138 &pinctrl {
139         backlight {
140                 bl_pwr_en: bl_pwr_en {
141                         rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
142                 };
143         };
144
145         buck-5v {
146                 drv_5v: drv-5v {
147                         rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
148                 };
149         };
150
151         hdmi {
152                 vcc50_hdmi_en: vcc50-hdmi-en {
153                         rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
154                 };
155         };
156
157         lcd {
158                 lcd_enable_h: lcd-en {
159                         rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
160                 };
161
162                 avdd_1v8_disp_en: avdd-1v8-disp-en {
163                         rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
164                 };
165         };
166
167         pmic {
168                 dvs_1: dvs-1 {
169                         rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
170                 };
171
172                 dvs_2: dvs-2 {
173                         rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
174                 };
175         };
176 };